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Tom Rini8b0c8a12018-05-06 18:27:01 -04001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01002/*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01004 */
Patrice Chotard879cde52019-02-12 16:50:40 +01005#include <common.h>
6#include <adc.h>
Patrick Delaunay500401f2019-06-21 15:26:40 +02007#include <bootm.h>
Patrice Chotard204079b2018-08-10 17:12:14 +02008#include <clk.h>
Patrick Delaunay266bf102019-07-30 19:16:44 +02009#include <config.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020010#include <dm.h>
Simon Glassdb229612019-08-01 09:46:42 -060011#include <env.h>
Simon Glass9d1f6192019-08-02 09:44:25 -060012#include <env_internal.h>
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +010013#include <g_dnl.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020014#include <generic-phy.h>
Simon Glassf11478f2019-12-28 10:45:07 -070015#include <hang.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010016#include <i2c.h>
Simon Glassa7b51302019-11-14 12:57:46 -070017#include <init.h>
Patrick Delaunay92dc1022019-02-12 11:44:41 +010018#include <led.h>
Simon Glass9bc15642020-02-03 07:36:16 -070019#include <malloc.h>
Patrick Delaunay92dc1022019-02-12 11:44:41 +010020#include <misc.h>
Patrick Delaunayde98cbf2019-07-02 13:26:07 +020021#include <mtd_node.h>
Patrick Delaunaybff66f92019-08-01 11:29:03 +020022#include <netdev.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020023#include <phy.h>
Patrick Delaunayc17d7252019-08-02 15:07:20 +020024#include <remoteproc.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020025#include <reset.h>
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010026#include <syscon.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010027#include <usb.h>
Patrick Delaunayae0931d02019-07-30 19:16:39 +020028#include <watchdog.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020029#include <asm/io.h>
Patrick Delaunayf2a7b872019-02-27 17:01:18 +010030#include <asm/gpio.h>
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010031#include <asm/arch/stm32.h>
Patrice Chotarddad97bf2019-05-02 18:36:01 +020032#include <asm/arch/sys_proto.h>
Patrick Delaunayde98cbf2019-07-02 13:26:07 +020033#include <jffs2/load_kernel.h>
Simon Glassd66c5f72020-02-03 07:36:15 -070034#include <linux/err.h>
Patrick Delaunay181298e2020-04-22 14:29:16 +020035#include <linux/iopoll.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020036#include <power/regulator.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010037#include <usb/dwc2_udc.h>
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010038
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010039/* SYSCFG registers */
40#define SYSCFG_BOOTR 0x00
41#define SYSCFG_PMCSETR 0x04
42#define SYSCFG_IOCTRLSETR 0x18
43#define SYSCFG_ICNR 0x1C
44#define SYSCFG_CMPCR 0x20
45#define SYSCFG_CMPENSETR 0x24
46#define SYSCFG_PMCCLRR 0x44
47
48#define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
49#define SYSCFG_BOOTR_BOOTPD_SHIFT 4
50
51#define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
52#define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
53#define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
54#define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
55#define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
56
57#define SYSCFG_CMPCR_SW_CTRL BIT(1)
58#define SYSCFG_CMPCR_READY BIT(8)
59
60#define SYSCFG_CMPENSETR_MPU_EN BIT(0)
61
62#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
63#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
64
65#define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
66
67#define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
Christophe Roullier69ac3f52019-05-17 15:08:43 +020068#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
69#define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
70#define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010071
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010072/*
73 * Get a global data pointer
74 */
75DECLARE_GLOBAL_DATA_PTR;
76
Patrice Chotardcded32f2019-04-30 18:09:38 +020077#define USB_LOW_THRESHOLD_UV 200000
Patrice Chotard879cde52019-02-12 16:50:40 +010078#define USB_WARNING_LOW_THRESHOLD_UV 660000
79#define USB_START_LOW_THRESHOLD_UV 1230000
Patrice Chotardcded32f2019-04-30 18:09:38 +020080#define USB_START_HIGH_THRESHOLD_UV 2150000
Patrice Chotard879cde52019-02-12 16:50:40 +010081
Patrick Delaunay92dc1022019-02-12 11:44:41 +010082int checkboard(void)
83{
84 int ret;
85 char *mode;
86 u32 otp;
87 struct udevice *dev;
88 const char *fdt_compat;
89 int fdt_compat_len;
90
Patrick Delaunay472407a2020-03-18 09:22:49 +010091 if (IS_ENABLED(CONFIG_TFABOOT))
Patrick Delaunay92dc1022019-02-12 11:44:41 +010092 mode = "trusted";
93 else
94 mode = "basic";
95
96 printf("Board: stm32mp1 in %s mode", mode);
97 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
98 &fdt_compat_len);
99 if (fdt_compat && fdt_compat_len)
100 printf(" (%s)", fdt_compat);
101 puts("\n");
102
Patrick Delaunay52163d92020-03-24 09:05:00 +0100103 /* display the STMicroelectronics board identification */
Patrick Delaunay0885c232020-02-12 19:37:42 +0100104 if (CONFIG_IS_ENABLED(CMD_STBOARD)) {
105 ret = uclass_get_device_by_driver(UCLASS_MISC,
106 DM_GET_DRIVER(stm32mp_bsec),
107 &dev);
108 if (!ret)
109 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
110 &otp, sizeof(otp));
111 if (ret > 0 && otp)
112 printf("Board: MB%04x Var%d.%d Rev.%c-%02d\n",
113 otp >> 16,
114 (otp >> 12) & 0xF,
115 (otp >> 4) & 0xF,
116 ((otp >> 8) & 0xF) - 1 + 'A',
117 otp & 0xF);
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100118 }
119
120 return 0;
121}
122
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100123static void board_key_check(void)
124{
125#if defined(CONFIG_FASTBOOT) || defined(CONFIG_CMD_STM32PROG)
126 ofnode node;
127 struct gpio_desc gpio;
128 enum forced_boot_mode boot_mode = BOOT_NORMAL;
129
130 node = ofnode_path("/config");
131 if (!ofnode_valid(node)) {
132 debug("%s: no /config node?\n", __func__);
133 return;
134 }
135#ifdef CONFIG_FASTBOOT
136 if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
137 &gpio, GPIOD_IS_IN)) {
138 debug("%s: could not find a /config/st,fastboot-gpios\n",
139 __func__);
140 } else {
141 if (dm_gpio_get_value(&gpio)) {
142 puts("Fastboot key pressed, ");
143 boot_mode = BOOT_FASTBOOT;
144 }
145
146 dm_gpio_free(NULL, &gpio);
147 }
148#endif
149#ifdef CONFIG_CMD_STM32PROG
150 if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
151 &gpio, GPIOD_IS_IN)) {
152 debug("%s: could not find a /config/st,stm32prog-gpios\n",
153 __func__);
154 } else {
155 if (dm_gpio_get_value(&gpio)) {
156 puts("STM32Programmer key pressed, ");
157 boot_mode = BOOT_STM32PROG;
158 }
159 dm_gpio_free(NULL, &gpio);
160 }
161#endif
162
163 if (boot_mode != BOOT_NORMAL) {
164 puts("entering download mode...\n");
165 clrsetbits_le32(TAMP_BOOT_CONTEXT,
166 TAMP_BOOT_FORCED_MASK,
167 boot_mode);
168 }
169#endif
170}
171
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100172#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
Patrice Chotard204079b2018-08-10 17:12:14 +0200173
Patrick Delaunay7f3384d2019-03-29 15:42:24 +0100174/* STMicroelectronics STUSB1600 Type-C controller */
175#define STUSB1600_CC_CONNECTION_STATUS 0x0E
176
177/* STUSB1600_CC_CONNECTION_STATUS bitfields */
178#define STUSB1600_CC_ATTACH BIT(0)
179
180static int stusb1600_init(struct udevice **dev_stusb1600)
181{
182 ofnode node;
183 struct udevice *dev, *bus;
184 int ret;
185 u32 chip_addr;
186
187 *dev_stusb1600 = NULL;
188
189 /* if node stusb1600 is present, means DK1 or DK2 board */
190 node = ofnode_by_compatible(ofnode_null(), "st,stusb1600");
191 if (!ofnode_valid(node))
192 return -ENODEV;
193
194 ret = ofnode_read_u32(node, "reg", &chip_addr);
195 if (ret)
196 return -EINVAL;
197
198 ret = uclass_get_device_by_ofnode(UCLASS_I2C, ofnode_get_parent(node),
199 &bus);
200 if (ret) {
201 printf("bus for stusb1600 not found\n");
202 return -ENODEV;
203 }
204
205 ret = dm_i2c_probe(bus, chip_addr, 0, &dev);
206 if (!ret)
207 *dev_stusb1600 = dev;
208
209 return ret;
210}
211
212static int stusb1600_cable_connected(struct udevice *dev)
213{
214 u8 status;
215
216 if (dm_i2c_read(dev, STUSB1600_CC_CONNECTION_STATUS, &status, 1))
217 return 0;
218
219 return status & STUSB1600_CC_ATTACH;
220}
221
222#include <usb/dwc2_udc.h>
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100223int g_dnl_board_usb_cable_connected(void)
Patrice Chotard204079b2018-08-10 17:12:14 +0200224{
Patrick Delaunay7f3384d2019-03-29 15:42:24 +0100225 struct udevice *stusb1600;
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100226 struct udevice *dwc2_udc_otg;
Patrice Chotard204079b2018-08-10 17:12:14 +0200227 int ret;
228
Patrick Delaunay7f3384d2019-03-29 15:42:24 +0100229 if (!stusb1600_init(&stusb1600))
230 return stusb1600_cable_connected(stusb1600);
231
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100232 ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
233 DM_GET_DRIVER(dwc2_udc_otg),
234 &dwc2_udc_otg);
235 if (!ret)
236 debug("dwc2_udc_otg init failed\n");
Patrice Chotard204079b2018-08-10 17:12:14 +0200237
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100238 return dwc2_udc_B_session_valid(dwc2_udc_otg);
Patrice Chotard879cde52019-02-12 16:50:40 +0100239}
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200240
241#define STM32MP1_G_DNL_DFU_PRODUCT_NUM 0xdf11
242#define STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM 0x0afb
243
244int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
245{
246 if (!strcmp(name, "usb_dnl_dfu"))
247 put_unaligned(STM32MP1_G_DNL_DFU_PRODUCT_NUM, &dev->idProduct);
248 else if (!strcmp(name, "usb_dnl_fastboot"))
249 put_unaligned(STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM,
250 &dev->idProduct);
251 else
252 put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct);
253
254 return 0;
255}
256
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100257#endif /* CONFIG_USB_GADGET */
Patrice Chotard879cde52019-02-12 16:50:40 +0100258
259static int get_led(struct udevice **dev, char *led_string)
260{
261 char *led_name;
262 int ret;
263
264 led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
265 if (!led_name) {
266 pr_debug("%s: could not find %s config string\n",
267 __func__, led_string);
268 return -ENOENT;
269 }
270 ret = led_get_by_label(led_name, dev);
271 if (ret) {
272 debug("%s: get=%d\n", __func__, ret);
273 return ret;
274 }
275
276 return 0;
277}
278
279static int setup_led(enum led_state_t cmd)
280{
281 struct udevice *dev;
282 int ret;
283
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200284 if (!CONFIG_IS_ENABLED(LED))
285 return 0;
286
Patrice Chotard879cde52019-02-12 16:50:40 +0100287 ret = get_led(&dev, "u-boot,boot-led");
288 if (ret)
289 return ret;
290
291 ret = led_set_state(dev, cmd);
Patrice Chotard204079b2018-08-10 17:12:14 +0200292 return ret;
293}
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200294
295static void __maybe_unused led_error_blink(u32 nb_blink)
296{
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200297 int ret;
298 struct udevice *led;
299 u32 i;
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200300
301 if (!nb_blink)
302 return;
303
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200304 if (CONFIG_IS_ENABLED(LED)) {
305 ret = get_led(&led, "u-boot,error-led");
306 if (!ret) {
307 /* make u-boot,error-led blinking */
308 /* if U32_MAX and 125ms interval, for 17.02 years */
309 for (i = 0; i < 2 * nb_blink; i++) {
310 led_set_state(led, LEDST_TOGGLE);
311 mdelay(125);
312 WATCHDOG_RESET();
313 }
314 led_set_state(led, LEDST_ON);
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200315 }
316 }
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200317
318 /* infinite: the boot process must be stopped */
319 if (nb_blink == U32_MAX)
320 hang();
321}
Patrice Chotard204079b2018-08-10 17:12:14 +0200322
Patrick Delaunayf6626e72019-07-30 19:16:43 +0200323#ifdef CONFIG_ADC
Patrice Chotard879cde52019-02-12 16:50:40 +0100324static int board_check_usb_power(void)
325{
326 struct ofnode_phandle_args adc_args;
327 struct udevice *adc;
Patrice Chotard879cde52019-02-12 16:50:40 +0100328 ofnode node;
329 unsigned int raw;
330 int max_uV = 0;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200331 int min_uV = USB_START_HIGH_THRESHOLD_UV;
Patrice Chotard879cde52019-02-12 16:50:40 +0100332 int ret, uV, adc_count;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200333 u32 nb_blink;
334 u8 i;
Patrice Chotard879cde52019-02-12 16:50:40 +0100335 node = ofnode_path("/config");
336 if (!ofnode_valid(node)) {
337 debug("%s: no /config node?\n", __func__);
338 return -ENOENT;
339 }
340
341 /*
342 * Retrieve the ADC channels devices and get measurement
343 * for each of them
344 */
345 adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
346 "#io-channel-cells");
347 if (adc_count < 0) {
348 if (adc_count == -ENOENT)
349 return 0;
350
351 pr_err("%s: can't find adc channel (%d)\n", __func__,
352 adc_count);
353
354 return adc_count;
355 }
356
357 for (i = 0; i < adc_count; i++) {
358 if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
359 "#io-channel-cells", 0, i,
360 &adc_args)) {
361 pr_debug("%s: can't find /config/st,adc_usb_pd\n",
362 __func__);
363 return 0;
364 }
365
366 ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
367 &adc);
368
369 if (ret) {
370 pr_err("%s: Can't get adc device(%d)\n", __func__,
371 ret);
372 return ret;
373 }
374
375 ret = adc_channel_single_shot(adc->name, adc_args.args[0],
376 &raw);
377 if (ret) {
378 pr_err("%s: single shot failed for %s[%d]!\n",
379 __func__, adc->name, adc_args.args[0]);
380 return ret;
381 }
382 /* Convert to uV */
383 if (!adc_raw_to_uV(adc, raw, &uV)) {
384 if (uV > max_uV)
385 max_uV = uV;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200386 if (uV < min_uV)
387 min_uV = uV;
Patrice Chotard879cde52019-02-12 16:50:40 +0100388 pr_debug("%s: %s[%02d] = %u, %d uV\n", __func__,
389 adc->name, adc_args.args[0], raw, uV);
390 } else {
391 pr_err("%s: Can't get uV value for %s[%d]\n",
392 __func__, adc->name, adc_args.args[0]);
393 }
394 }
395
396 /*
397 * If highest value is inside 1.23 Volts and 2.10 Volts, that means
398 * board is plugged on an USB-C 3A power supply and boot process can
399 * continue.
400 */
401 if (max_uV > USB_START_LOW_THRESHOLD_UV &&
Patrice Chotardcded32f2019-04-30 18:09:38 +0200402 max_uV <= USB_START_HIGH_THRESHOLD_UV &&
403 min_uV <= USB_LOW_THRESHOLD_UV)
Patrice Chotard879cde52019-02-12 16:50:40 +0100404 return 0;
405
Patrice Chotardcded32f2019-04-30 18:09:38 +0200406 pr_err("****************************************************\n");
407
408 /*
409 * If highest and lowest value are either both below
410 * USB_LOW_THRESHOLD_UV or both above USB_LOW_THRESHOLD_UV, that
411 * means USB TYPE-C is in unattached mode, this is an issue, make
412 * u-boot,error-led blinking and stop boot process.
413 */
414 if ((max_uV > USB_LOW_THRESHOLD_UV &&
415 min_uV > USB_LOW_THRESHOLD_UV) ||
416 (max_uV <= USB_LOW_THRESHOLD_UV &&
417 min_uV <= USB_LOW_THRESHOLD_UV)) {
418 pr_err("* ERROR USB TYPE-C connection in unattached mode *\n");
419 pr_err("* Check that USB TYPE-C cable is correctly plugged *\n");
420 /* with 125ms interval, led will blink for 17.02 years ....*/
421 nb_blink = U32_MAX;
422 }
Patrice Chotard879cde52019-02-12 16:50:40 +0100423
Patrice Chotardcded32f2019-04-30 18:09:38 +0200424 if (max_uV > USB_LOW_THRESHOLD_UV &&
425 max_uV <= USB_WARNING_LOW_THRESHOLD_UV &&
426 min_uV <= USB_LOW_THRESHOLD_UV) {
427 pr_err("* WARNING 500mA power supply detected *\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100428 nb_blink = 2;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200429 }
430
431 if (max_uV > USB_WARNING_LOW_THRESHOLD_UV &&
432 max_uV <= USB_START_LOW_THRESHOLD_UV &&
433 min_uV <= USB_LOW_THRESHOLD_UV) {
Patrice Chotard2d583f92020-04-30 18:41:05 +0200434 pr_err("* WARNING 1.5A power supply detected *\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100435 nb_blink = 3;
436 }
437
Patrice Chotardcded32f2019-04-30 18:09:38 +0200438 /*
439 * If highest value is above 2.15 Volts that means that the USB TypeC
440 * supplies more than 3 Amp, this is not compliant with TypeC specification
441 */
442 if (max_uV > USB_START_HIGH_THRESHOLD_UV) {
443 pr_err("* USB TYPE-C charger not compliant with *\n");
444 pr_err("* specification *\n");
445 pr_err("****************************************************\n\n");
446 /* with 125ms interval, led will blink for 17.02 years ....*/
447 nb_blink = U32_MAX;
448 } else {
449 pr_err("* Current too low, use a 3A power supply! *\n");
450 pr_err("****************************************************\n\n");
451 }
Patrice Chotard879cde52019-02-12 16:50:40 +0100452
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200453 led_error_blink(nb_blink);
Patrice Chotard879cde52019-02-12 16:50:40 +0100454
455 return 0;
456}
Patrick Delaunayf6626e72019-07-30 19:16:43 +0200457#endif /* CONFIG_ADC */
Patrice Chotard879cde52019-02-12 16:50:40 +0100458
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100459static void sysconf_init(void)
460{
Patrick Delaunayf8fe21d2020-04-01 09:07:33 +0200461#ifndef CONFIG_TFABOOT
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100462 u8 *syscfg;
463#ifdef CONFIG_DM_REGULATOR
464 struct udevice *pwr_dev;
465 struct udevice *pwr_reg;
466 struct udevice *dev;
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100467 u32 otp = 0;
468#endif
Patrick Delaunay181298e2020-04-22 14:29:16 +0200469 int ret;
470 u32 bootr, val;
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100471
472 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
473
474 /* interconnect update : select master using the port 1 */
475 /* LTDC = AXI_M9 */
476 /* GPU = AXI_M8 */
477 /* today information is hardcoded in U-Boot */
478 writel(BIT(9), syscfg + SYSCFG_ICNR);
479
480 /* disable Pull-Down for boot pin connected to VDD */
481 bootr = readl(syscfg + SYSCFG_BOOTR);
482 bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
483 bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
484 writel(bootr, syscfg + SYSCFG_BOOTR);
485
486#ifdef CONFIG_DM_REGULATOR
487 /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
488 * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
489 * The customer will have to disable this for low frequencies
490 * or if AFMUX is selected but the function not used, typically for
491 * TRACE. Otherwise, impact on power consumption.
492 *
493 * WARNING:
494 * enabling High Speed mode while VDD>2.7V
495 * with the OTP product_below_2v5 (OTP 18, BIT 13)
496 * erroneously set to 1 can damage the IC!
497 * => U-Boot set the register only if VDD < 2.7V (in DT)
498 * but this value need to be consistent with board design
499 */
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200500 ret = uclass_get_device_by_driver(UCLASS_PMIC,
501 DM_GET_DRIVER(stm32mp_pwr_pmic),
502 &pwr_dev);
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100503 if (!ret) {
504 ret = uclass_get_device_by_driver(UCLASS_MISC,
505 DM_GET_DRIVER(stm32mp_bsec),
506 &dev);
507 if (ret) {
508 pr_err("Can't find stm32mp_bsec driver\n");
509 return;
510 }
511
512 ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
Patrick Delaunayceb82e32019-08-02 13:08:06 +0200513 if (ret > 0)
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100514 otp = otp & BIT(13);
515
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200516 /* get VDD = vdd-supply */
517 ret = device_get_supply_regulator(pwr_dev, "vdd-supply",
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100518 &pwr_reg);
519
520 /* check if VDD is Low Voltage */
521 if (!ret) {
522 if (regulator_get_value(pwr_reg) < 2700000) {
523 writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
524 SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
525 SYSCFG_IOCTRLSETR_HSLVEN_ETH |
526 SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
527 SYSCFG_IOCTRLSETR_HSLVEN_SPI,
528 syscfg + SYSCFG_IOCTRLSETR);
529
530 if (!otp)
531 pr_err("product_below_2v5=0: HSLVEN protected by HW\n");
532 } else {
533 if (otp)
534 pr_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
535 }
536 } else {
537 debug("VDD unknown");
538 }
539 }
540#endif
541
542 /* activate automatic I/O compensation
543 * warning: need to ensure CSI enabled and ready in clock driver
544 */
545 writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
546
Patrick Delaunay181298e2020-04-22 14:29:16 +0200547 /* poll until ready (1s timeout) */
548 ret = readl_poll_timeout(syscfg + SYSCFG_CMPCR, val,
549 val & SYSCFG_CMPCR_READY,
550 1000000);
551 if (ret) {
552 pr_err("SYSCFG: I/O compensation failed, timeout.\n");
553 led_error_blink(10);
554 }
555
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100556 clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
557#endif
558}
559
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200560#ifdef CONFIG_DM_REGULATOR
561/* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
562static int dk2_i2c1_fix(void)
563{
564 ofnode node;
565 struct gpio_desc hdmi, audio;
566 int ret = 0;
567
568 node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39");
569 if (!ofnode_valid(node)) {
570 pr_debug("%s: no hdmi-transmitter@39 ?\n", __func__);
571 return -ENOENT;
572 }
573
574 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
575 &hdmi, GPIOD_IS_OUT)) {
576 pr_debug("%s: could not find reset-gpios\n",
577 __func__);
578 return -ENOENT;
579 }
580
581 node = ofnode_path("/soc/i2c@40012000/cs42l51@4a");
582 if (!ofnode_valid(node)) {
583 pr_debug("%s: no cs42l51@4a ?\n", __func__);
584 return -ENOENT;
585 }
586
587 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
588 &audio, GPIOD_IS_OUT)) {
589 pr_debug("%s: could not find reset-gpios\n",
590 __func__);
591 return -ENOENT;
592 }
593
594 /* before power up, insure that HDMI and AUDIO IC is under reset */
595 ret = dm_gpio_set_value(&hdmi, 1);
596 if (ret) {
597 pr_err("%s: can't set_value for hdmi_nrst gpio", __func__);
598 goto error;
599 }
600 ret = dm_gpio_set_value(&audio, 1);
601 if (ret) {
602 pr_err("%s: can't set_value for audio_nrst gpio", __func__);
603 goto error;
604 }
605
606 /* power-up audio IC */
607 regulator_autoset_by_name("v1v8_audio", NULL);
608
609 /* power-up HDMI IC */
610 regulator_autoset_by_name("v1v2_hdmi", NULL);
611 regulator_autoset_by_name("v3v3_hdmi", NULL);
612
613error:
614 return ret;
615}
616
617static bool board_is_dk2(void)
618{
Patrick Delaunay310aa8a2020-01-13 15:17:42 +0100619 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200620 of_machine_is_compatible("st,stm32mp157c-dk2"))
621 return true;
622
623 return false;
624}
625#endif
626
Patrick Delaunay486ae962020-04-22 14:29:13 +0200627static bool board_is_ev1(void)
628{
629 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
630 (of_machine_is_compatible("st,stm32mp157a-ev1") ||
631 of_machine_is_compatible("st,stm32mp157c-ev1") ||
632 of_machine_is_compatible("st,stm32mp157d-ev1") ||
633 of_machine_is_compatible("st,stm32mp157f-ev1")))
634 return true;
635
636 return false;
637}
638
639/* touchscreen driver: only used for pincontrol configuration */
640static const struct udevice_id goodix_ids[] = {
641 { .compatible = "goodix,gt9147", },
642 { }
643};
644
645U_BOOT_DRIVER(goodix) = {
646 .name = "goodix",
647 .id = UCLASS_NOP,
648 .of_match = goodix_ids,
649};
650
651static void board_ev1_init(void)
652{
653 struct udevice *dev;
654
655 /* configure IRQ line on EV1 for touchscreen before LCD reset */
656 uclass_get_device_by_driver(UCLASS_NOP, DM_GET_DRIVER(goodix), &dev);
657}
658
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100659/* board dependent setup after realloc */
660int board_init(void)
661{
Patrice Chotard972723a2019-03-11 11:13:17 +0100662 struct udevice *dev;
663
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100664 /* address of boot parameters */
665 gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
666
Patrice Chotard972723a2019-03-11 11:13:17 +0100667 /* probe all PINCTRL for hog */
668 for (uclass_first_device(UCLASS_PINCTRL, &dev);
669 dev;
670 uclass_next_device(&dev)) {
671 pr_debug("probe pincontrol = %s\n", dev->name);
672 }
673
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100674 board_key_check();
675
Patrick Delaunay486ae962020-04-22 14:29:13 +0200676 if (board_is_ev1())
677 board_ev1_init();
678
Patrick Delaunay6519e442019-07-05 17:20:09 +0200679#ifdef CONFIG_DM_REGULATOR
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200680 if (board_is_dk2())
681 dk2_i2c1_fix();
682
Patrick Delaunay6519e442019-07-05 17:20:09 +0200683 regulators_enable_boot_on(_DEBUG);
684#endif
685
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100686 sysconf_init();
687
Patrick Delaunay78f68f22020-04-10 19:14:01 +0200688 if (CONFIG_IS_ENABLED(LED))
Patrick Delaunay36e3d112018-07-27 16:37:08 +0200689 led_default_state();
690
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200691 setup_led(LEDST_ON);
692
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100693 return 0;
694}
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100695
696int board_late_init(void)
697{
698#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
699 const void *fdt_compat;
700 int fdt_compat_len;
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200701 int ret;
702 u32 otp;
703 struct udevice *dev;
704 char buf[10];
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100705
706 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
707 &fdt_compat_len);
708 if (fdt_compat && fdt_compat_len) {
Patrick Delaunay4533a2c2020-04-22 14:29:14 +0200709 if (strncmp(fdt_compat, "st,", 3) != 0) {
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100710 env_set("board_name", fdt_compat);
Patrick Delaunay4533a2c2020-04-22 14:29:14 +0200711 } else {
712 char dtb_name[256];
713 int buf_len = sizeof(dtb_name);
714
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100715 env_set("board_name", fdt_compat + 3);
Patrick Delaunay4533a2c2020-04-22 14:29:14 +0200716
717 strncpy(dtb_name, fdt_compat + 3, buf_len);
718 buf_len -= strlen(fdt_compat + 3);
719 strncat(dtb_name, ".dtb", buf_len);
720 env_set("fdtfile", dtb_name);
721 }
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100722 }
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200723 ret = uclass_get_device_by_driver(UCLASS_MISC,
724 DM_GET_DRIVER(stm32mp_bsec),
725 &dev);
726
727 if (!ret)
728 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
729 &otp, sizeof(otp));
730 if (!ret && otp) {
731 snprintf(buf, sizeof(buf), "0x%04x", otp >> 16);
732 env_set("board_id", buf);
733
734 snprintf(buf, sizeof(buf), "0x%04x",
735 ((otp >> 8) & 0xF) - 1 + 0xA);
736 env_set("board_rev", buf);
737 }
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100738#endif
739
Patrick Delaunayf6626e72019-07-30 19:16:43 +0200740#ifdef CONFIG_ADC
Patrice Chotard879cde52019-02-12 16:50:40 +0100741 /* for DK1/DK2 boards */
742 board_check_usb_power();
Patrick Delaunayf6626e72019-07-30 19:16:43 +0200743#endif /* CONFIG_ADC */
Patrice Chotard879cde52019-02-12 16:50:40 +0100744
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100745 return 0;
746}
Patrice Chotard879cde52019-02-12 16:50:40 +0100747
748void board_quiesce_devices(void)
749{
750 setup_led(LEDST_OFF);
751}
Patrice Chotard41443cf2019-05-02 18:07:14 +0200752
Patrick Delaunaybff66f92019-08-01 11:29:03 +0200753/* eth init function : weak called in eqos driver */
754int board_interface_eth_init(struct udevice *dev,
755 phy_interface_t interface_type)
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200756{
757 u8 *syscfg;
758 u32 value;
Patrick Delaunaybff66f92019-08-01 11:29:03 +0200759 bool eth_clk_sel_reg = false;
760 bool eth_ref_clk_sel_reg = false;
761
762 /* Gigabit Ethernet 125MHz clock selection. */
763 eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
764
765 /* Ethernet 50Mhz RMII clock selection */
766 eth_ref_clk_sel_reg =
767 dev_read_bool(dev, "st,eth_ref_clk_sel");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200768
769 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
770
771 if (!syscfg)
772 return -ENODEV;
773
774 switch (interface_type) {
775 case PHY_INTERFACE_MODE_MII:
776 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
777 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
778 debug("%s: PHY_INTERFACE_MODE_MII\n", __func__);
779 break;
780 case PHY_INTERFACE_MODE_GMII:
781 if (eth_clk_sel_reg)
782 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
783 SYSCFG_PMCSETR_ETH_CLK_SEL;
784 else
785 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
786 debug("%s: PHY_INTERFACE_MODE_GMII\n", __func__);
787 break;
788 case PHY_INTERFACE_MODE_RMII:
789 if (eth_ref_clk_sel_reg)
790 value = SYSCFG_PMCSETR_ETH_SEL_RMII |
791 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
792 else
793 value = SYSCFG_PMCSETR_ETH_SEL_RMII;
794 debug("%s: PHY_INTERFACE_MODE_RMII\n", __func__);
795 break;
796 case PHY_INTERFACE_MODE_RGMII:
797 case PHY_INTERFACE_MODE_RGMII_ID:
798 case PHY_INTERFACE_MODE_RGMII_RXID:
799 case PHY_INTERFACE_MODE_RGMII_TXID:
800 if (eth_clk_sel_reg)
801 value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
802 SYSCFG_PMCSETR_ETH_CLK_SEL;
803 else
804 value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
805 debug("%s: PHY_INTERFACE_MODE_RGMII\n", __func__);
806 break;
807 default:
808 debug("%s: Do not manage %d interface\n",
809 __func__, interface_type);
810 /* Do not manage others interfaces */
811 return -EINVAL;
812 }
813
814 /* clear and set ETH configuration bits */
815 writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
816 SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
817 syscfg + SYSCFG_PMCCLRR);
818 writel(value, syscfg + SYSCFG_PMCSETR);
819
820 return 0;
821}
822
Patrice Chotard34320372019-05-02 18:28:05 +0200823enum env_location env_get_location(enum env_operation op, int prio)
824{
825 u32 bootmode = get_bootmode();
826
827 if (prio)
828 return ENVL_UNKNOWN;
829
830 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
831#ifdef CONFIG_ENV_IS_IN_EXT4
832 case BOOT_FLASH_SD:
833 case BOOT_FLASH_EMMC:
834 return ENVL_EXT4;
835#endif
836#ifdef CONFIG_ENV_IS_IN_UBI
837 case BOOT_FLASH_NAND:
Patrick Delaunayb5a7ca22020-03-18 09:22:52 +0100838 case BOOT_FLASH_SPINAND:
Patrice Chotard34320372019-05-02 18:28:05 +0200839 return ENVL_UBI;
840#endif
Patrice Chotard2c461ec2019-05-09 14:25:36 +0200841#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
842 case BOOT_FLASH_NOR:
843 return ENVL_SPI_FLASH;
844#endif
Patrice Chotard34320372019-05-02 18:28:05 +0200845 default:
846 return ENVL_NOWHERE;
847 }
848}
849
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200850#if defined(CONFIG_ENV_IS_IN_EXT4)
851const char *env_ext4_get_intf(void)
852{
853 u32 bootmode = get_bootmode();
854
855 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
856 case BOOT_FLASH_SD:
857 case BOOT_FLASH_EMMC:
858 return "mmc";
859 default:
860 return "";
861 }
862}
863
864const char *env_ext4_get_dev_part(void)
865{
866 static char *const dev_part[] = {"0:auto", "1:auto", "2:auto"};
867 u32 bootmode = get_bootmode();
868
869 return dev_part[(bootmode & TAMP_BOOT_INSTANCE_MASK) - 1];
870}
871#endif
872
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200873#if defined(CONFIG_OF_BOARD_SETUP)
874int ft_board_setup(void *blob, bd_t *bd)
875{
876#ifdef CONFIG_FDT_FIXUP_PARTITIONS
877 struct node_info nodes[] = {
878 { "st,stm32f469-qspi", MTD_DEV_TYPE_NOR, },
Patrick Delaunayb5a7ca22020-03-18 09:22:52 +0100879 { "st,stm32f469-qspi", MTD_DEV_TYPE_SPINAND},
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200880 { "st,stm32mp15-fmc2", MTD_DEV_TYPE_NAND, },
881 };
882 fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
883#endif
884
885 return 0;
886}
887#endif
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200888
889static void board_copro_image_process(ulong fw_image, size_t fw_size)
890{
891 int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */
892
893 if (!rproc_is_initialized())
894 if (rproc_init()) {
895 printf("Remote Processor %d initialization failed\n",
896 id);
897 return;
898 }
899
900 ret = rproc_load(id, fw_image, fw_size);
901 printf("Load Remote Processor %d with data@addr=0x%08lx %u bytes:%s\n",
902 id, fw_image, fw_size, ret ? " Failed!" : " Success!");
903
Fabien Dessennead6cc942019-10-30 14:38:32 +0100904 if (!ret)
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200905 rproc_start(id);
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200906}
907
908U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process);