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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Peng Fanf664c142015-08-13 10:55:34 +08002/*
3 * (C) Copyright 2009
4 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
Peng Fanf664c142015-08-13 10:55:34 +08005 */
6
7#ifndef _SYS_PROTO_H_
8#define _SYS_PROTO_H_
9
Jagan Tekie5f970b2017-02-24 15:45:12 +053010#include <asm/io.h>
Stefano Babic33731bc2017-06-29 10:16:06 +020011#include <asm/mach-imx/regs-common.h>
Peng Fanf664c142015-08-13 10:55:34 +080012#include <common.h>
13#include "../arch-imx/cpu.h"
14
15#define soc_rev() (get_cpu_rev() & 0xFF)
16#define is_soc_rev(rev) (soc_rev() == rev)
17
18/* returns MXC_CPU_ value */
19#define cpu_type(rev) (((rev) >> 12) & 0xff)
Adrian Alonso1eec27c2015-09-02 13:54:12 -050020#define soc_type(rev) (((rev) >> 12) & 0xf0)
Peng Fanf664c142015-08-13 10:55:34 +080021/* both macros return/take MXC_CPU_ constants */
22#define get_cpu_type() (cpu_type(get_cpu_rev()))
Adrian Alonso1eec27c2015-09-02 13:54:12 -050023#define get_soc_type() (soc_type(get_cpu_rev()))
Peng Fanf664c142015-08-13 10:55:34 +080024#define is_cpu_type(cpu) (get_cpu_type() == cpu)
Adrian Alonso1eec27c2015-09-02 13:54:12 -050025#define is_soc_type(soc) (get_soc_type() == soc)
Peng Fanf664c142015-08-13 10:55:34 +080026
Peng Fan1e4e7622016-05-23 18:35:52 +080027#define is_mx6() (is_soc_type(MXC_SOC_MX6))
28#define is_mx7() (is_soc_type(MXC_SOC_MX7))
Peng Fan39945c12018-11-20 10:19:25 +000029#define is_imx8m() (is_soc_type(MXC_SOC_IMX8M))
Peng Fan36b65172018-10-18 14:28:16 +020030#define is_imx8() (is_soc_type(MXC_SOC_IMX8))
Peng Fan1e4e7622016-05-23 18:35:52 +080031
Peng Fanf664c142015-08-13 10:55:34 +080032#define is_mx6dqp() (is_cpu_type(MXC_CPU_MX6QP) || is_cpu_type(MXC_CPU_MX6DP))
Peng Fan1e4e7622016-05-23 18:35:52 +080033#define is_mx6dq() (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D))
34#define is_mx6sdl() (is_cpu_type(MXC_CPU_MX6SOLO) || is_cpu_type(MXC_CPU_MX6DL))
Jagan Teki0d6d48b2016-10-08 18:00:11 +053035#define is_mx6dl() (is_cpu_type(MXC_CPU_MX6DL))
Peng Fan1e4e7622016-05-23 18:35:52 +080036#define is_mx6sx() (is_cpu_type(MXC_CPU_MX6SX))
37#define is_mx6sl() (is_cpu_type(MXC_CPU_MX6SL))
Jagan Teki0d6d48b2016-10-08 18:00:11 +053038#define is_mx6solo() (is_cpu_type(MXC_CPU_MX6SOLO))
Peng Fan1e4e7622016-05-23 18:35:52 +080039#define is_mx6ul() (is_cpu_type(MXC_CPU_MX6UL))
Peng Fanfa6cb602016-08-11 14:02:40 +080040#define is_mx6ull() (is_cpu_type(MXC_CPU_MX6ULL))
Peng Fanc53d0c92019-08-08 09:55:52 +000041#define is_mx6ulz() (is_cpu_type(MXC_CPU_MX6ULZ))
Peng Fan4cfd7972016-12-11 19:24:20 +080042#define is_mx6sll() (is_cpu_type(MXC_CPU_MX6SLL))
Peng Fanf664c142015-08-13 10:55:34 +080043
Peng Fan98c57822017-02-22 16:21:46 +080044#define is_mx7ulp() (is_cpu_type(MXC_CPU_MX7ULP))
45
Peng Fan9bcb0c22018-11-20 10:19:22 +000046#define is_imx8mq() (is_cpu_type(MXC_CPU_IMX8MQ))
Peng Fan3e1d1ea2019-08-26 08:11:46 +000047#define is_imx8qm() (is_cpu_type(MXC_CPU_IMX8QM))
Peng Fan2d22a992019-08-27 06:25:04 +000048#define is_imx8mm() (is_cpu_type(MXC_CPU_IMX8MM) || is_cpu_type(MXC_CPU_IMX8MML) ||\
49 is_cpu_type(MXC_CPU_IMX8MMD) || is_cpu_type(MXC_CPU_IMX8MMDL) || \
50 is_cpu_type(MXC_CPU_IMX8MMS) || is_cpu_type(MXC_CPU_IMX8MMSL))
51#define is_imx8mml() (is_cpu_type(MXC_CPU_IMX8MML))
52#define is_imx8mmd() (is_cpu_type(MXC_CPU_IMX8MMD))
53#define is_imx8mmdl() (is_cpu_type(MXC_CPU_IMX8MMDL))
54#define is_imx8mms() (is_cpu_type(MXC_CPU_IMX8MMS))
55#define is_imx8mmsl() (is_cpu_type(MXC_CPU_IMX8MMSL))
Peng Fan36b65172018-10-18 14:28:16 +020056#define is_imx8qxp() (is_cpu_type(MXC_CPU_IMX8QXP))
57
Jagan Tekie5f970b2017-02-24 15:45:12 +053058#ifdef CONFIG_MX6
59#define IMX6_SRC_GPR10_BMODE BIT(28)
60
Jagan Teki32a71142017-02-24 15:45:14 +053061#define IMX6_BMODE_MASK GENMASK(7, 0)
62#define IMX6_BMODE_SHIFT 4
63#define IMX6_BMODE_EMI_MASK BIT(3)
64#define IMX6_BMODE_EMI_SHIFT 3
65#define IMX6_BMODE_SERIAL_ROM_MASK GENMASK(26, 24)
66#define IMX6_BMODE_SERIAL_ROM_SHIFT 24
67
68enum imx6_bmode_serial_rom {
69 IMX6_BMODE_ECSPI1,
70 IMX6_BMODE_ECSPI2,
71 IMX6_BMODE_ECSPI3,
72 IMX6_BMODE_ECSPI4,
73 IMX6_BMODE_ECSPI5,
74 IMX6_BMODE_I2C1,
75 IMX6_BMODE_I2C2,
76 IMX6_BMODE_I2C3,
77};
78
79enum imx6_bmode_emi {
Jagan Teki32a71142017-02-24 15:45:14 +053080 IMX6_BMODE_NOR,
Lukasz Majewski3234ef32019-01-03 23:50:51 +010081 IMX6_BMODE_ONENAND,
Jagan Teki32a71142017-02-24 15:45:14 +053082};
83
84enum imx6_bmode {
85 IMX6_BMODE_EMI,
Stefan Agner53456f52017-08-15 17:49:42 -070086#if defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
87 IMX6_BMODE_QSPI,
88 IMX6_BMODE_RESERVED,
89#else
90 IMX6_BMODE_RESERVED,
Jagan Teki32a71142017-02-24 15:45:14 +053091 IMX6_BMODE_SATA,
Stefan Agner53456f52017-08-15 17:49:42 -070092#endif
Jagan Teki32a71142017-02-24 15:45:14 +053093 IMX6_BMODE_SERIAL_ROM,
94 IMX6_BMODE_SD,
95 IMX6_BMODE_ESD,
96 IMX6_BMODE_MMC,
97 IMX6_BMODE_EMMC,
Eran Matityahu5fa7ca62017-12-14 20:20:02 +020098 IMX6_BMODE_NAND_MIN,
99 IMX6_BMODE_NAND_MAX = 0xf,
Jagan Teki32a71142017-02-24 15:45:14 +0530100};
101
Jagan Tekie5f970b2017-02-24 15:45:12 +0530102u32 imx6_src_get_boot_mode(void);
Breno Limaf22b1092017-08-24 10:00:16 -0300103void gpr_init(void);
104
Jagan Tekie5f970b2017-02-24 15:45:12 +0530105#endif /* CONFIG_MX6 */
106
Peng Fanf664c142015-08-13 10:55:34 +0800107u32 get_nr_cpus(void);
108u32 get_cpu_rev(void);
109u32 get_cpu_speed_grade_hz(void);
110u32 get_cpu_temp_grade(int *minc, int *maxc);
111const char *get_imx_type(u32 imxtype);
112u32 imx_ddr_size(void);
113void sdelay(unsigned long);
114void set_chipselect_size(int const);
115
Adrian Alonsoee7c4ca2015-09-02 13:54:15 -0500116void init_aips(void);
117void init_src(void);
Bryan O'Donoghue0290ea02018-04-05 19:46:06 +0100118void init_snvs(void);
Fabio Estevam5f79d462017-11-23 10:55:33 -0200119void imx_wdog_disable_powerdown(void);
Adrian Alonsoee7c4ca2015-09-02 13:54:15 -0500120
Diego Dorta29f702e2017-09-21 15:10:03 -0300121int board_mmc_get_env_dev(int devno);
122
Fabio Estevam49bcdd72017-11-27 10:25:09 -0200123int nxp_board_rev(void);
124char nxp_board_rev_string(void);
125
Peng Fanf664c142015-08-13 10:55:34 +0800126/*
127 * Initializes on-chip ethernet controllers.
128 * to override, implement board_eth_init()
129 */
130int fecmxc_initialize(bd_t *bis);
131u32 get_ahb_clk(void);
132u32 get_periph_clk(void);
133
Peng Fan5f8dbf52015-10-29 15:54:49 +0800134void lcdif_power_down(void);
135
Peng Fanf664c142015-08-13 10:55:34 +0800136int mxs_reset_block(struct mxs_register_32 *reg);
137int mxs_wait_mask_set(struct mxs_register_32 *reg, u32 mask, u32 timeout);
138int mxs_wait_mask_clr(struct mxs_register_32 *reg, u32 mask, u32 timeout);
Peng Fanaa3b9072018-01-10 13:20:23 +0800139
140unsigned long call_imx_sip(unsigned long id, unsigned long reg0,
141 unsigned long reg1, unsigned long reg2);
Peng Fana5060092019-04-12 07:54:50 +0000142unsigned long call_imx_sip_ret2(unsigned long id, unsigned long reg0,
143 unsigned long *reg1, unsigned long reg2,
144 unsigned long reg3);
Peng Fanf664c142015-08-13 10:55:34 +0800145#endif