blob: 2a034d3a77c71419e755c7060c5cbacc491e354a [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
wdenkc6097192002-11-03 00:24:07 +00002/*
3 * (C) Copyright 2001
4 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
wdenkc6097192002-11-03 00:24:07 +00005 */
6
7/*
8 * This provides a bit-banged interface to the ethernet MII management
9 * channel.
10 */
11
Simon Glassdbad3462015-04-05 16:07:39 -060012#include <dm.h>
Simon Glass0f2af882020-05-10 11:40:05 -060013#include <log.h>
wdenkc6097192002-11-03 00:24:07 +000014#include <miiphy.h>
Andy Flemingaecf6fc2011-04-08 02:10:27 -050015#include <phy.h>
Simon Glassdbd79542020-05-10 11:40:11 -060016#include <linux/delay.h>
wdenkc6097192002-11-03 00:24:07 +000017
Marian Balakowiczaab8c492005-10-28 22:30:33 +020018#include <asm/types.h>
19#include <linux/list.h>
20#include <malloc.h>
21#include <net.h>
22
23/* local debug macro */
Marian Balakowiczaab8c492005-10-28 22:30:33 +020024#undef MII_DEBUG
25
26#undef debug
27#ifdef MII_DEBUG
Andy Flemingaea0c3e2011-04-07 14:38:35 -050028#define debug(fmt, args...) printf(fmt, ##args)
Marian Balakowiczaab8c492005-10-28 22:30:33 +020029#else
Andy Flemingaea0c3e2011-04-07 14:38:35 -050030#define debug(fmt, args...)
Marian Balakowiczaab8c492005-10-28 22:30:33 +020031#endif /* MII_DEBUG */
32
Marian Balakowiczaab8c492005-10-28 22:30:33 +020033static struct list_head mii_devs;
34static struct mii_dev *current_mii;
35
Mike Frysinger24a90082010-07-27 18:35:09 -040036/*
37 * Lookup the mii_dev struct by the registered device name.
38 */
Andy Flemingaecf6fc2011-04-08 02:10:27 -050039struct mii_dev *miiphy_get_dev_by_name(const char *devname)
Mike Frysinger24a90082010-07-27 18:35:09 -040040{
41 struct list_head *entry;
42 struct mii_dev *dev;
43
44 if (!devname) {
45 printf("NULL device name!\n");
46 return NULL;
47 }
48
49 list_for_each(entry, &mii_devs) {
50 dev = list_entry(entry, struct mii_dev, link);
51 if (strcmp(dev->name, devname) == 0)
52 return dev;
53 }
54
Mike Frysinger24a90082010-07-27 18:35:09 -040055 return NULL;
56}
57
Marian Balakowiczaab8c492005-10-28 22:30:33 +020058/*****************************************************************************
59 *
Marian Balakowiczcbdd1c82005-11-30 18:06:04 +010060 * Initialize global data. Need to be called before any other miiphy routine.
61 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -040062void miiphy_init(void)
Marian Balakowiczcbdd1c82005-11-30 18:06:04 +010063{
Andy Flemingaea0c3e2011-04-07 14:38:35 -050064 INIT_LIST_HEAD(&mii_devs);
Larry Johnson81b974b2007-10-31 11:21:29 -050065 current_mii = NULL;
Marian Balakowiczcbdd1c82005-11-30 18:06:04 +010066}
67
Marek Vasutbbf7a222025-02-22 21:33:22 +010068void mdio_init(struct mii_dev *bus)
69{
70 memset(bus, 0, sizeof(*bus));
71
72 /* initialize mii_dev struct fields */
73 INIT_LIST_HEAD(&bus->link);
74}
75
Andy Flemingaecf6fc2011-04-08 02:10:27 -050076struct mii_dev *mdio_alloc(void)
77{
78 struct mii_dev *bus;
79
80 bus = malloc(sizeof(*bus));
81 if (!bus)
82 return bus;
83
Marek Vasutbbf7a222025-02-22 21:33:22 +010084 mdio_init(bus);
Andy Flemingaecf6fc2011-04-08 02:10:27 -050085
86 return bus;
87}
88
Bin Menga961e1f2015-10-07 21:32:37 -070089void mdio_free(struct mii_dev *bus)
90{
91 free(bus);
92}
93
Andy Flemingaecf6fc2011-04-08 02:10:27 -050094int mdio_register(struct mii_dev *bus)
95{
Peng Fancd41c212015-11-24 17:03:47 +080096 if (!bus || !bus->read || !bus->write)
Andy Flemingaecf6fc2011-04-08 02:10:27 -050097 return -1;
98
99 /* check if we have unique name */
100 if (miiphy_get_dev_by_name(bus->name)) {
101 printf("mdio_register: non unique device name '%s'\n",
102 bus->name);
103 return -1;
104 }
105
106 /* add it to the list */
107 list_add_tail(&bus->link, &mii_devs);
108
109 if (!current_mii)
110 current_mii = bus;
111
112 return 0;
113}
114
Michal Simek1a548f52016-12-08 10:06:26 +0100115int mdio_register_seq(struct mii_dev *bus, int seq)
116{
117 int ret;
118
119 /* Setup a unique name for each mdio bus */
120 ret = snprintf(bus->name, MDIO_NAME_LEN, "eth%d", seq);
121 if (ret < 0)
122 return ret;
123
124 return mdio_register(bus);
125}
126
Bin Menga961e1f2015-10-07 21:32:37 -0700127int mdio_unregister(struct mii_dev *bus)
128{
129 if (!bus)
130 return 0;
131
132 /* delete it from the list */
133 list_del(&bus->link);
134
135 if (current_mii == bus)
136 current_mii = NULL;
137
138 return 0;
139}
140
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500141void mdio_list_devices(void)
142{
143 struct list_head *entry;
144
145 list_for_each(entry, &mii_devs) {
146 int i;
147 struct mii_dev *bus = list_entry(entry, struct mii_dev, link);
148
149 printf("%s:\n", bus->name);
150
151 for (i = 0; i < PHY_MAX_ADDR; i++) {
152 struct phy_device *phydev = bus->phymap[i];
153
154 if (phydev) {
Michal Simekfca1e842016-11-16 08:41:01 +0100155 printf("%x - %s", i, phydev->drv->name);
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500156
157 if (phydev->dev)
158 printf(" <--> %s\n", phydev->dev->name);
159 else
160 printf("\n");
161 }
162 }
163 }
164}
165
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400166int miiphy_set_current_dev(const char *devname)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200167{
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200168 struct mii_dev *dev;
169
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500170 dev = miiphy_get_dev_by_name(devname);
Mike Frysinger24a90082010-07-27 18:35:09 -0400171 if (dev) {
172 current_mii = dev;
173 return 0;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200174 }
175
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500176 printf("No such device: %s\n", devname);
177
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200178 return 1;
179}
180
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500181struct mii_dev *mdio_get_current_dev(void)
182{
183 return current_mii;
184}
185
Pankaj Bansal7c18fe82018-09-18 15:46:48 +0530186struct list_head *mdio_get_list_head(void)
187{
188 return &mii_devs;
189}
190
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500191struct phy_device *mdio_phydev_for_ethname(const char *ethname)
192{
193 struct list_head *entry;
194 struct mii_dev *bus;
195
196 list_for_each(entry, &mii_devs) {
197 int i;
198 bus = list_entry(entry, struct mii_dev, link);
199
200 for (i = 0; i < PHY_MAX_ADDR; i++) {
201 if (!bus->phymap[i] || !bus->phymap[i]->dev)
202 continue;
203
204 if (strcmp(bus->phymap[i]->dev->name, ethname) == 0)
205 return bus->phymap[i];
206 }
207 }
208
209 printf("%s is not a known ethernet\n", ethname);
210 return NULL;
211}
212
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400213const char *miiphy_get_current_dev(void)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200214{
215 if (current_mii)
216 return current_mii->name;
217
218 return NULL;
219}
220
Mike Frysingerbd17e7a2010-07-27 18:35:10 -0400221static struct mii_dev *miiphy_get_active_dev(const char *devname)
222{
223 /* If the current mii is the one we want, return it */
224 if (current_mii)
225 if (strcmp(current_mii->name, devname) == 0)
226 return current_mii;
227
228 /* Otherwise, set the active one to the one we want */
229 if (miiphy_set_current_dev(devname))
230 return NULL;
231 else
232 return current_mii;
233}
234
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200235/*****************************************************************************
236 *
237 * Read to variable <value> from the PHY attached to device <devname>,
238 * use PHY address <addr> and register <reg>.
239 *
Andy Fleming896a7172011-10-31 09:46:13 -0500240 * This API is deprecated. Use phy_read on a phy_device found via phy_connect
241 *
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200242 * Returns:
243 * 0 on success
244 */
Wolfgang Denk934fcb62011-12-07 08:35:14 +0100245int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
Larry Johnson81b974b2007-10-31 11:21:29 -0500246 unsigned short *value)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200247{
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500248 struct mii_dev *bus;
Anatolij Gustschin1bbce3a2011-04-30 02:17:44 +0000249 int ret;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200250
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500251 bus = miiphy_get_active_dev(devname);
Anatolij Gustschin1bbce3a2011-04-30 02:17:44 +0000252 if (!bus)
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500253 return 1;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200254
Anatolij Gustschin1bbce3a2011-04-30 02:17:44 +0000255 ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg);
256 if (ret < 0)
257 return 1;
258
259 *value = (unsigned short)ret;
260 return 0;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200261}
262
263/*****************************************************************************
264 *
265 * Write <value> to the PHY attached to device <devname>,
266 * use PHY address <addr> and register <reg>.
267 *
Andy Fleming896a7172011-10-31 09:46:13 -0500268 * This API is deprecated. Use phy_write on a phy_device found by phy_connect
269 *
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200270 * Returns:
271 * 0 on success
272 */
Wolfgang Denk934fcb62011-12-07 08:35:14 +0100273int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
Larry Johnson81b974b2007-10-31 11:21:29 -0500274 unsigned short value)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200275{
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500276 struct mii_dev *bus;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200277
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500278 bus = miiphy_get_active_dev(devname);
279 if (bus)
280 return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200281
Mike Frysinger24a90082010-07-27 18:35:09 -0400282 return 1;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200283}
284
285/*****************************************************************************
286 *
287 * Print out list of registered MII capable devices.
288 */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500289void miiphy_listdev(void)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200290{
291 struct list_head *entry;
292 struct mii_dev *dev;
293
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500294 puts("MII devices: ");
295 list_for_each(entry, &mii_devs) {
296 dev = list_entry(entry, struct mii_dev, link);
297 printf("'%s' ", dev->name);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200298 }
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500299 puts("\n");
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200300
301 if (current_mii)
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500302 printf("Current device: '%s'\n", current_mii->name);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200303}
304
wdenkc6097192002-11-03 00:24:07 +0000305/*****************************************************************************
306 *
307 * Read the OUI, manufacture's model number, and revision number.
308 *
309 * OUI: 22 bits (unsigned int)
310 * Model: 6 bits (unsigned char)
311 * Revision: 4 bits (unsigned char)
312 *
Andy Fleming896a7172011-10-31 09:46:13 -0500313 * This API is deprecated.
314 *
wdenkc6097192002-11-03 00:24:07 +0000315 * Returns:
316 * 0 on success
317 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400318int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
wdenkc6097192002-11-03 00:24:07 +0000319 unsigned char *model, unsigned char *rev)
320{
321 unsigned int reg = 0;
wdenkf4cec3f2003-12-06 23:20:41 +0000322 unsigned short tmp;
wdenkc6097192002-11-03 00:24:07 +0000323
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500324 if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) {
325 debug("PHY ID register 2 read failed\n");
326 return -1;
wdenkc6097192002-11-03 00:24:07 +0000327 }
wdenkf4cec3f2003-12-06 23:20:41 +0000328 reg = tmp;
wdenkc6097192002-11-03 00:24:07 +0000329
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500330 debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg);
Shinya Kuribayashi49e42af2008-01-19 10:25:59 +0900331
wdenkc6097192002-11-03 00:24:07 +0000332 if (reg == 0xFFFF) {
333 /* No physical device present at this address */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500334 return -1;
wdenkc6097192002-11-03 00:24:07 +0000335 }
336
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500337 if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) {
338 debug("PHY ID register 1 read failed\n");
339 return -1;
wdenkc6097192002-11-03 00:24:07 +0000340 }
wdenkf4cec3f2003-12-06 23:20:41 +0000341 reg |= tmp << 16;
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500342 debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
Shinya Kuribayashi49e42af2008-01-19 10:25:59 +0900343
Larry Johnson81b974b2007-10-31 11:21:29 -0500344 *oui = (reg >> 10);
345 *model = (unsigned char)((reg >> 4) & 0x0000003F);
346 *rev = (unsigned char)(reg & 0x0000000F);
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500347 return 0;
wdenkc6097192002-11-03 00:24:07 +0000348}
349
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500350#ifndef CONFIG_PHYLIB
wdenkc6097192002-11-03 00:24:07 +0000351/*****************************************************************************
352 *
353 * Reset the PHY.
Andy Fleming896a7172011-10-31 09:46:13 -0500354 *
355 * This API is deprecated. Use PHYLIB.
356 *
wdenkc6097192002-11-03 00:24:07 +0000357 * Returns:
358 * 0 on success
359 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400360int miiphy_reset(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000361{
362 unsigned short reg;
Stefan Roese2e536362010-02-02 13:43:48 +0100363 int timeout = 500;
wdenkc6097192002-11-03 00:24:07 +0000364
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500365 if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
366 debug("PHY status read failed\n");
367 return -1;
Wolfgang Denk8ff63c22005-08-12 23:15:53 +0200368 }
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500369 if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) {
370 debug("PHY reset failed\n");
371 return -1;
wdenkc6097192002-11-03 00:24:07 +0000372 }
Tom Rini6c851512022-03-18 08:38:26 -0400373#if CONFIG_PHY_RESET_DELAY > 0
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500374 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
wdenk2cefd152004-02-08 22:55:38 +0000375#endif
wdenkc6097192002-11-03 00:24:07 +0000376 /*
377 * Poll the control register for the reset bit to go to 0 (it is
378 * auto-clearing). This should happen within 0.5 seconds per the
379 * IEEE spec.
380 */
wdenkc6097192002-11-03 00:24:07 +0000381 reg = 0x8000;
Stefan Roese2e536362010-02-02 13:43:48 +0100382 while (((reg & 0x8000) != 0) && timeout--) {
Mike Frysingerd63ee712010-12-23 15:40:12 -0500383 if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
Stefan Roese2e536362010-02-02 13:43:48 +0100384 debug("PHY status read failed\n");
385 return -1;
wdenkc6097192002-11-03 00:24:07 +0000386 }
Stefan Roese2e536362010-02-02 13:43:48 +0100387 udelay(1000);
wdenkc6097192002-11-03 00:24:07 +0000388 }
389 if ((reg & 0x8000) == 0) {
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500390 return 0;
wdenkc6097192002-11-03 00:24:07 +0000391 } else {
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500392 puts("PHY reset timed out\n");
393 return -1;
wdenkc6097192002-11-03 00:24:07 +0000394 }
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500395 return 0;
wdenkc6097192002-11-03 00:24:07 +0000396}
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500397#endif /* !PHYLIB */
wdenkc6097192002-11-03 00:24:07 +0000398
wdenkc6097192002-11-03 00:24:07 +0000399/*****************************************************************************
400 *
Larry Johnson966a80b2007-11-01 08:46:50 -0500401 * Determine the ethernet speed (10/100/1000). Return 10 on error.
wdenkc6097192002-11-03 00:24:07 +0000402 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400403int miiphy_speed(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000404{
Dongpo Lice290242016-08-22 21:03:29 +0800405 u16 bmcr, anlpar, adv;
wdenkc6097192002-11-03 00:24:07 +0000406
wdenkeec9a3d2004-03-23 23:20:24 +0000407#if defined(CONFIG_PHY_GIGE)
Larry Johnson966a80b2007-11-01 08:46:50 -0500408 u16 btsr;
409
410 /*
411 * Check for 1000BASE-X. If it is supported, then assume that the speed
412 * is 1000.
413 */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500414 if (miiphy_is_1000base_x(devname, addr))
Larry Johnson966a80b2007-11-01 08:46:50 -0500415 return _1000BASET;
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500416
Larry Johnson966a80b2007-11-01 08:46:50 -0500417 /*
418 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
419 */
420 /* Check for 1000BASE-T. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500421 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
422 printf("PHY 1000BT status");
Larry Johnson966a80b2007-11-01 08:46:50 -0500423 goto miiphy_read_failed;
424 }
425 if (btsr != 0xFFFF &&
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500426 (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)))
Larry Johnson966a80b2007-11-01 08:46:50 -0500427 return _1000BASET;
wdenkeec9a3d2004-03-23 23:20:24 +0000428#endif /* CONFIG_PHY_GIGE */
wdenked2ac4b2004-03-14 18:23:55 +0000429
wdenke3a06802004-06-06 23:13:55 +0000430 /* Check Basic Management Control Register first. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500431 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
432 printf("PHY speed");
Larry Johnson966a80b2007-11-01 08:46:50 -0500433 goto miiphy_read_failed;
wdenkc6097192002-11-03 00:24:07 +0000434 }
wdenke3a06802004-06-06 23:13:55 +0000435 /* Check if auto-negotiation is on. */
Mike Frysingerd63ee712010-12-23 15:40:12 -0500436 if (bmcr & BMCR_ANENABLE) {
wdenke3a06802004-06-06 23:13:55 +0000437 /* Get auto-negotiation results. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500438 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
439 printf("PHY AN speed");
Larry Johnson966a80b2007-11-01 08:46:50 -0500440 goto miiphy_read_failed;
wdenke3a06802004-06-06 23:13:55 +0000441 }
Dongpo Lice290242016-08-22 21:03:29 +0800442
443 if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) {
444 puts("PHY AN adv speed");
445 goto miiphy_read_failed;
446 }
447 return ((anlpar & adv) & LPA_100) ? _100BASET : _10BASET;
wdenke3a06802004-06-06 23:13:55 +0000448 }
449 /* Get speed from basic control settings. */
Mike Frysingerd63ee712010-12-23 15:40:12 -0500450 return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET;
wdenke3a06802004-06-06 23:13:55 +0000451
Michael Zaidman6dbca5f2010-02-28 16:28:25 +0200452miiphy_read_failed:
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500453 printf(" read failed, assuming 10BASE-T\n");
Larry Johnson966a80b2007-11-01 08:46:50 -0500454 return _10BASET;
wdenkc6097192002-11-03 00:24:07 +0000455}
456
wdenkc6097192002-11-03 00:24:07 +0000457/*****************************************************************************
458 *
Larry Johnson966a80b2007-11-01 08:46:50 -0500459 * Determine full/half duplex. Return half on error.
wdenkc6097192002-11-03 00:24:07 +0000460 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400461int miiphy_duplex(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000462{
Dongpo Lice290242016-08-22 21:03:29 +0800463 u16 bmcr, anlpar, adv;
wdenkc6097192002-11-03 00:24:07 +0000464
wdenkeec9a3d2004-03-23 23:20:24 +0000465#if defined(CONFIG_PHY_GIGE)
Larry Johnson966a80b2007-11-01 08:46:50 -0500466 u16 btsr;
467
468 /* Check for 1000BASE-X. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500469 if (miiphy_is_1000base_x(devname, addr)) {
Larry Johnson966a80b2007-11-01 08:46:50 -0500470 /* 1000BASE-X */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500471 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
472 printf("1000BASE-X PHY AN duplex");
Larry Johnson966a80b2007-11-01 08:46:50 -0500473 goto miiphy_read_failed;
wdenked2ac4b2004-03-14 18:23:55 +0000474 }
475 }
Larry Johnson966a80b2007-11-01 08:46:50 -0500476 /*
477 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
478 */
479 /* Check for 1000BASE-T. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500480 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
481 printf("PHY 1000BT status");
Larry Johnson966a80b2007-11-01 08:46:50 -0500482 goto miiphy_read_failed;
483 }
484 if (btsr != 0xFFFF) {
485 if (btsr & PHY_1000BTSR_1000FD) {
486 return FULL;
487 } else if (btsr & PHY_1000BTSR_1000HD) {
488 return HALF;
489 }
490 }
wdenkeec9a3d2004-03-23 23:20:24 +0000491#endif /* CONFIG_PHY_GIGE */
wdenked2ac4b2004-03-14 18:23:55 +0000492
wdenke3a06802004-06-06 23:13:55 +0000493 /* Check Basic Management Control Register first. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500494 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
495 puts("PHY duplex");
Larry Johnson966a80b2007-11-01 08:46:50 -0500496 goto miiphy_read_failed;
wdenkc6097192002-11-03 00:24:07 +0000497 }
wdenke3a06802004-06-06 23:13:55 +0000498 /* Check if auto-negotiation is on. */
Mike Frysingerd63ee712010-12-23 15:40:12 -0500499 if (bmcr & BMCR_ANENABLE) {
wdenke3a06802004-06-06 23:13:55 +0000500 /* Get auto-negotiation results. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500501 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
502 puts("PHY AN duplex");
Larry Johnson966a80b2007-11-01 08:46:50 -0500503 goto miiphy_read_failed;
wdenke3a06802004-06-06 23:13:55 +0000504 }
Dongpo Lice290242016-08-22 21:03:29 +0800505
506 if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) {
507 puts("PHY AN adv duplex");
508 goto miiphy_read_failed;
509 }
510 return ((anlpar & adv) & (LPA_10FULL | LPA_100FULL)) ?
Larry Johnson966a80b2007-11-01 08:46:50 -0500511 FULL : HALF;
wdenke3a06802004-06-06 23:13:55 +0000512 }
513 /* Get speed from basic control settings. */
Mike Frysingerd63ee712010-12-23 15:40:12 -0500514 return (bmcr & BMCR_FULLDPLX) ? FULL : HALF;
Larry Johnson966a80b2007-11-01 08:46:50 -0500515
Michael Zaidman6dbca5f2010-02-28 16:28:25 +0200516miiphy_read_failed:
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500517 printf(" read failed, assuming half duplex\n");
Larry Johnson966a80b2007-11-01 08:46:50 -0500518 return HALF;
519}
wdenke3a06802004-06-06 23:13:55 +0000520
Larry Johnson966a80b2007-11-01 08:46:50 -0500521/*****************************************************************************
522 *
523 * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
524 * 1000BASE-T, or on error.
525 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400526int miiphy_is_1000base_x(const char *devname, unsigned char addr)
Larry Johnson966a80b2007-11-01 08:46:50 -0500527{
528#if defined(CONFIG_PHY_GIGE)
529 u16 exsr;
530
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500531 if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) {
532 printf("PHY extended status read failed, assuming no "
Larry Johnson966a80b2007-11-01 08:46:50 -0500533 "1000BASE-X\n");
534 return 0;
535 }
Mike Frysingerd63ee712010-12-23 15:40:12 -0500536 return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH));
Larry Johnson966a80b2007-11-01 08:46:50 -0500537#else
538 return 0;
539#endif
wdenkc6097192002-11-03 00:24:07 +0000540}
541
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200542#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
wdenk49c3f672003-10-08 22:33:00 +0000543/*****************************************************************************
544 *
545 * Determine link status
546 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400547int miiphy_link(const char *devname, unsigned char addr)
wdenk49c3f672003-10-08 22:33:00 +0000548{
549 unsigned short reg;
550
wdenk145d2c12004-04-15 21:48:45 +0000551 /* dummy read; needed to latch some phys */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500552 (void)miiphy_read(devname, addr, MII_BMSR, &reg);
553 if (miiphy_read(devname, addr, MII_BMSR, &reg)) {
554 puts("MII_BMSR read failed, assuming no link\n");
555 return 0;
wdenk49c3f672003-10-08 22:33:00 +0000556 }
557
558 /* Determine if a link is active */
Mike Frysingerd63ee712010-12-23 15:40:12 -0500559 if ((reg & BMSR_LSTATUS) != 0) {
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500560 return 1;
wdenk49c3f672003-10-08 22:33:00 +0000561 } else {
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500562 return 0;
wdenk49c3f672003-10-08 22:33:00 +0000563 }
564}
565#endif