blob: b4483d00ad15e464d0d236b17f98219069c4cce5 [file] [log] [blame]
Michal Simek4b066a12018-08-22 14:55:27 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2014 - 2018 Xilinx, Inc.
Michal Simeka8c94362023-07-10 14:35:49 +02004 * Michal Simek <michal.simek@amd.com>
Michal Simek4b066a12018-08-22 14:55:27 +02005 */
6
Algapally Santosh Sagar3c351b22023-01-19 22:36:16 -07007#include <command.h>
Simon Glassafb02152019-12-28 10:45:01 -07008#include <cpu_func.h>
Venkatesh Yadav Abbarapu88990e92025-01-06 14:36:30 +05309#include <dfu.h>
Simon Glassed38aef2020-05-10 11:40:03 -060010#include <env.h>
Michal Simek4b066a12018-08-22 14:55:27 +020011#include <fdtdec.h>
Simon Glassa7b51302019-11-14 12:57:46 -070012#include <init.h>
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -070013#include <env_internal.h>
Simon Glass0f2af882020-05-10 11:40:05 -060014#include <log.h>
Michal Simek4b066a12018-08-22 14:55:27 +020015#include <malloc.h>
Michal Simek444a70e2024-10-25 13:56:08 +020016#include <memalign.h>
17#include <mmc.h>
Michal Simek754b53c2024-12-05 11:38:15 +010018#include <mtd.h>
Simon Glass495a5dc2019-11-14 12:57:30 -070019#include <time.h>
Simon Glass274e0b02020-05-10 11:39:56 -060020#include <asm/cache.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060021#include <asm/global_data.h>
Michal Simek4b066a12018-08-22 14:55:27 +020022#include <asm/io.h>
23#include <asm/arch/hardware.h>
Michal Simek21eb5cc2019-04-29 09:39:09 -070024#include <asm/arch/sys_proto.h>
Michal Simek444a70e2024-10-25 13:56:08 +020025#include <linux/sizes.h>
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +053026#include <dm/device.h>
27#include <dm/uclass.h>
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053028#include <versalpl.h>
Michal Simek705d44a2020-03-31 12:39:37 +020029#include "../common/board.h"
Michal Simek4b066a12018-08-22 14:55:27 +020030
31DECLARE_GLOBAL_DATA_PTR;
32
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053033#if defined(CONFIG_FPGA_VERSALPL)
Oleksandr Suvorovdae95a42022-07-22 17:16:04 +030034static xilinx_desc versalpl = {
35 xilinx_versal, csu_dma, 1, &versal_op, 0, &versal_op, NULL,
36 FPGA_LEGACY
37};
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053038#endif
39
Michal Simekfec54762025-01-06 10:20:40 +010040static u8 versal_get_bootmode(void)
41{
42 u8 bootmode;
43 u32 reg = 0;
44
45 reg = readl(&crp_base->boot_mode_usr);
46
47 if (reg >> BOOT_MODE_ALT_SHIFT)
48 reg >>= BOOT_MODE_ALT_SHIFT;
49
50 bootmode = reg & BOOT_MODES_MASK;
51
52 return bootmode;
53}
54
Michal Simek76fdafa2024-12-05 11:38:16 +010055static u32 versal_multi_boot(void)
56{
Michal Simekfec54762025-01-06 10:20:40 +010057 u8 bootmode = versal_get_bootmode();
58
59 /* Mostly workaround for QEMU CI pipeline */
60 if (bootmode == JTAG_MODE)
61 return 0;
62
Michal Simek76fdafa2024-12-05 11:38:16 +010063 return readl(0xF1110004);
64}
65
Michal Simek4b066a12018-08-22 14:55:27 +020066int board_init(void)
67{
68 printf("EL Level:\tEL%d\n", current_el());
Michal Simek76fdafa2024-12-05 11:38:16 +010069 printf("Multiboot:\t%d\n", versal_multi_boot());
Michal Simek4b066a12018-08-22 14:55:27 +020070
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053071#if defined(CONFIG_FPGA_VERSALPL)
72 fpga_init();
73 fpga_add(fpga_xilinx, &versalpl);
74#endif
75
Michal Simek394ee242020-08-03 13:01:45 +020076 if (CONFIG_IS_ENABLED(DM_I2C) && CONFIG_IS_ENABLED(I2C_EEPROM))
77 xilinx_read_eeprom();
78
Michal Simek4b066a12018-08-22 14:55:27 +020079 return 0;
80}
81
82int board_early_init_r(void)
83{
Michal Simek19f6c972019-01-28 11:08:00 +010084 u32 val;
Michal Simek4b066a12018-08-22 14:55:27 +020085
Michal Simek19f6c972019-01-28 11:08:00 +010086 if (current_el() != 3)
87 return 0;
Michal Simek4b066a12018-08-22 14:55:27 +020088
Michal Simekf56f7d12019-01-28 11:12:41 +010089 debug("iou_switch ctrl div0 %x\n",
90 readl(&crlapb_base->iou_switch_ctrl));
91
Michal Simek19f6c972019-01-28 11:08:00 +010092 writel(IOU_SWITCH_CTRL_CLKACT_BIT |
Michal Simekf56f7d12019-01-28 11:12:41 +010093 (CONFIG_IOU_SWITCH_DIVISOR0 << IOU_SWITCH_CTRL_DIVISOR0_SHIFT),
Michal Simek19f6c972019-01-28 11:08:00 +010094 &crlapb_base->iou_switch_ctrl);
Michal Simek4b066a12018-08-22 14:55:27 +020095
Michal Simek19f6c972019-01-28 11:08:00 +010096 /* Global timer init - Program time stamp reference clk */
97 val = readl(&crlapb_base->timestamp_ref_ctrl);
98 val |= CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT;
99 writel(val, &crlapb_base->timestamp_ref_ctrl);
Michal Simek4b066a12018-08-22 14:55:27 +0200100
Michal Simek19f6c972019-01-28 11:08:00 +0100101 debug("ref ctrl 0x%x\n",
102 readl(&crlapb_base->timestamp_ref_ctrl));
Michal Simek4b066a12018-08-22 14:55:27 +0200103
Michal Simek19f6c972019-01-28 11:08:00 +0100104 /* Clear reset of timestamp reg */
105 writel(0, &crlapb_base->rst_timestamp);
Michal Simek4b066a12018-08-22 14:55:27 +0200106
Michal Simek19f6c972019-01-28 11:08:00 +0100107 /*
108 * Program freq register in System counter and
109 * enable system counter.
110 */
Peng Fan4b3a1822022-04-13 17:47:17 +0800111 writel(CONFIG_COUNTER_FREQUENCY,
Michal Simek19f6c972019-01-28 11:08:00 +0100112 &iou_scntr_secure->base_frequency_id_register);
Michal Simek4b066a12018-08-22 14:55:27 +0200113
Michal Simek19f6c972019-01-28 11:08:00 +0100114 debug("counter val 0x%x\n",
115 readl(&iou_scntr_secure->base_frequency_id_register));
116
117 writel(IOU_SCNTRS_CONTROL_EN,
118 &iou_scntr_secure->counter_control_register);
Michal Simek4b066a12018-08-22 14:55:27 +0200119
Michal Simek19f6c972019-01-28 11:08:00 +0100120 debug("scntrs control 0x%x\n",
121 readl(&iou_scntr_secure->counter_control_register));
122 debug("timer 0x%llx\n", get_ticks());
123 debug("timer 0x%llx\n", get_ticks());
Michal Simek4b066a12018-08-22 14:55:27 +0200124
125 return 0;
126}
127
Ashok Reddy Soma6c191052022-05-05 23:53:45 -0600128unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc,
129 char *const argv[])
130{
131 int ret = 0;
132
133 if (current_el() > 1) {
134 smp_kick_all_cpus();
135 dcache_disable();
136 armv8_switch_to_el1(0x0, 0, 0, 0, (unsigned long)entry,
137 ES_TO_AARCH64);
138 } else {
139 printf("FAIL: current EL is not above EL1\n");
140 ret = EINVAL;
141 }
142 return ret;
143}
144
Michal Simekb1634762023-09-05 13:30:07 +0200145static int boot_targets_setup(void)
Michal Simek9c91e612020-04-08 11:04:41 +0200146{
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530147 u8 bootmode;
148 struct udevice *dev;
149 int bootseq = -1;
150 int bootseq_len = 0;
151 int env_targets_len = 0;
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530152 const char *mode = NULL;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530153 char *new_targets;
154 char *env_targets;
155
Michal Simek9c91e612020-04-08 11:04:41 +0200156 bootmode = versal_get_bootmode();
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530157
158 puts("Bootmode: ");
159 switch (bootmode) {
T Karthik Reddyfacca9a2019-07-11 16:07:57 +0530160 case USB_MODE:
161 puts("USB_MODE\n");
T Karthik Reddy1104faf2021-03-30 23:24:57 -0600162 mode = "usb_dfu0 usb_dfu1";
T Karthik Reddyfacca9a2019-07-11 16:07:57 +0530163 break;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530164 case JTAG_MODE:
165 puts("JTAG_MODE\n");
Siva Durga Prasad Paladugu00784e02019-06-25 17:13:14 +0530166 mode = "jtag pxe dhcp";
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530167 break;
168 case QSPI_MODE_24BIT:
169 puts("QSPI_MODE_24\n");
Venkatesh Yadav Abbarapubf6e0412024-05-10 08:22:38 +0200170 if (uclass_get_device_by_name(UCLASS_SPI,
171 "spi@f1030000", &dev)) {
172 debug("QSPI driver for QSPI device is not present\n");
173 break;
174 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530175 mode = "xspi0";
176 break;
177 case QSPI_MODE_32BIT:
178 puts("QSPI_MODE_32\n");
Venkatesh Yadav Abbarapubf6e0412024-05-10 08:22:38 +0200179 if (uclass_get_device_by_name(UCLASS_SPI,
180 "spi@f1030000", &dev)) {
181 debug("QSPI driver for QSPI device is not present\n");
182 break;
183 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530184 mode = "xspi0";
185 break;
186 case OSPI_MODE:
187 puts("OSPI_MODE\n");
Venkatesh Yadav Abbarapubf6e0412024-05-10 08:22:38 +0200188 if (uclass_get_device_by_name(UCLASS_SPI,
189 "spi@f1010000", &dev)) {
190 debug("OSPI driver for OSPI device is not present\n");
191 break;
192 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530193 mode = "xspi0";
194 break;
195 case EMMC_MODE:
196 puts("EMMC_MODE\n");
T Karthik Reddybc2b9642019-12-16 04:44:26 -0700197 if (uclass_get_device_by_name(UCLASS_MMC,
T Karthik Reddya12445f2021-11-18 12:57:20 +0100198 "mmc@f1050000", &dev) &&
199 uclass_get_device_by_name(UCLASS_MMC,
T Karthik Reddybc2b9642019-12-16 04:44:26 -0700200 "sdhci@f1050000", &dev)) {
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530201 debug("SD1 driver for SD1 device is not present\n");
202 break;
T Karthik Reddybc2b9642019-12-16 04:44:26 -0700203 }
Simon Glass75e534b2020-12-16 21:20:07 -0700204 debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev));
T Karthik Reddybc2b9642019-12-16 04:44:26 -0700205 mode = "mmc";
Simon Glass75e534b2020-12-16 21:20:07 -0700206 bootseq = dev_seq(dev);
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530207 break;
Polak, Leszekcddfc132023-10-08 14:34:42 +0000208 case SELECTMAP_MODE:
209 puts("SELECTMAP_MODE\n");
210 break;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530211 case SD_MODE:
212 puts("SD_MODE\n");
213 if (uclass_get_device_by_name(UCLASS_MMC,
T Karthik Reddya12445f2021-11-18 12:57:20 +0100214 "mmc@f1040000", &dev) &&
215 uclass_get_device_by_name(UCLASS_MMC,
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530216 "sdhci@f1040000", &dev)) {
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530217 debug("SD0 driver for SD0 device is not present\n");
218 break;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530219 }
Simon Glass75e534b2020-12-16 21:20:07 -0700220 debug("mmc0 device found at %p, seq %d\n", dev, dev_seq(dev));
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530221
222 mode = "mmc";
Simon Glass75e534b2020-12-16 21:20:07 -0700223 bootseq = dev_seq(dev);
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530224 break;
225 case SD1_LSHFT_MODE:
226 puts("LVL_SHFT_");
227 /* fall through */
228 case SD_MODE1:
229 puts("SD_MODE1\n");
230 if (uclass_get_device_by_name(UCLASS_MMC,
T Karthik Reddya12445f2021-11-18 12:57:20 +0100231 "mmc@f1050000", &dev) &&
232 uclass_get_device_by_name(UCLASS_MMC,
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530233 "sdhci@f1050000", &dev)) {
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530234 debug("SD1 driver for SD1 device is not present\n");
235 break;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530236 }
Simon Glass75e534b2020-12-16 21:20:07 -0700237 debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev));
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530238
239 mode = "mmc";
Simon Glass75e534b2020-12-16 21:20:07 -0700240 bootseq = dev_seq(dev);
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530241 break;
242 default:
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530243 printf("Invalid Boot Mode:0x%x\n", bootmode);
244 break;
245 }
246
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530247 if (mode) {
248 if (bootseq >= 0) {
249 bootseq_len = snprintf(NULL, 0, "%i", bootseq);
250 debug("Bootseq len: %x\n", bootseq_len);
251 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530252
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530253 /*
254 * One terminating char + one byte for space between mode
255 * and default boot_targets
256 */
257 env_targets = env_get("boot_targets");
258 if (env_targets)
259 env_targets_len = strlen(env_targets);
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530260
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530261 new_targets = calloc(1, strlen(mode) + env_targets_len + 2 +
262 bootseq_len);
263 if (!new_targets)
264 return -ENOMEM;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530265
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530266 if (bootseq >= 0)
267 sprintf(new_targets, "%s%x %s", mode, bootseq,
268 env_targets ? env_targets : "");
269 else
270 sprintf(new_targets, "%s %s", mode,
271 env_targets ? env_targets : "");
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530272
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530273 env_set("boot_targets", new_targets);
274 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530275
Michal Simekb1634762023-09-05 13:30:07 +0200276 return 0;
277}
278
279int board_late_init(void)
280{
281 int ret;
282
283 if (!(gd->flags & GD_FLG_ENV_DEFAULT)) {
284 debug("Saved variables - Skipping\n");
285 return 0;
286 }
287
288 if (!IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG))
289 return 0;
290
291 if (IS_ENABLED(CONFIG_DISTRO_DEFAULTS)) {
292 ret = boot_targets_setup();
293 if (ret)
294 return ret;
295 }
296
Michal Simek705d44a2020-03-31 12:39:37 +0200297 return board_late_init_xilinx();
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530298}
299
Michal Simek4b066a12018-08-22 14:55:27 +0200300int dram_init_banksize(void)
301{
Michal Simek21eb5cc2019-04-29 09:39:09 -0700302 int ret;
303
304 ret = fdtdec_setup_memory_banksize();
305 if (ret)
306 return ret;
307
308 mem_map_fill();
Michal Simek4b066a12018-08-22 14:55:27 +0200309
310 return 0;
311}
312
313int dram_init(void)
314{
Michal Simek9134d4c2020-07-10 12:42:09 +0200315 if (fdtdec_setup_mem_size_base_lowest() != 0)
Michal Simek4b066a12018-08-22 14:55:27 +0200316 return -EINVAL;
317
318 return 0;
319}
320
Michal Simekc1e98aa2024-10-25 13:56:07 +0200321#if !CONFIG_IS_ENABLED(SYSRESET)
Harald Seiler6f14d5f2020-12-15 16:47:52 +0100322void reset_cpu(void)
Michal Simek4b066a12018-08-22 14:55:27 +0200323{
324}
Michal Simekc1e98aa2024-10-25 13:56:07 +0200325#endif
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700326
Michal Simekf3a541f2024-03-22 12:43:17 +0100327#if defined(CONFIG_ENV_IS_NOWHERE)
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700328enum env_location env_get_location(enum env_operation op, int prio)
329{
330 u32 bootmode = versal_get_bootmode();
331
332 if (prio)
333 return ENVL_UNKNOWN;
334
335 switch (bootmode) {
336 case EMMC_MODE:
337 case SD_MODE:
338 case SD1_LSHFT_MODE:
339 case SD_MODE1:
340 if (IS_ENABLED(CONFIG_ENV_IS_IN_FAT))
341 return ENVL_FAT;
342 if (IS_ENABLED(CONFIG_ENV_IS_IN_EXT4))
343 return ENVL_EXT4;
T Karthik Reddy6f8b2052021-11-24 12:16:55 +0100344 return ENVL_NOWHERE;
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700345 case OSPI_MODE:
346 case QSPI_MODE_24BIT:
347 case QSPI_MODE_32BIT:
348 if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH))
349 return ENVL_SPI_FLASH;
T Karthik Reddy6f8b2052021-11-24 12:16:55 +0100350 return ENVL_NOWHERE;
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700351 case JTAG_MODE:
Polak, Leszekcddfc132023-10-08 14:34:42 +0000352 case SELECTMAP_MODE:
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700353 default:
354 return ENVL_NOWHERE;
355 }
356}
Michal Simekf3a541f2024-03-22 12:43:17 +0100357#endif
Michal Simek444a70e2024-10-25 13:56:08 +0200358
359#if defined(CONFIG_SET_DFU_ALT_INFO)
360
361#define DFU_ALT_BUF_LEN SZ_1K
362
Michal Simek754b53c2024-12-05 11:38:15 +0100363static void mtd_found_part(u32 *base, u32 *size)
364{
365 struct mtd_info *part, *mtd;
366
367 mtd_probe_devices();
368
369 mtd = get_mtd_device_nm("nor0");
370 if (!IS_ERR_OR_NULL(mtd)) {
371 list_for_each_entry(part, &mtd->partitions, node) {
372 debug("0x%012llx-0x%012llx : \"%s\"\n",
373 part->offset, part->offset + part->size,
374 part->name);
375
376 if (*base >= part->offset &&
377 *base < part->offset + part->size) {
378 debug("Found my partition: %d/%s\n",
379 part->index, part->name);
380 *base = part->offset;
381 *size = part->size;
382 break;
383 }
384 }
385 }
386}
387
Michal Simek444a70e2024-10-25 13:56:08 +0200388void set_dfu_alt_info(char *interface, char *devstr)
389{
390 int bootseq = 0, len = 0;
Michal Simek76fdafa2024-12-05 11:38:16 +0100391 u32 multiboot = versal_multi_boot();
Michal Simek444a70e2024-10-25 13:56:08 +0200392 u32 bootmode = versal_get_bootmode();
393
394 ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN);
395
396 if (env_get("dfu_alt_info"))
397 return;
398
399 memset(buf, 0, sizeof(buf));
400
Michal Simek76fdafa2024-12-05 11:38:16 +0100401 multiboot = env_get_hex("multiboot", multiboot);
402
Michal Simek444a70e2024-10-25 13:56:08 +0200403 switch (bootmode) {
404 case EMMC_MODE:
405 case SD_MODE:
406 case SD1_LSHFT_MODE:
407 case SD_MODE1:
408 bootseq = mmc_get_env_dev();
409
410 len += snprintf(buf + len, DFU_ALT_BUF_LEN, "mmc %d=boot",
411 bootseq);
412
Michal Simek76fdafa2024-12-05 11:38:16 +0100413 if (multiboot)
414 len += snprintf(buf + len, DFU_ALT_BUF_LEN,
415 "%04d", multiboot);
416
Michal Simek444a70e2024-10-25 13:56:08 +0200417 len += snprintf(buf + len, DFU_ALT_BUF_LEN, ".bin fat %d 1",
418 bootseq);
419 break;
Michal Simek754b53c2024-12-05 11:38:15 +0100420 case QSPI_MODE_24BIT:
421 case QSPI_MODE_32BIT:
422 case OSPI_MODE:
423 {
Michal Simek76fdafa2024-12-05 11:38:16 +0100424 u32 base = multiboot * SZ_32K;
Michal Simek754b53c2024-12-05 11:38:15 +0100425 u32 size = 0x1500000;
426 u32 limit = size;
427
428 mtd_found_part(&base, &limit);
429
430 len += snprintf(buf + len, DFU_ALT_BUF_LEN,
431 "sf 0:0=boot.bin raw 0x%x 0x%x",
432 base, limit);
433 }
434 break;
Michal Simek444a70e2024-10-25 13:56:08 +0200435 default:
436 return;
437 }
438
439 env_set("dfu_alt_info", buf);
440 puts("DFU alt info setting: done\n");
441}
442#endif