blob: d05220f96ffd186926dfac4a85891a40f7ebe575 [file] [log] [blame]
Michal Simek4b066a12018-08-22 14:55:27 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2014 - 2018 Xilinx, Inc.
Michal Simeka8c94362023-07-10 14:35:49 +02004 * Michal Simek <michal.simek@amd.com>
Michal Simek4b066a12018-08-22 14:55:27 +02005 */
6
Algapally Santosh Sagar3c351b22023-01-19 22:36:16 -07007#include <command.h>
Simon Glassafb02152019-12-28 10:45:01 -07008#include <cpu_func.h>
Simon Glassed38aef2020-05-10 11:40:03 -06009#include <env.h>
Michal Simek4b066a12018-08-22 14:55:27 +020010#include <fdtdec.h>
Simon Glassa7b51302019-11-14 12:57:46 -070011#include <init.h>
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -070012#include <env_internal.h>
Simon Glass0f2af882020-05-10 11:40:05 -060013#include <log.h>
Michal Simek4b066a12018-08-22 14:55:27 +020014#include <malloc.h>
Michal Simek444a70e2024-10-25 13:56:08 +020015#include <memalign.h>
16#include <mmc.h>
Michal Simek754b53c2024-12-05 11:38:15 +010017#include <mtd.h>
Simon Glass495a5dc2019-11-14 12:57:30 -070018#include <time.h>
Simon Glass274e0b02020-05-10 11:39:56 -060019#include <asm/cache.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060020#include <asm/global_data.h>
Michal Simek4b066a12018-08-22 14:55:27 +020021#include <asm/io.h>
22#include <asm/arch/hardware.h>
Michal Simek21eb5cc2019-04-29 09:39:09 -070023#include <asm/arch/sys_proto.h>
Michal Simek444a70e2024-10-25 13:56:08 +020024#include <linux/sizes.h>
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +053025#include <dm/device.h>
26#include <dm/uclass.h>
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053027#include <versalpl.h>
Michal Simek705d44a2020-03-31 12:39:37 +020028#include "../common/board.h"
Michal Simek4b066a12018-08-22 14:55:27 +020029
30DECLARE_GLOBAL_DATA_PTR;
31
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053032#if defined(CONFIG_FPGA_VERSALPL)
Oleksandr Suvorovdae95a42022-07-22 17:16:04 +030033static xilinx_desc versalpl = {
34 xilinx_versal, csu_dma, 1, &versal_op, 0, &versal_op, NULL,
35 FPGA_LEGACY
36};
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053037#endif
38
Michal Simek76fdafa2024-12-05 11:38:16 +010039static u32 versal_multi_boot(void)
40{
41 return readl(0xF1110004);
42}
43
Michal Simek4b066a12018-08-22 14:55:27 +020044int board_init(void)
45{
46 printf("EL Level:\tEL%d\n", current_el());
Michal Simek76fdafa2024-12-05 11:38:16 +010047 printf("Multiboot:\t%d\n", versal_multi_boot());
Michal Simek4b066a12018-08-22 14:55:27 +020048
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053049#if defined(CONFIG_FPGA_VERSALPL)
50 fpga_init();
51 fpga_add(fpga_xilinx, &versalpl);
52#endif
53
Michal Simek394ee242020-08-03 13:01:45 +020054 if (CONFIG_IS_ENABLED(DM_I2C) && CONFIG_IS_ENABLED(I2C_EEPROM))
55 xilinx_read_eeprom();
56
Michal Simek4b066a12018-08-22 14:55:27 +020057 return 0;
58}
59
60int board_early_init_r(void)
61{
Michal Simek19f6c972019-01-28 11:08:00 +010062 u32 val;
Michal Simek4b066a12018-08-22 14:55:27 +020063
Michal Simek19f6c972019-01-28 11:08:00 +010064 if (current_el() != 3)
65 return 0;
Michal Simek4b066a12018-08-22 14:55:27 +020066
Michal Simekf56f7d12019-01-28 11:12:41 +010067 debug("iou_switch ctrl div0 %x\n",
68 readl(&crlapb_base->iou_switch_ctrl));
69
Michal Simek19f6c972019-01-28 11:08:00 +010070 writel(IOU_SWITCH_CTRL_CLKACT_BIT |
Michal Simekf56f7d12019-01-28 11:12:41 +010071 (CONFIG_IOU_SWITCH_DIVISOR0 << IOU_SWITCH_CTRL_DIVISOR0_SHIFT),
Michal Simek19f6c972019-01-28 11:08:00 +010072 &crlapb_base->iou_switch_ctrl);
Michal Simek4b066a12018-08-22 14:55:27 +020073
Michal Simek19f6c972019-01-28 11:08:00 +010074 /* Global timer init - Program time stamp reference clk */
75 val = readl(&crlapb_base->timestamp_ref_ctrl);
76 val |= CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT;
77 writel(val, &crlapb_base->timestamp_ref_ctrl);
Michal Simek4b066a12018-08-22 14:55:27 +020078
Michal Simek19f6c972019-01-28 11:08:00 +010079 debug("ref ctrl 0x%x\n",
80 readl(&crlapb_base->timestamp_ref_ctrl));
Michal Simek4b066a12018-08-22 14:55:27 +020081
Michal Simek19f6c972019-01-28 11:08:00 +010082 /* Clear reset of timestamp reg */
83 writel(0, &crlapb_base->rst_timestamp);
Michal Simek4b066a12018-08-22 14:55:27 +020084
Michal Simek19f6c972019-01-28 11:08:00 +010085 /*
86 * Program freq register in System counter and
87 * enable system counter.
88 */
Peng Fan4b3a1822022-04-13 17:47:17 +080089 writel(CONFIG_COUNTER_FREQUENCY,
Michal Simek19f6c972019-01-28 11:08:00 +010090 &iou_scntr_secure->base_frequency_id_register);
Michal Simek4b066a12018-08-22 14:55:27 +020091
Michal Simek19f6c972019-01-28 11:08:00 +010092 debug("counter val 0x%x\n",
93 readl(&iou_scntr_secure->base_frequency_id_register));
94
95 writel(IOU_SCNTRS_CONTROL_EN,
96 &iou_scntr_secure->counter_control_register);
Michal Simek4b066a12018-08-22 14:55:27 +020097
Michal Simek19f6c972019-01-28 11:08:00 +010098 debug("scntrs control 0x%x\n",
99 readl(&iou_scntr_secure->counter_control_register));
100 debug("timer 0x%llx\n", get_ticks());
101 debug("timer 0x%llx\n", get_ticks());
Michal Simek4b066a12018-08-22 14:55:27 +0200102
103 return 0;
104}
105
Ashok Reddy Soma6c191052022-05-05 23:53:45 -0600106unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc,
107 char *const argv[])
108{
109 int ret = 0;
110
111 if (current_el() > 1) {
112 smp_kick_all_cpus();
113 dcache_disable();
114 armv8_switch_to_el1(0x0, 0, 0, 0, (unsigned long)entry,
115 ES_TO_AARCH64);
116 } else {
117 printf("FAIL: current EL is not above EL1\n");
118 ret = EINVAL;
119 }
120 return ret;
121}
122
Michal Simek9c91e612020-04-08 11:04:41 +0200123static u8 versal_get_bootmode(void)
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530124{
Michal Simek9c91e612020-04-08 11:04:41 +0200125 u8 bootmode;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530126 u32 reg = 0;
Michal Simek9c91e612020-04-08 11:04:41 +0200127
128 reg = readl(&crp_base->boot_mode_usr);
129
130 if (reg >> BOOT_MODE_ALT_SHIFT)
131 reg >>= BOOT_MODE_ALT_SHIFT;
132
133 bootmode = reg & BOOT_MODES_MASK;
134
135 return bootmode;
136}
137
Michal Simekb1634762023-09-05 13:30:07 +0200138static int boot_targets_setup(void)
Michal Simek9c91e612020-04-08 11:04:41 +0200139{
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530140 u8 bootmode;
141 struct udevice *dev;
142 int bootseq = -1;
143 int bootseq_len = 0;
144 int env_targets_len = 0;
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530145 const char *mode = NULL;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530146 char *new_targets;
147 char *env_targets;
148
Michal Simek9c91e612020-04-08 11:04:41 +0200149 bootmode = versal_get_bootmode();
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530150
151 puts("Bootmode: ");
152 switch (bootmode) {
T Karthik Reddyfacca9a2019-07-11 16:07:57 +0530153 case USB_MODE:
154 puts("USB_MODE\n");
T Karthik Reddy1104faf2021-03-30 23:24:57 -0600155 mode = "usb_dfu0 usb_dfu1";
T Karthik Reddyfacca9a2019-07-11 16:07:57 +0530156 break;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530157 case JTAG_MODE:
158 puts("JTAG_MODE\n");
Siva Durga Prasad Paladugu00784e02019-06-25 17:13:14 +0530159 mode = "jtag pxe dhcp";
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530160 break;
161 case QSPI_MODE_24BIT:
162 puts("QSPI_MODE_24\n");
Venkatesh Yadav Abbarapubf6e0412024-05-10 08:22:38 +0200163 if (uclass_get_device_by_name(UCLASS_SPI,
164 "spi@f1030000", &dev)) {
165 debug("QSPI driver for QSPI device is not present\n");
166 break;
167 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530168 mode = "xspi0";
169 break;
170 case QSPI_MODE_32BIT:
171 puts("QSPI_MODE_32\n");
Venkatesh Yadav Abbarapubf6e0412024-05-10 08:22:38 +0200172 if (uclass_get_device_by_name(UCLASS_SPI,
173 "spi@f1030000", &dev)) {
174 debug("QSPI driver for QSPI device is not present\n");
175 break;
176 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530177 mode = "xspi0";
178 break;
179 case OSPI_MODE:
180 puts("OSPI_MODE\n");
Venkatesh Yadav Abbarapubf6e0412024-05-10 08:22:38 +0200181 if (uclass_get_device_by_name(UCLASS_SPI,
182 "spi@f1010000", &dev)) {
183 debug("OSPI driver for OSPI device is not present\n");
184 break;
185 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530186 mode = "xspi0";
187 break;
188 case EMMC_MODE:
189 puts("EMMC_MODE\n");
T Karthik Reddybc2b9642019-12-16 04:44:26 -0700190 if (uclass_get_device_by_name(UCLASS_MMC,
T Karthik Reddya12445f2021-11-18 12:57:20 +0100191 "mmc@f1050000", &dev) &&
192 uclass_get_device_by_name(UCLASS_MMC,
T Karthik Reddybc2b9642019-12-16 04:44:26 -0700193 "sdhci@f1050000", &dev)) {
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530194 debug("SD1 driver for SD1 device is not present\n");
195 break;
T Karthik Reddybc2b9642019-12-16 04:44:26 -0700196 }
Simon Glass75e534b2020-12-16 21:20:07 -0700197 debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev));
T Karthik Reddybc2b9642019-12-16 04:44:26 -0700198 mode = "mmc";
Simon Glass75e534b2020-12-16 21:20:07 -0700199 bootseq = dev_seq(dev);
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530200 break;
Polak, Leszekcddfc132023-10-08 14:34:42 +0000201 case SELECTMAP_MODE:
202 puts("SELECTMAP_MODE\n");
203 break;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530204 case SD_MODE:
205 puts("SD_MODE\n");
206 if (uclass_get_device_by_name(UCLASS_MMC,
T Karthik Reddya12445f2021-11-18 12:57:20 +0100207 "mmc@f1040000", &dev) &&
208 uclass_get_device_by_name(UCLASS_MMC,
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530209 "sdhci@f1040000", &dev)) {
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530210 debug("SD0 driver for SD0 device is not present\n");
211 break;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530212 }
Simon Glass75e534b2020-12-16 21:20:07 -0700213 debug("mmc0 device found at %p, seq %d\n", dev, dev_seq(dev));
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530214
215 mode = "mmc";
Simon Glass75e534b2020-12-16 21:20:07 -0700216 bootseq = dev_seq(dev);
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530217 break;
218 case SD1_LSHFT_MODE:
219 puts("LVL_SHFT_");
220 /* fall through */
221 case SD_MODE1:
222 puts("SD_MODE1\n");
223 if (uclass_get_device_by_name(UCLASS_MMC,
T Karthik Reddya12445f2021-11-18 12:57:20 +0100224 "mmc@f1050000", &dev) &&
225 uclass_get_device_by_name(UCLASS_MMC,
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530226 "sdhci@f1050000", &dev)) {
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530227 debug("SD1 driver for SD1 device is not present\n");
228 break;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530229 }
Simon Glass75e534b2020-12-16 21:20:07 -0700230 debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev));
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530231
232 mode = "mmc";
Simon Glass75e534b2020-12-16 21:20:07 -0700233 bootseq = dev_seq(dev);
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530234 break;
235 default:
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530236 printf("Invalid Boot Mode:0x%x\n", bootmode);
237 break;
238 }
239
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530240 if (mode) {
241 if (bootseq >= 0) {
242 bootseq_len = snprintf(NULL, 0, "%i", bootseq);
243 debug("Bootseq len: %x\n", bootseq_len);
244 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530245
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530246 /*
247 * One terminating char + one byte for space between mode
248 * and default boot_targets
249 */
250 env_targets = env_get("boot_targets");
251 if (env_targets)
252 env_targets_len = strlen(env_targets);
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530253
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530254 new_targets = calloc(1, strlen(mode) + env_targets_len + 2 +
255 bootseq_len);
256 if (!new_targets)
257 return -ENOMEM;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530258
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530259 if (bootseq >= 0)
260 sprintf(new_targets, "%s%x %s", mode, bootseq,
261 env_targets ? env_targets : "");
262 else
263 sprintf(new_targets, "%s %s", mode,
264 env_targets ? env_targets : "");
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530265
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530266 env_set("boot_targets", new_targets);
267 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530268
Michal Simekb1634762023-09-05 13:30:07 +0200269 return 0;
270}
271
272int board_late_init(void)
273{
274 int ret;
275
276 if (!(gd->flags & GD_FLG_ENV_DEFAULT)) {
277 debug("Saved variables - Skipping\n");
278 return 0;
279 }
280
281 if (!IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG))
282 return 0;
283
284 if (IS_ENABLED(CONFIG_DISTRO_DEFAULTS)) {
285 ret = boot_targets_setup();
286 if (ret)
287 return ret;
288 }
289
Michal Simek705d44a2020-03-31 12:39:37 +0200290 return board_late_init_xilinx();
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530291}
292
Michal Simek4b066a12018-08-22 14:55:27 +0200293int dram_init_banksize(void)
294{
Michal Simek21eb5cc2019-04-29 09:39:09 -0700295 int ret;
296
297 ret = fdtdec_setup_memory_banksize();
298 if (ret)
299 return ret;
300
301 mem_map_fill();
Michal Simek4b066a12018-08-22 14:55:27 +0200302
303 return 0;
304}
305
306int dram_init(void)
307{
Michal Simek9134d4c2020-07-10 12:42:09 +0200308 if (fdtdec_setup_mem_size_base_lowest() != 0)
Michal Simek4b066a12018-08-22 14:55:27 +0200309 return -EINVAL;
310
311 return 0;
312}
313
Michal Simekc1e98aa2024-10-25 13:56:07 +0200314#if !CONFIG_IS_ENABLED(SYSRESET)
Harald Seiler6f14d5f2020-12-15 16:47:52 +0100315void reset_cpu(void)
Michal Simek4b066a12018-08-22 14:55:27 +0200316{
317}
Michal Simekc1e98aa2024-10-25 13:56:07 +0200318#endif
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700319
Michal Simekf3a541f2024-03-22 12:43:17 +0100320#if defined(CONFIG_ENV_IS_NOWHERE)
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700321enum env_location env_get_location(enum env_operation op, int prio)
322{
323 u32 bootmode = versal_get_bootmode();
324
325 if (prio)
326 return ENVL_UNKNOWN;
327
328 switch (bootmode) {
329 case EMMC_MODE:
330 case SD_MODE:
331 case SD1_LSHFT_MODE:
332 case SD_MODE1:
333 if (IS_ENABLED(CONFIG_ENV_IS_IN_FAT))
334 return ENVL_FAT;
335 if (IS_ENABLED(CONFIG_ENV_IS_IN_EXT4))
336 return ENVL_EXT4;
T Karthik Reddy6f8b2052021-11-24 12:16:55 +0100337 return ENVL_NOWHERE;
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700338 case OSPI_MODE:
339 case QSPI_MODE_24BIT:
340 case QSPI_MODE_32BIT:
341 if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH))
342 return ENVL_SPI_FLASH;
T Karthik Reddy6f8b2052021-11-24 12:16:55 +0100343 return ENVL_NOWHERE;
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700344 case JTAG_MODE:
Polak, Leszekcddfc132023-10-08 14:34:42 +0000345 case SELECTMAP_MODE:
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700346 default:
347 return ENVL_NOWHERE;
348 }
349}
Michal Simekf3a541f2024-03-22 12:43:17 +0100350#endif
Michal Simek444a70e2024-10-25 13:56:08 +0200351
352#if defined(CONFIG_SET_DFU_ALT_INFO)
353
354#define DFU_ALT_BUF_LEN SZ_1K
355
Michal Simek754b53c2024-12-05 11:38:15 +0100356static void mtd_found_part(u32 *base, u32 *size)
357{
358 struct mtd_info *part, *mtd;
359
360 mtd_probe_devices();
361
362 mtd = get_mtd_device_nm("nor0");
363 if (!IS_ERR_OR_NULL(mtd)) {
364 list_for_each_entry(part, &mtd->partitions, node) {
365 debug("0x%012llx-0x%012llx : \"%s\"\n",
366 part->offset, part->offset + part->size,
367 part->name);
368
369 if (*base >= part->offset &&
370 *base < part->offset + part->size) {
371 debug("Found my partition: %d/%s\n",
372 part->index, part->name);
373 *base = part->offset;
374 *size = part->size;
375 break;
376 }
377 }
378 }
379}
380
Michal Simek444a70e2024-10-25 13:56:08 +0200381void set_dfu_alt_info(char *interface, char *devstr)
382{
383 int bootseq = 0, len = 0;
Michal Simek76fdafa2024-12-05 11:38:16 +0100384 u32 multiboot = versal_multi_boot();
Michal Simek444a70e2024-10-25 13:56:08 +0200385 u32 bootmode = versal_get_bootmode();
386
387 ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN);
388
389 if (env_get("dfu_alt_info"))
390 return;
391
392 memset(buf, 0, sizeof(buf));
393
Michal Simek76fdafa2024-12-05 11:38:16 +0100394 multiboot = env_get_hex("multiboot", multiboot);
395
Michal Simek444a70e2024-10-25 13:56:08 +0200396 switch (bootmode) {
397 case EMMC_MODE:
398 case SD_MODE:
399 case SD1_LSHFT_MODE:
400 case SD_MODE1:
401 bootseq = mmc_get_env_dev();
402
403 len += snprintf(buf + len, DFU_ALT_BUF_LEN, "mmc %d=boot",
404 bootseq);
405
Michal Simek76fdafa2024-12-05 11:38:16 +0100406 if (multiboot)
407 len += snprintf(buf + len, DFU_ALT_BUF_LEN,
408 "%04d", multiboot);
409
Michal Simek444a70e2024-10-25 13:56:08 +0200410 len += snprintf(buf + len, DFU_ALT_BUF_LEN, ".bin fat %d 1",
411 bootseq);
412 break;
Michal Simek754b53c2024-12-05 11:38:15 +0100413 case QSPI_MODE_24BIT:
414 case QSPI_MODE_32BIT:
415 case OSPI_MODE:
416 {
Michal Simek76fdafa2024-12-05 11:38:16 +0100417 u32 base = multiboot * SZ_32K;
Michal Simek754b53c2024-12-05 11:38:15 +0100418 u32 size = 0x1500000;
419 u32 limit = size;
420
421 mtd_found_part(&base, &limit);
422
423 len += snprintf(buf + len, DFU_ALT_BUF_LEN,
424 "sf 0:0=boot.bin raw 0x%x 0x%x",
425 base, limit);
426 }
427 break;
Michal Simek444a70e2024-10-25 13:56:08 +0200428 default:
429 return;
430 }
431
432 env_set("dfu_alt_info", buf);
433 puts("DFU alt info setting: done\n");
434}
435#endif