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git01.mediatek.com / filogic / uboot / bf7c0cee160adfa8cbea76491b51fb492d1bf9ba / . / arch / arm / dts / k3-j7200-r5-common-proc-board.dts
blob: ecb1dd49c648baf82d2c650cbba8babc651ea452 [file] [log] [blame]
Dave Gerlachfe506932020-08-05 22:44:29 +0530[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2/*
Reid Tonking7a2826a2023-10-05 13:12:58 -0500[diff] [blame]3 * Copyright (C) 2020-2023 Texas Instruments Incorporated - https://www.ti.com/
Dave Gerlachfe506932020-08-05 22:44:29 +0530[diff] [blame]4 */
5
6/dts-v1/;
7
Reid Tonking7a2826a2023-10-05 13:12:58 -0500[diff] [blame]8#include "k3-j7200-common-proc-board.dts"
Kevin Scholz7a16fb52021-06-03 08:14:53 -0500[diff] [blame]9#include "k3-j7200-ddr-evm-lp4-2666.dtsi"
Dave Gerlachfe506932020-08-05 22:44:29 +0530[diff] [blame]10#include "k3-j721e-ddr.dtsi"
Reid Tonking7a2826a2023-10-05 13:12:58 -0500[diff] [blame]11#include "k3-j7200-common-proc-board-u-boot.dtsi"
Dave Gerlachfe506932020-08-05 22:44:29 +0530[diff] [blame]12
13/ {
14 aliases {
15 remoteproc0 = &sysctrler;
16 remoteproc1 = &a72_0;
17 };
18
Dave Gerlachfe506932020-08-05 22:44:29 +0530[diff] [blame]19 a72_0: a72@0 {
20 compatible = "ti,am654-rproc";
21 reg = <0x0 0x00a90000 0x0 0x10>;
22 power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
Manorit Chawdhry2806e832023-04-14 09:47:55 +0530[diff] [blame]23 <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>,
24 <&k3_pds 4 TI_SCI_PD_EXCLUSIVE>;
Dave Gerlachfe506932020-08-05 22:44:29 +0530[diff] [blame]25 resets = <&k3_reset 202 0>;
Reid Tonkinge5d15402024-11-19 06:02:55 +0530[diff] [blame]26 clocks = <&k3_clks 61 1>, <&k3_clks 202 2>, <&k3_clks 4 1> ;
27 clock-names = "gtc", "core", "msmc";
28 assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>, <&k3_clks 4 1>,
29 <&k3_clks 323 0>;
30 assigned-clock-parents= <0>, <0>, <0>, <&k3_clks 323 2>;
31 assigned-clock-rates = <2000000000>, <200000000>, <1000000000>;
Dave Gerlachfe506932020-08-05 22:44:29 +0530[diff] [blame]32 ti,sci = <&dmsc>;
33 ti,sci-proc-id = <32>;
34 ti,sci-host-id = <10>;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]35 bootph-pre-ram;
Dave Gerlachfe506932020-08-05 22:44:29 +0530[diff] [blame]36 };
37
Reid Tonking7a2826a2023-10-05 13:12:58 -0500[diff] [blame]38 dm_tifs: dm-tifs {
39 compatible = "ti,j721e-dm-sci";
40 ti,host-id = <3>;
41 ti,secure-host;
42 mbox-names = "rx", "tx";
43 mboxes = <&secure_proxy_mcu 21>,
44 <&secure_proxy_mcu 23>;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]45 bootph-pre-ram;
Dave Gerlachfe506932020-08-05 22:44:29 +0530[diff] [blame]46 };
47};
48
49&memorycontroller {
50 power-domains = <&k3_pds 8 TI_SCI_PD_SHARED>,
51 <&k3_pds 90 TI_SCI_PD_SHARED>;
52 clocks = <&k3_clks 8 5>, <&k3_clks 30 9>;
Reid Tonking7a2826a2023-10-05 13:12:58 -0500[diff] [blame]53 bootph-pre-ram;
Dave Gerlachfe506932020-08-05 22:44:29 +0530[diff] [blame]54};
55
Reid Tonking7a2826a2023-10-05 13:12:58 -0500[diff] [blame]56&mcu_timer0 {
Manorit Chawdhry1e081eb2024-11-21 17:32:51 +0530[diff] [blame]57 /delete-property/ clocks;
58 /delete-property/ clocks-names;
59 /delete-property/ assigned-clocks;
60 /delete-property/ assigned-clock-parents;
Aniket Limaye264f2282024-03-06 12:07:48 +0530[diff] [blame]61 clock-frequency = <250000000>;
Reid Tonking7a2826a2023-10-05 13:12:58 -0500[diff] [blame]62 bootph-pre-ram;
63};
Dave Gerlachfe506932020-08-05 22:44:29 +0530[diff] [blame]64
Reid Tonking7a2826a2023-10-05 13:12:58 -0500[diff] [blame]65&secure_proxy_mcu {
66 bootph-pre-ram;
67 status = "okay";
68};
69
70&cbass_mcu_wakeup {
Dave Gerlachfe506932020-08-05 22:44:29 +0530[diff] [blame]71 sysctrler: sysctrler {
Dave Gerlachfe506932020-08-05 22:44:29 +0530[diff] [blame]72 compatible = "ti,am654-system-controller";
Reid Tonking7a2826a2023-10-05 13:12:58 -0500[diff] [blame]73 mboxes= <&secure_proxy_mcu 4>,
74 <&secure_proxy_mcu 5>;
Dave Gerlachfe506932020-08-05 22:44:29 +0530[diff] [blame]75 mbox-names = "tx", "rx";
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]76 bootph-pre-ram;
Vignesh Raghavendra98181972021-06-07 19:47:50 +0530[diff] [blame]77 };
Dave Gerlachfe506932020-08-05 22:44:29 +0530[diff] [blame]78};
79
80&dmsc {
Reid Tonking7a2826a2023-10-05 13:12:58 -0500[diff] [blame]81 mboxes = <&secure_proxy_mcu 8>,
82 <&secure_proxy_mcu 6>, <&secure_proxy_mcu 5>;
Dave Gerlachfe506932020-08-05 22:44:29 +0530[diff] [blame]83 mbox-names = "tx", "rx", "notify";
84 ti,host-id = <4>;
85 ti,secure-host;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]86 bootph-pre-ram;
Dave Gerlachfe506932020-08-05 22:44:29 +0530[diff] [blame]87};
88
Gowtham Tammana5075bad2021-07-14 15:52:59 -0500[diff] [blame]89&wkup_vtm0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]90 bootph-pre-ram;
Gowtham Tammana5075bad2021-07-14 15:52:59 -0500[diff] [blame]91};
Aniket Limayee49d5da2024-03-06 12:07:47 +0530[diff] [blame]92
93&ospi0 {
94 reg = <0x0 0x47040000 0x0 0x100>,
95 <0x0 0x50000000 0x0 0x8000000>;
96};
Aniket Limaye06ae6c42024-03-06 12:07:49 +0530[diff] [blame]97
Jonathan Humphreysbeb31062024-08-09 18:01:55 -0500[diff] [blame]98&fss {
99 /* enable ranges missing from the FSS node */
100 ranges = <0x0 0x47000000 0x0 0x47000000 0x0 0x00068400>,
101 <0x0 0x50000000 0x0 0x50000000 0x0 0x08000000>;
102};
103
Vaishnav Achathccaaa2d2024-11-29 17:01:31 +0530[diff] [blame]104&hbmc {
105 reg = <0x0 0x47040000 0x0 0x100>,
106 <0x0 0x50000000 0x0 0x8000000>;
107 ranges = <0x0 0x0 0x0 0x50000000 0x4000000>,
108 <0x1 0x0 0x0 0x54000000 0x800000>;
109};
110
Aniket Limaye06ae6c42024-03-06 12:07:49 +0530[diff] [blame]111&mcu_ringacc {
112 ti,sci = <&dm_tifs>;
113};
114
115&mcu_udmap {
116 ti,sci = <&dm_tifs>;
117};
Udit Kumar8507ed02024-09-11 14:07:22 +0530[diff] [blame]118
119&wkup_vtm0 {
120 vdd-supply-2 = <&buckb1>;
121 bootph-pre-ram;
122};