Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2008 (C) Bryan O'Donoghue |
| 4 | * |
| 5 | * Code copied & edited from Freescale mpc85xx stuff. |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <common.h> |
Simon Glass | a9dc068 | 2019-12-28 10:44:59 -0700 | [diff] [blame] | 9 | #include <time.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 10 | #include <asm/global_data.h> |
Masahiro Yamada | 75f82d0 | 2018-03-05 01:20:11 +0900 | [diff] [blame] | 11 | #include <linux/libfdt.h> |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 12 | #include <fdt_support.h> |
| 13 | |
| 14 | DECLARE_GLOBAL_DATA_PTR; |
| 15 | |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 16 | void ft_cpu_setup(void *blob, struct bd_info *bd) |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 17 | { |
| 18 | do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, |
Christophe Leroy | 48f896d | 2017-07-06 10:33:17 +0200 | [diff] [blame] | 19 | "timebase-frequency", get_tbclk(), 1); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 20 | do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, |
Christophe Leroy | 48f896d | 2017-07-06 10:33:17 +0200 | [diff] [blame] | 21 | "bus-frequency", bd->bi_busfreq, 1); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 22 | do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, |
Christophe Leroy | 48f896d | 2017-07-06 10:33:17 +0200 | [diff] [blame] | 23 | "clock-frequency", bd->bi_intfreq, 1); |
Christophe Leroy | 0bc2dc2 | 2017-07-06 10:33:19 +0200 | [diff] [blame] | 24 | do_fixup_by_compat_u32(blob, "fsl,pq1-soc", "clock-frequency", |
| 25 | bd->bi_intfreq, 1); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 26 | do_fixup_by_compat_u32(blob, "fsl,cpm-brg", "clock-frequency", |
Christophe Leroy | 48f896d | 2017-07-06 10:33:17 +0200 | [diff] [blame] | 27 | gd->arch.brg_clk, 1); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 28 | |
Stefan Roese | a13a2aa | 2020-08-12 13:16:36 +0200 | [diff] [blame] | 29 | fdt_fixup_memory(blob, (u64)gd->ram_base, (u64)gd->ram_size); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 30 | } |