blob: fb5fdaf3ba8d721a56b27ed6c7e65772688a6ed9 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Minkyu Kangb1b24682011-01-24 15:22:23 +09002/*
3 * (C) Copyright 2010 Samsung Electronics
4 * Minkyu Kang <mk7.kang@samsung.com>
Minkyu Kangb1b24682011-01-24 15:22:23 +09005 */
6
Chander Kashyap4131a772011-12-06 23:34:12 +00007#ifndef _EXYNOS4_CPU_H
8#define _EXYNOS4_CPU_H
Minkyu Kangb1b24682011-01-24 15:22:23 +09009
Chander Kashyap34076a02012-02-05 23:01:46 +000010#define DEVICE_NOT_AVAILABLE 0
11
Minkyu Kangf92e88e2012-04-26 15:48:32 +090012#define EXYNOS_CPU_NAME "Exynos"
Chander Kashyap4131a772011-12-06 23:34:12 +000013#define EXYNOS4_ADDR_BASE 0x10000000
Minkyu Kangb1b24682011-01-24 15:22:23 +090014
Chander Kashyap72370bb2012-12-25 20:13:38 +000015/* EXYNOS4 Common*/
Piotr Wilczek2c7e06c2012-11-20 02:19:03 +000016#define EXYNOS4_I2C_SPACING 0x10000
17
Chander Kashyap4131a772011-12-06 23:34:12 +000018#define EXYNOS4_GPIO_PART3_BASE 0x03860000
19#define EXYNOS4_PRO_ID 0x10000000
Marek Szyprowskibc4a2e32020-01-17 14:02:44 +010020#define EXYNOS4_OP_MODE 0x10000008
Donghwa Lee09552712012-04-05 19:36:10 +000021#define EXYNOS4_SYSREG_BASE 0x10010000
Chander Kashyap4131a772011-12-06 23:34:12 +000022#define EXYNOS4_POWER_BASE 0x10020000
23#define EXYNOS4_SWRESET 0x10020400
24#define EXYNOS4_CLOCK_BASE 0x10030000
25#define EXYNOS4_SYSTIMER_BASE 0x10050000
26#define EXYNOS4_WATCHDOG_BASE 0x10060000
Inderpal Singh848048a2013-04-04 23:09:20 +000027#define EXYNOS4_TZPC_BASE 0x10110000
Rajeshwari Shindebed24422013-07-04 12:29:17 +053028#define EXYNOS4_DMC_CTRL_BASE 0x10400000
Przemyslaw Marczakb71fef32014-03-25 10:58:20 +010029#define EXYNOS4_MIU_BASE 0x10600000
30#define EXYNOS4_ACE_SFR_BASE 0x10830000
Chander Kashyap4131a772011-12-06 23:34:12 +000031#define EXYNOS4_GPIO_PART2_BASE 0x11000000
Przemyslaw Marczakd24de932014-10-28 17:31:05 +010032#define EXYNOS4_GPIO_PART2_0 0x11000000 /* GPJ0 */
33#define EXYNOS4_GPIO_PART2_1 0x11000c00 /* GPX0 */
Chander Kashyap4131a772011-12-06 23:34:12 +000034#define EXYNOS4_GPIO_PART1_BASE 0x11400000
35#define EXYNOS4_FIMD_BASE 0x11C00000
Donghwa Lee09552712012-04-05 19:36:10 +000036#define EXYNOS4_MIPI_DSIM_BASE 0x11C80000
Chander Kashyap4131a772011-12-06 23:34:12 +000037#define EXYNOS4_USBOTG_BASE 0x12480000
38#define EXYNOS4_MMC_BASE 0x12510000
39#define EXYNOS4_SROMC_BASE 0x12570000
Rajeshwari Shindedad39d42012-05-21 16:38:03 +053040#define EXYNOS4_USB_HOST_EHCI_BASE 0x12580000
Chander Kashyap4131a772011-12-06 23:34:12 +000041#define EXYNOS4_USBPHY_BASE 0x125B0000
42#define EXYNOS4_UART_BASE 0x13800000
Rajeshwari Shindebb5e46e2012-07-23 21:23:49 +000043#define EXYNOS4_I2C_BASE 0x13860000
Chander Kashyap4131a772011-12-06 23:34:12 +000044#define EXYNOS4_ADC_BASE 0x13910000
Hatim RVd22fe022012-11-02 01:15:35 +000045#define EXYNOS4_SPI_BASE 0x13920000
Chander Kashyap4131a772011-12-06 23:34:12 +000046#define EXYNOS4_PWMTIMER_BASE 0x139D0000
47#define EXYNOS4_MODEM_BASE 0x13A00000
Chander Kashyap34076a02012-02-05 23:01:46 +000048#define EXYNOS4_USBPHY_CONTROL 0x10020704
Rajeshwari Shindecfbe9252012-10-25 19:49:28 +000049#define EXYNOS4_I2S_BASE 0xE2100000
Chander Kashyap34076a02012-02-05 23:01:46 +000050
51#define EXYNOS4_GPIO_PART4_BASE DEVICE_NOT_AVAILABLE
Donghwa Lee33fd8142012-07-02 01:15:59 +000052#define EXYNOS4_DP_BASE DEVICE_NOT_AVAILABLE
Hatim RVd22fe022012-11-02 01:15:35 +000053#define EXYNOS4_SPI_ISP_BASE DEVICE_NOT_AVAILABLE
Rajeshwari Shindebed24422013-07-04 12:29:17 +053054#define EXYNOS4_DMC_PHY_BASE DEVICE_NOT_AVAILABLE
Dani Krishna Mohan65c7ee62013-09-11 16:38:48 +053055#define EXYNOS4_AUDIOSS_BASE DEVICE_NOT_AVAILABLE
Vivek Gautama48bdb72013-09-14 14:02:46 +053056#define EXYNOS4_USB_HOST_XHCI_BASE DEVICE_NOT_AVAILABLE
57#define EXYNOS4_USB3PHY_BASE DEVICE_NOT_AVAILABLE
Rajeshwari Birje2d7f08c2013-12-26 09:44:22 +053058#define EXYNOS4_DMC_TZASC_BASE DEVICE_NOT_AVAILABLE
Chander Kashyap34076a02012-02-05 23:01:46 +000059
Chander Kashyap72370bb2012-12-25 20:13:38 +000060/* EXYNOS4X12 */
61#define EXYNOS4X12_GPIO_PART3_BASE 0x03860000
62#define EXYNOS4X12_PRO_ID 0x10000000
63#define EXYNOS4X12_SYSREG_BASE 0x10010000
64#define EXYNOS4X12_POWER_BASE 0x10020000
65#define EXYNOS4X12_SWRESET 0x10020400
66#define EXYNOS4X12_USBPHY_CONTROL 0x10020704
67#define EXYNOS4X12_CLOCK_BASE 0x10030000
68#define EXYNOS4X12_SYSTIMER_BASE 0x10050000
69#define EXYNOS4X12_WATCHDOG_BASE 0x10060000
Inderpal Singh848048a2013-04-04 23:09:20 +000070#define EXYNOS4X12_TZPC_BASE 0x10110000
Rajeshwari Shindebed24422013-07-04 12:29:17 +053071#define EXYNOS4X12_DMC_CTRL_BASE 0x10600000
Chander Kashyap72370bb2012-12-25 20:13:38 +000072#define EXYNOS4X12_GPIO_PART4_BASE 0x106E0000
Przemyslaw Marczakb71fef32014-03-25 10:58:20 +010073#define EXYNOS4X12_ACE_SFR_BASE 0x10830000
Chander Kashyap72370bb2012-12-25 20:13:38 +000074#define EXYNOS4X12_GPIO_PART2_BASE 0x11000000
Przemyslaw Marczakd24de932014-10-28 17:31:05 +010075#define EXYNOS4X12_GPIO_PART2_0 0x11000000
76#define EXYNOS4X12_GPIO_PART2_1 0x11000040 /* GPK0 */
77#define EXYNOS4X12_GPIO_PART2_2 0x11000260 /* GPM0 */
78#define EXYNOS4X12_GPIO_PART2_3 0x11000c00 /* GPX0 */
Chander Kashyap72370bb2012-12-25 20:13:38 +000079#define EXYNOS4X12_GPIO_PART1_BASE 0x11400000
Przemyslaw Marczakd24de932014-10-28 17:31:05 +010080#define EXYNOS4X12_GPIO_PART1_0 0x11400000 /* GPA0 */
81#define EXYNOS4X12_GPIO_PART1_1 0x11400180 /* GPF0 */
82#define EXYNOS4X12_GPIO_PART1_2 0x11400240 /* GPJ0 */
Chander Kashyap72370bb2012-12-25 20:13:38 +000083#define EXYNOS4X12_FIMD_BASE 0x11C00000
84#define EXYNOS4X12_MIPI_DSIM_BASE 0x11C80000
85#define EXYNOS4X12_USBOTG_BASE 0x12480000
86#define EXYNOS4X12_MMC_BASE 0x12510000
87#define EXYNOS4X12_SROMC_BASE 0x12570000
88#define EXYNOS4X12_USB_HOST_EHCI_BASE 0x12580000
89#define EXYNOS4X12_USBPHY_BASE 0x125B0000
90#define EXYNOS4X12_UART_BASE 0x13800000
91#define EXYNOS4X12_I2C_BASE 0x13860000
92#define EXYNOS4X12_PWMTIMER_BASE 0x139D0000
93
94#define EXYNOS4X12_ADC_BASE DEVICE_NOT_AVAILABLE
95#define EXYNOS4X12_DP_BASE DEVICE_NOT_AVAILABLE
96#define EXYNOS4X12_MODEM_BASE DEVICE_NOT_AVAILABLE
Minkyu Kang06081712013-04-01 19:22:40 +000097#define EXYNOS4X12_I2S_BASE DEVICE_NOT_AVAILABLE
98#define EXYNOS4X12_SPI_BASE DEVICE_NOT_AVAILABLE
99#define EXYNOS4X12_SPI_ISP_BASE DEVICE_NOT_AVAILABLE
Rajeshwari Shindebed24422013-07-04 12:29:17 +0530100#define EXYNOS4X12_DMC_PHY_BASE DEVICE_NOT_AVAILABLE
Dani Krishna Mohan65c7ee62013-09-11 16:38:48 +0530101#define EXYNOS4X12_AUDIOSS_BASE DEVICE_NOT_AVAILABLE
Vivek Gautama48bdb72013-09-14 14:02:46 +0530102#define EXYNOS4X12_USB_HOST_XHCI_BASE DEVICE_NOT_AVAILABLE
103#define EXYNOS4X12_USB3PHY_BASE DEVICE_NOT_AVAILABLE
Rajeshwari Birje2d7f08c2013-12-26 09:44:22 +0530104#define EXYNOS4X12_DMC_TZASC_BASE DEVICE_NOT_AVAILABLE
Chander Kashyap72370bb2012-12-25 20:13:38 +0000105
Rajeshwari Birjeef0c56a2013-12-26 09:44:18 +0530106/* EXYNOS5 */
Rajeshwari Shinde2535e912012-07-23 21:23:50 +0000107#define EXYNOS5_I2C_SPACING 0x10000
108
Dani Krishna Mohan65c7ee62013-09-11 16:38:48 +0530109#define EXYNOS5_AUDIOSS_BASE 0x03810000
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530110#define EXYNOS5_GPIO_PART8_BASE 0x03860000
Chander Kashyap34076a02012-02-05 23:01:46 +0000111#define EXYNOS5_PRO_ID 0x10000000
112#define EXYNOS5_CLOCK_BASE 0x10010000
113#define EXYNOS5_POWER_BASE 0x10040000
114#define EXYNOS5_SWRESET 0x10040400
115#define EXYNOS5_SYSREG_BASE 0x10050000
Inderpal Singh848048a2013-04-04 23:09:20 +0000116#define EXYNOS5_TZPC_BASE 0x10100000
Chander Kashyap34076a02012-02-05 23:01:46 +0000117#define EXYNOS5_WATCHDOG_BASE 0x101D0000
Przemyslaw Marczakb71fef32014-03-25 10:58:20 +0100118#define EXYNOS5_ACE_SFR_BASE 0x10830000
Rajeshwari Shindebed24422013-07-04 12:29:17 +0530119#define EXYNOS5_DMC_PHY_BASE 0x10C00000
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530120#define EXYNOS5_GPIO_PART5_BASE 0x10D10000
121#define EXYNOS5_GPIO_PART6_BASE 0x10D10060
122#define EXYNOS5_GPIO_PART7_BASE 0x10D100C0
Chander Kashyap34076a02012-02-05 23:01:46 +0000123#define EXYNOS5_DMC_CTRL_BASE 0x10DD0000
124#define EXYNOS5_GPIO_PART1_BASE 0x11400000
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530125#define EXYNOS5_GPIO_PART2_BASE 0x114002E0
126#define EXYNOS5_GPIO_PART3_BASE 0x11400C00
Donghwa Lee09552712012-04-05 19:36:10 +0000127#define EXYNOS5_MIPI_DSIM_BASE 0x11D00000
Vivek Gautama48bdb72013-09-14 14:02:46 +0530128#define EXYNOS5_USB_HOST_XHCI_BASE 0x12000000
129#define EXYNOS5_USB3PHY_BASE 0x12100000
Rajeshwari Shindedad39d42012-05-21 16:38:03 +0530130#define EXYNOS5_USB_HOST_EHCI_BASE 0x12110000
Rajeshwari Shinde0f91f132012-05-14 05:52:04 +0000131#define EXYNOS5_USBPHY_BASE 0x12130000
132#define EXYNOS5_USBOTG_BASE 0x12140000
Chander Kashyap34076a02012-02-05 23:01:46 +0000133#define EXYNOS5_MMC_BASE 0x12200000
134#define EXYNOS5_SROMC_BASE 0x12250000
Chander Kashyap34076a02012-02-05 23:01:46 +0000135#define EXYNOS5_UART_BASE 0x12C00000
Rajeshwari Shindebb5e46e2012-07-23 21:23:49 +0000136#define EXYNOS5_I2C_BASE 0x12C60000
Hatim RVd22fe022012-11-02 01:15:35 +0000137#define EXYNOS5_SPI_BASE 0x12D20000
Rajeshwari Shindecfbe9252012-10-25 19:49:28 +0000138#define EXYNOS5_I2S_BASE 0x12D60000
Chander Kashyap34076a02012-02-05 23:01:46 +0000139#define EXYNOS5_PWMTIMER_BASE 0x12DD0000
Hatim RVd22fe022012-11-02 01:15:35 +0000140#define EXYNOS5_SPI_ISP_BASE 0x131A0000
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530141#define EXYNOS5_GPIO_PART4_BASE 0x13400000
Chander Kashyap34076a02012-02-05 23:01:46 +0000142#define EXYNOS5_FIMD_BASE 0x14400000
Donghwa Lee33fd8142012-07-02 01:15:59 +0000143#define EXYNOS5_DP_BASE 0x145B0000
Chander Kashyap34076a02012-02-05 23:01:46 +0000144
145#define EXYNOS5_ADC_BASE DEVICE_NOT_AVAILABLE
146#define EXYNOS5_MODEM_BASE DEVICE_NOT_AVAILABLE
Rajeshwari Birje2d7f08c2013-12-26 09:44:22 +0530147#define EXYNOS5_DMC_TZASC_BASE DEVICE_NOT_AVAILABLE
Minkyu Kangb1b24682011-01-24 15:22:23 +0900148
Rajeshwari Birjeef0c56a2013-12-26 09:44:18 +0530149/* EXYNOS5420 */
150#define EXYNOS5420_AUDIOSS_BASE 0x03810000
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530151#define EXYNOS5420_GPIO_PART6_BASE 0x03860000
Rajeshwari Birjeef0c56a2013-12-26 09:44:18 +0530152#define EXYNOS5420_PRO_ID 0x10000000
153#define EXYNOS5420_CLOCK_BASE 0x10010000
154#define EXYNOS5420_POWER_BASE 0x10040000
155#define EXYNOS5420_SWRESET 0x10040400
Akshay Saraswat1d575af2015-02-20 13:27:12 +0530156#define EXYNOS5420_INFORM_BASE 0x10040800
157#define EXYNOS5420_SPARE_BASE 0x10040900
158#define EXYNOS5420_CPU_CONFIG_BASE 0x10042000
159#define EXYNOS5420_CPU_STATUS_BASE 0x10042004
Rajeshwari Birjeef0c56a2013-12-26 09:44:18 +0530160#define EXYNOS5420_SYSREG_BASE 0x10050000
161#define EXYNOS5420_TZPC_BASE 0x100E0000
162#define EXYNOS5420_WATCHDOG_BASE 0x101D0000
163#define EXYNOS5420_ACE_SFR_BASE 0x10830000
164#define EXYNOS5420_DMC_PHY_BASE 0x10C00000
165#define EXYNOS5420_DMC_CTRL_BASE 0x10C20000
Rajeshwari Birje2d7f08c2013-12-26 09:44:22 +0530166#define EXYNOS5420_DMC_TZASC_BASE 0x10D40000
Rajeshwari Birjeef0c56a2013-12-26 09:44:18 +0530167#define EXYNOS5420_USB_HOST_EHCI_BASE 0x12110000
168#define EXYNOS5420_MMC_BASE 0x12200000
169#define EXYNOS5420_SROMC_BASE 0x12250000
Lukasz Majewskia450a942015-05-22 18:14:22 +0200170#define EXYNOS5420_USB3PHY_BASE 0x12500000
Rajeshwari Birjeef0c56a2013-12-26 09:44:18 +0530171#define EXYNOS5420_UART_BASE 0x12C00000
172#define EXYNOS5420_I2C_BASE 0x12C60000
173#define EXYNOS5420_I2C_8910_BASE 0x12E00000
174#define EXYNOS5420_SPI_BASE 0x12D20000
175#define EXYNOS5420_I2S_BASE 0x12D60000
176#define EXYNOS5420_PWMTIMER_BASE 0x12DD0000
177#define EXYNOS5420_SPI_ISP_BASE 0x131A0000
178#define EXYNOS5420_GPIO_PART2_BASE 0x13400000
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530179#define EXYNOS5420_GPIO_PART3_BASE 0x13400C00
180#define EXYNOS5420_GPIO_PART4_BASE 0x13410000
181#define EXYNOS5420_GPIO_PART5_BASE 0x14000000
Rajeshwari Birjeef0c56a2013-12-26 09:44:18 +0530182#define EXYNOS5420_GPIO_PART1_BASE 0x14010000
183#define EXYNOS5420_MIPI_DSIM_BASE 0x14500000
184#define EXYNOS5420_DP_BASE 0x145B0000
185
186#define EXYNOS5420_USBPHY_BASE DEVICE_NOT_AVAILABLE
187#define EXYNOS5420_USBOTG_BASE DEVICE_NOT_AVAILABLE
188#define EXYNOS5420_FIMD_BASE DEVICE_NOT_AVAILABLE
189#define EXYNOS5420_ADC_BASE DEVICE_NOT_AVAILABLE
190#define EXYNOS5420_MODEM_BASE DEVICE_NOT_AVAILABLE
Rajeshwari Birjeef0c56a2013-12-26 09:44:18 +0530191#define EXYNOS5420_USB_HOST_XHCI_BASE DEVICE_NOT_AVAILABLE
192
Akshay Saraswat1d575af2015-02-20 13:27:12 +0530193
Minkyu Kangb1b24682011-01-24 15:22:23 +0900194#ifndef __ASSEMBLY__
195#include <asm/io.h>
196/* CPU detection macros */
197extern unsigned int s5p_cpu_id;
Minkyu Kang13398722011-05-16 19:45:54 +0900198extern unsigned int s5p_cpu_rev;
199
200static inline int s5p_get_cpu_rev(void)
201{
202 return s5p_cpu_rev;
203}
Minkyu Kangb1b24682011-01-24 15:22:23 +0900204
205static inline void s5p_set_cpu_id(void)
206{
Piotr Wilczeke8e34752014-01-22 15:54:30 +0100207 unsigned int pro_id = readl(EXYNOS4_PRO_ID);
208 unsigned int cpu_id = (pro_id & 0x00FFF000) >> 12;
209 unsigned int cpu_rev = pro_id & 0x000000FF;
Minkyu Kangb1b24682011-01-24 15:22:23 +0900210
Piotr Wilczeke8e34752014-01-22 15:54:30 +0100211 switch (cpu_id) {
Minkyu Kangf92e88e2012-04-26 15:48:32 +0900212 case 0x200:
213 /* Exynos4210 EVT0 */
214 s5p_cpu_id = 0x4210;
Minkyu Kang13398722011-05-16 19:45:54 +0900215 s5p_cpu_rev = 0;
Minkyu Kangf92e88e2012-04-26 15:48:32 +0900216 break;
217 case 0x210:
218 /* Exynos4210 EVT1 */
219 s5p_cpu_id = 0x4210;
Piotr Wilczeke8e34752014-01-22 15:54:30 +0100220 s5p_cpu_rev = cpu_rev;
Minkyu Kangf92e88e2012-04-26 15:48:32 +0900221 break;
222 case 0x412:
223 /* Exynos4412 */
224 s5p_cpu_id = 0x4412;
Piotr Wilczeke8e34752014-01-22 15:54:30 +0100225 s5p_cpu_rev = cpu_rev;
Minkyu Kangf92e88e2012-04-26 15:48:32 +0900226 break;
227 case 0x520:
228 /* Exynos5250 */
229 s5p_cpu_id = 0x5250;
230 break;
Rajeshwari Birjeef0c56a2013-12-26 09:44:18 +0530231 case 0x420:
232 /* Exynos5420 */
233 s5p_cpu_id = 0x5420;
234 break;
Akshay Saraswat9fba7b42014-11-13 22:38:15 +0530235 case 0x422:
236 /*
237 * Exynos5800 is a variant of Exynos5420
238 * and has product id 0x5422
239 */
Przemyslaw Marczakcefbfe42015-10-27 13:07:57 +0100240 s5p_cpu_id = 0x5422;
Akshay Saraswat9fba7b42014-11-13 22:38:15 +0530241 break;
Minkyu Kang13398722011-05-16 19:45:54 +0900242 }
Minkyu Kangb1b24682011-01-24 15:22:23 +0900243}
244
Minkyu Kangf92e88e2012-04-26 15:48:32 +0900245static inline char *s5p_get_cpu_name(void)
246{
247 return EXYNOS_CPU_NAME;
248}
249
Minkyu Kangb1b24682011-01-24 15:22:23 +0900250#define IS_SAMSUNG_TYPE(type, id) \
Simon Glassabf09952013-06-11 11:14:50 -0700251static inline int __attribute__((no_instrument_function)) cpu_is_##type(void) \
Minkyu Kangb1b24682011-01-24 15:22:23 +0900252{ \
Minkyu Kangf92e88e2012-04-26 15:48:32 +0900253 return (s5p_cpu_id >> 12) == id; \
Minkyu Kangb1b24682011-01-24 15:22:23 +0900254}
255
Minkyu Kangf92e88e2012-04-26 15:48:32 +0900256IS_SAMSUNG_TYPE(exynos4, 0x4)
257IS_SAMSUNG_TYPE(exynos5, 0x5)
Minkyu Kangb1b24682011-01-24 15:22:23 +0900258
Minkyu Kangc2797272012-10-15 03:06:32 +0000259#define IS_EXYNOS_TYPE(type, id) \
Simon Glassabf09952013-06-11 11:14:50 -0700260static inline int __attribute__((no_instrument_function)) \
261 proid_is_##type(void) \
Minkyu Kangc2797272012-10-15 03:06:32 +0000262{ \
263 return s5p_cpu_id == id; \
264}
265
266IS_EXYNOS_TYPE(exynos4210, 0x4210)
Chander Kashyap72370bb2012-12-25 20:13:38 +0000267IS_EXYNOS_TYPE(exynos4412, 0x4412)
Minkyu Kangc2797272012-10-15 03:06:32 +0000268IS_EXYNOS_TYPE(exynos5250, 0x5250)
Rajeshwari Birjeef0c56a2013-12-26 09:44:18 +0530269IS_EXYNOS_TYPE(exynos5420, 0x5420)
Przemyslaw Marczakcefbfe42015-10-27 13:07:57 +0100270IS_EXYNOS_TYPE(exynos5422, 0x5422)
Minkyu Kangc2797272012-10-15 03:06:32 +0000271
Simon Glass8d451b42018-12-10 10:37:40 -0700272#define proid_is_exynos542x() (proid_is_exynos5420() || proid_is_exynos5422())
273
Minkyu Kangb1b24682011-01-24 15:22:23 +0900274#define SAMSUNG_BASE(device, base) \
Thomas Abrahama99ad392016-04-23 22:18:12 +0530275static inline unsigned long __attribute__((no_instrument_function)) \
Simon Glassabf09952013-06-11 11:14:50 -0700276 samsung_get_base_##device(void) \
Minkyu Kangb1b24682011-01-24 15:22:23 +0900277{ \
Simon Glassabf09952013-06-11 11:14:50 -0700278 if (cpu_is_exynos4()) { \
Chander Kashyap72370bb2012-12-25 20:13:38 +0000279 if (proid_is_exynos4412()) \
280 return EXYNOS4X12_##base; \
Chander Kashyap4131a772011-12-06 23:34:12 +0000281 return EXYNOS4_##base; \
Chander Kashyap72370bb2012-12-25 20:13:38 +0000282 } else if (cpu_is_exynos5()) { \
Simon Glass8d451b42018-12-10 10:37:40 -0700283 if (proid_is_exynos542x()) \
Rajeshwari Birjeef0c56a2013-12-26 09:44:18 +0530284 return EXYNOS5420_##base; \
Chander Kashyap34076a02012-02-05 23:01:46 +0000285 return EXYNOS5_##base; \
Chander Kashyap72370bb2012-12-25 20:13:38 +0000286 } \
287 return 0; \
Minkyu Kangb1b24682011-01-24 15:22:23 +0900288}
289
290SAMSUNG_BASE(adc, ADC_BASE)
291SAMSUNG_BASE(clock, CLOCK_BASE)
Akshay Saraswata42e55a2013-03-20 21:00:56 +0000292SAMSUNG_BASE(ace_sfr, ACE_SFR_BASE)
Donghwa Lee09552712012-04-05 19:36:10 +0000293SAMSUNG_BASE(sysreg, SYSREG_BASE)
Rajeshwari Shindebb5e46e2012-07-23 21:23:49 +0000294SAMSUNG_BASE(i2c, I2C_BASE)
Rajeshwari Shindecfbe9252012-10-25 19:49:28 +0000295SAMSUNG_BASE(i2s, I2S_BASE)
Donghwa Lee09552712012-04-05 19:36:10 +0000296SAMSUNG_BASE(mipi_dsim, MIPI_DSIM_BASE)
Minkyu Kangb1b24682011-01-24 15:22:23 +0900297SAMSUNG_BASE(gpio_part1, GPIO_PART1_BASE)
298SAMSUNG_BASE(gpio_part2, GPIO_PART2_BASE)
299SAMSUNG_BASE(gpio_part3, GPIO_PART3_BASE)
Chander Kashyap34076a02012-02-05 23:01:46 +0000300SAMSUNG_BASE(gpio_part4, GPIO_PART4_BASE)
Minkyu Kangb1b24682011-01-24 15:22:23 +0900301SAMSUNG_BASE(pro_id, PRO_ID)
302SAMSUNG_BASE(mmc, MMC_BASE)
303SAMSUNG_BASE(modem, MODEM_BASE)
304SAMSUNG_BASE(sromc, SROMC_BASE)
305SAMSUNG_BASE(swreset, SWRESET)
306SAMSUNG_BASE(timer, PWMTIMER_BASE)
307SAMSUNG_BASE(uart, UART_BASE)
308SAMSUNG_BASE(usb_phy, USBPHY_BASE)
Vivek Gautama48bdb72013-09-14 14:02:46 +0530309SAMSUNG_BASE(usb3_phy, USB3PHY_BASE)
Rajeshwari Shindedad39d42012-05-21 16:38:03 +0530310SAMSUNG_BASE(usb_ehci, USB_HOST_EHCI_BASE)
Vivek Gautama48bdb72013-09-14 14:02:46 +0530311SAMSUNG_BASE(usb_xhci, USB_HOST_XHCI_BASE)
Minkyu Kangb1b24682011-01-24 15:22:23 +0900312SAMSUNG_BASE(usb_otg, USBOTG_BASE)
313SAMSUNG_BASE(watchdog, WATCHDOG_BASE)
HeungJun, Kimb3717272012-01-16 21:13:04 +0000314SAMSUNG_BASE(power, POWER_BASE)
Hatim RVd22fe022012-11-02 01:15:35 +0000315SAMSUNG_BASE(spi, SPI_BASE)
316SAMSUNG_BASE(spi_isp, SPI_ISP_BASE)
Inderpal Singh848048a2013-04-04 23:09:20 +0000317SAMSUNG_BASE(tzpc, TZPC_BASE)
Rajeshwari Shindebed24422013-07-04 12:29:17 +0530318SAMSUNG_BASE(dmc_ctrl, DMC_CTRL_BASE)
319SAMSUNG_BASE(dmc_phy, DMC_PHY_BASE)
Rajeshwari Birje2d7f08c2013-12-26 09:44:22 +0530320SAMSUNG_BASE(dmc_tzasc, DMC_TZASC_BASE)
Dani Krishna Mohan65c7ee62013-09-11 16:38:48 +0530321SAMSUNG_BASE(audio_ass, AUDIOSS_BASE)
Minkyu Kangb1b24682011-01-24 15:22:23 +0900322#endif
323
Chander Kashyap4131a772011-12-06 23:34:12 +0000324#endif /* _EXYNOS4_CPU_H */