wdenk | 70ae5b4 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 1 | /* |
| 2 | * i2c Support for Atmel's AT91RM9200 Two-Wire Interface |
| 3 | * |
| 4 | * (c) Rick Bronson |
| 5 | * |
| 6 | * Borrowed heavily from original work by: |
| 7 | * Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com> |
| 8 | * |
| 9 | * Modified to work with u-boot by (C) 2004 Gary Jennejohn garyj@denx.de |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or modify |
| 12 | * it under the terms of the GNU General Public License as published by |
| 13 | * the Free Software Foundation; either version 2 of the License, or |
| 14 | * (at your option) any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; if not, write to the Free Software |
| 23 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 24 | * |
| 25 | */ |
| 26 | #include <common.h> |
| 27 | |
| 28 | #ifdef CONFIG_HARD_I2C |
| 29 | |
| 30 | #include <i2c.h> |
| 31 | #include <asm/io.h> |
| 32 | #include <asm/arch/hardware.h> |
| 33 | |
| 34 | #include <at91rm9200_i2c.h> |
| 35 | |
wdenk | 0598d20 | 2004-12-14 23:28:24 +0000 | [diff] [blame] | 36 | /* define DEBUG */ |
wdenk | 70ae5b4 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 37 | |
| 38 | /* |
| 39 | * Poll the i2c status register until the specified bit is set. |
| 40 | * Returns 0 if timed out (100 msec) |
| 41 | */ |
| 42 | static short at91_poll_status(AT91PS_TWI twi, unsigned long bit) { |
| 43 | int loop_cntr = 10000; |
| 44 | do { |
wdenk | 20dd2fa | 2004-11-21 00:06:33 +0000 | [diff] [blame] | 45 | udelay(10); |
wdenk | 70ae5b4 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 46 | } while (!(twi->TWI_SR & bit) && (--loop_cntr > 0)); |
| 47 | |
| 48 | return (loop_cntr > 0); |
| 49 | } |
| 50 | |
| 51 | /* |
| 52 | * Generic i2c master transfer entrypoint |
| 53 | * |
| 54 | * rw == 1 means that this is a read |
| 55 | */ |
| 56 | static int |
| 57 | at91_xfer(unsigned char chip, unsigned int addr, int alen, |
| 58 | unsigned char *buffer, int len, int rw) |
| 59 | { |
| 60 | AT91PS_TWI twi = (AT91PS_TWI) AT91_TWI_BASE; |
| 61 | int length; |
| 62 | unsigned char *buf; |
wdenk | 70ae5b4 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 63 | /* Set the TWI Master Mode Register */ |
| 64 | twi->TWI_MMR = (chip << 16) | (alen << 8) |
| 65 | | ((rw == 1) ? AT91C_TWI_MREAD : 0); |
| 66 | |
| 67 | /* Set TWI Internal Address Register with first messages data field */ |
wdenk | 70ae5b4 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 68 | if (alen > 0) |
Wolfgang Denk | 9a9f247 | 2005-10-06 01:22:22 +0200 | [diff] [blame] | 69 | twi->TWI_IADR = addr; |
wdenk | 70ae5b4 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 70 | |
| 71 | length = len; |
| 72 | buf = buffer; |
| 73 | if (length && buf) { /* sanity check */ |
| 74 | if (rw) { |
| 75 | twi->TWI_CR = AT91C_TWI_START; |
| 76 | while (length--) { |
| 77 | if (!length) |
| 78 | twi->TWI_CR = AT91C_TWI_STOP; |
| 79 | /* Wait until transfer is finished */ |
| 80 | if (!at91_poll_status(twi, AT91C_TWI_RXRDY)) { |
wdenk | 0598d20 | 2004-12-14 23:28:24 +0000 | [diff] [blame] | 81 | debug ("at91_i2c: timeout 1\n"); |
wdenk | 70ae5b4 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 82 | return 1; |
| 83 | } |
| 84 | *buf++ = twi->TWI_RHR; |
| 85 | } |
| 86 | if (!at91_poll_status(twi, AT91C_TWI_TXCOMP)) { |
wdenk | 0598d20 | 2004-12-14 23:28:24 +0000 | [diff] [blame] | 87 | debug ("at91_i2c: timeout 2\n"); |
wdenk | 70ae5b4 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 88 | return 1; |
| 89 | } |
| 90 | } else { |
| 91 | twi->TWI_CR = AT91C_TWI_START; |
| 92 | while (length--) { |
| 93 | twi->TWI_THR = *buf++; |
| 94 | if (!length) |
| 95 | twi->TWI_CR = AT91C_TWI_STOP; |
| 96 | if (!at91_poll_status(twi, AT91C_TWI_TXRDY)) { |
wdenk | 0598d20 | 2004-12-14 23:28:24 +0000 | [diff] [blame] | 97 | debug ("at91_i2c: timeout 3\n"); |
wdenk | 70ae5b4 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 98 | return 1; |
| 99 | } |
| 100 | } |
| 101 | /* Wait until transfer is finished */ |
| 102 | if (!at91_poll_status(twi, AT91C_TWI_TXCOMP)) { |
wdenk | 0598d20 | 2004-12-14 23:28:24 +0000 | [diff] [blame] | 103 | debug ("at91_i2c: timeout 4\n"); |
wdenk | 70ae5b4 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 104 | return 1; |
| 105 | } |
| 106 | } |
| 107 | } |
| 108 | return 0; |
| 109 | } |
| 110 | |
| 111 | int |
| 112 | i2c_probe(unsigned char chip) |
| 113 | { |
Wolfgang Denk | 7fa6e90 | 2006-03-11 22:53:33 +0100 | [diff] [blame] | 114 | unsigned char buffer[1]; |
wdenk | 70ae5b4 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 115 | |
| 116 | return at91_xfer(chip, 0, 0, buffer, 1, 1); |
| 117 | } |
| 118 | |
| 119 | int |
wdenk | 27fa585 | 2005-04-03 14:18:51 +0000 | [diff] [blame] | 120 | i2c_read (unsigned char chip, unsigned int addr, int alen, |
| 121 | unsigned char *buffer, int len) |
wdenk | 70ae5b4 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 122 | { |
wdenk | cbb5288 | 2004-10-10 18:03:33 +0000 | [diff] [blame] | 123 | #ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW |
wdenk | 70ae5b4 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 124 | /* we only allow one address byte */ |
| 125 | if (alen > 1) |
| 126 | return 1; |
wdenk | 70ae5b4 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 127 | /* XXX assume an ATMEL AT24C16 */ |
| 128 | if (alen == 1) { |
wdenk | cbb5288 | 2004-10-10 18:03:33 +0000 | [diff] [blame] | 129 | #if 0 /* EEPROM code already sets this correctly */ |
wdenk | 70ae5b4 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 130 | chip |= (addr >> 8) & 0xff; |
wdenk | cbb5288 | 2004-10-10 18:03:33 +0000 | [diff] [blame] | 131 | #endif |
wdenk | 70ae5b4 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 132 | addr = addr & 0xff; |
| 133 | } |
| 134 | #endif |
| 135 | return at91_xfer(chip, addr, alen, buffer, len, 1); |
| 136 | } |
| 137 | |
| 138 | int |
| 139 | i2c_write(unsigned char chip, unsigned int addr, int alen, |
wdenk | d0245fc | 2005-04-13 10:02:42 +0000 | [diff] [blame] | 140 | unsigned char *buffer, int len) |
wdenk | 70ae5b4 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 141 | { |
wdenk | d0245fc | 2005-04-13 10:02:42 +0000 | [diff] [blame] | 142 | #ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW |
wdenk | 70ae5b4 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 143 | int i; |
| 144 | unsigned char *buf; |
| 145 | |
| 146 | /* we only allow one address byte */ |
| 147 | if (alen > 1) |
| 148 | return 1; |
wdenk | 70ae5b4 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 149 | /* XXX assume an ATMEL AT24C16 */ |
| 150 | if (alen == 1) { |
| 151 | buf = buffer; |
| 152 | /* do single byte writes */ |
| 153 | for (i = 0; i < len; i++) { |
wdenk | cbb5288 | 2004-10-10 18:03:33 +0000 | [diff] [blame] | 154 | #if 0 /* EEPROM code already sets this correctly */ |
wdenk | 70ae5b4 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 155 | chip |= (addr >> 8) & 0xff; |
wdenk | cbb5288 | 2004-10-10 18:03:33 +0000 | [diff] [blame] | 156 | #endif |
wdenk | 70ae5b4 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 157 | addr = addr & 0xff; |
| 158 | if (at91_xfer(chip, addr, alen, buf++, 1, 0)) |
| 159 | return 1; |
wdenk | cbb5288 | 2004-10-10 18:03:33 +0000 | [diff] [blame] | 160 | addr++; |
wdenk | 70ae5b4 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 161 | } |
wdenk | cbb5288 | 2004-10-10 18:03:33 +0000 | [diff] [blame] | 162 | return 0; |
wdenk | 70ae5b4 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 163 | } |
wdenk | 70ae5b4 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 164 | #endif |
| 165 | return at91_xfer(chip, addr, alen, buffer, len, 0); |
| 166 | } |
| 167 | |
| 168 | /* |
| 169 | * Main initialization routine |
| 170 | */ |
| 171 | void |
| 172 | i2c_init(int speed, int slaveaddr) |
| 173 | { |
| 174 | AT91PS_TWI twi = (AT91PS_TWI) AT91_TWI_BASE; |
| 175 | |
| 176 | *AT91C_PIOA_PDR = AT91C_PA25_TWD | AT91C_PA26_TWCK; |
| 177 | *AT91C_PIOA_ASR = AT91C_PA25_TWD | AT91C_PA26_TWCK; |
| 178 | *AT91C_PIOA_MDER = AT91C_PA25_TWD | AT91C_PA26_TWCK; |
| 179 | *AT91C_PMC_PCER = 1 << AT91C_ID_TWI; /* enable peripheral clock */ |
| 180 | |
| 181 | twi->TWI_IDR = 0x3ff; /* Disable all interrupts */ |
| 182 | twi->TWI_CR = AT91C_TWI_SWRST; /* Reset peripheral */ |
| 183 | twi->TWI_CR = AT91C_TWI_MSEN | AT91C_TWI_SVDIS; /* Set Master mode */ |
| 184 | |
| 185 | /* Here, CKDIV = 1 and CHDIV=CLDIV ==> CLDIV = CHDIV = 1/4*((Fmclk/FTWI) -6) */ |
| 186 | twi->TWI_CWGR = AT91C_TWI_CKDIV1 | AT91C_TWI_CLDIV3 | (AT91C_TWI_CLDIV3 << 8); |
| 187 | |
wdenk | 0598d20 | 2004-12-14 23:28:24 +0000 | [diff] [blame] | 188 | debug ("Found AT91 i2c\n"); |
wdenk | 70ae5b4 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 189 | return; |
| 190 | } |
wdenk | 10164c6 | 2005-04-07 22:36:40 +0000 | [diff] [blame] | 191 | |
| 192 | uchar i2c_reg_read(uchar i2c_addr, uchar reg) |
| 193 | { |
Wolfgang Denk | 7fa6e90 | 2006-03-11 22:53:33 +0100 | [diff] [blame] | 194 | unsigned char buf; |
wdenk | 10164c6 | 2005-04-07 22:36:40 +0000 | [diff] [blame] | 195 | |
| 196 | i2c_read(i2c_addr, reg, 1, &buf, 1); |
| 197 | |
| 198 | return(buf); |
| 199 | } |
| 200 | |
| 201 | void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val) |
| 202 | { |
| 203 | i2c_write(i2c_addr, reg, 1, &val, 1); |
| 204 | } |
| 205 | |
wdenk | 70ae5b4 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 206 | #endif /* CONFIG_HARD_I2C */ |