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wdenk70ae5b42004-10-10 17:05:18 +00001/*
2 * i2c Support for Atmel's AT91RM9200 Two-Wire Interface
3 *
4 * (c) Rick Bronson
5 *
6 * Borrowed heavily from original work by:
7 * Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
8 *
9 * Modified to work with u-boot by (C) 2004 Gary Jennejohn garyj@denx.de
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 *
25*/
26#include <common.h>
27
28#ifdef CONFIG_HARD_I2C
29
30#include <i2c.h>
31#include <asm/io.h>
32#include <asm/arch/hardware.h>
33
34#include <at91rm9200_i2c.h>
35
36static int debug = 0;
37
38/*
39 * Poll the i2c status register until the specified bit is set.
40 * Returns 0 if timed out (100 msec)
41 */
42static short at91_poll_status(AT91PS_TWI twi, unsigned long bit) {
43 int loop_cntr = 10000;
44 do {
45 udelay(100);
46 } while (!(twi->TWI_SR & bit) && (--loop_cntr > 0));
47
48 return (loop_cntr > 0);
49}
50
51/*
52 * Generic i2c master transfer entrypoint
53 *
54 * rw == 1 means that this is a read
55 */
56static int
57at91_xfer(unsigned char chip, unsigned int addr, int alen,
58 unsigned char *buffer, int len, int rw)
59{
60 AT91PS_TWI twi = (AT91PS_TWI) AT91_TWI_BASE;
61 int length;
62 unsigned char *buf;
63
64 /* Set the TWI Master Mode Register */
65 twi->TWI_MMR = (chip << 16) | (alen << 8)
66 | ((rw == 1) ? AT91C_TWI_MREAD : 0);
67
68 /* Set TWI Internal Address Register with first messages data field */
69 /* only one address byte is supported */
70 if (alen > 0)
71 twi->TWI_IADR = addr & 0xff;
72
73 length = len;
74 buf = buffer;
75 if (length && buf) { /* sanity check */
76 if (rw) {
77 twi->TWI_CR = AT91C_TWI_START;
78 while (length--) {
79 if (!length)
80 twi->TWI_CR = AT91C_TWI_STOP;
81 /* Wait until transfer is finished */
82 if (!at91_poll_status(twi, AT91C_TWI_RXRDY)) {
83 if (debug)
84 printf("at91_i2c: timeout 1\n");
85 return 1;
86 }
87 *buf++ = twi->TWI_RHR;
88 }
89 if (!at91_poll_status(twi, AT91C_TWI_TXCOMP)) {
90 if (debug)
91 printf("at91_i2c: timeout 2\n");
92 return 1;
93 }
94 } else {
95 twi->TWI_CR = AT91C_TWI_START;
96 while (length--) {
97 twi->TWI_THR = *buf++;
98 if (!length)
99 twi->TWI_CR = AT91C_TWI_STOP;
100 if (!at91_poll_status(twi, AT91C_TWI_TXRDY)) {
101 if (debug)
102 printf("at91_i2c: timeout 3\n");
103 return 1;
104 }
105 }
106 /* Wait until transfer is finished */
107 if (!at91_poll_status(twi, AT91C_TWI_TXCOMP)) {
108 if (debug)
109 printf("at91_i2c: timeout 4\n");
110 return 1;
111 }
112 }
113 }
114 return 0;
115}
116
117int
118i2c_probe(unsigned char chip)
119{
120 char buffer[1];
121
122 return at91_xfer(chip, 0, 0, buffer, 1, 1);
123}
124
125int
126i2c_read(unsigned char chip, unsigned int addr, int alen,
127 unsigned char *buffer, int len)
128{
129 /* we only allow one address byte */
130 if (alen > 1)
131 return 1;
132#ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
133 /* XXX assume an ATMEL AT24C16 */
134 if (alen == 1) {
135 chip |= (addr >> 8) & 0xff;
136 addr = addr & 0xff;
137 }
138#endif
139 return at91_xfer(chip, addr, alen, buffer, len, 1);
140}
141
142int
143i2c_write(unsigned char chip, unsigned int addr, int alen,
144 unsigned char *buffer, int len)
145{
146 int i;
147 unsigned char *buf;
148
149 /* we only allow one address byte */
150 if (alen > 1)
151 return 1;
152#ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
153 /* XXX assume an ATMEL AT24C16 */
154 if (alen == 1) {
155 buf = buffer;
156 /* do single byte writes */
157 for (i = 0; i < len; i++) {
158 chip |= (addr >> 8) & 0xff;
159 addr = addr & 0xff;
160 if (at91_xfer(chip, addr, alen, buf++, 1, 0))
161 return 1;
162 }
163 }
164 return 0;
165#endif
166 return at91_xfer(chip, addr, alen, buffer, len, 0);
167}
168
169/*
170 * Main initialization routine
171 */
172void
173i2c_init(int speed, int slaveaddr)
174{
175 AT91PS_TWI twi = (AT91PS_TWI) AT91_TWI_BASE;
176
177 *AT91C_PIOA_PDR = AT91C_PA25_TWD | AT91C_PA26_TWCK;
178 *AT91C_PIOA_ASR = AT91C_PA25_TWD | AT91C_PA26_TWCK;
179 *AT91C_PIOA_MDER = AT91C_PA25_TWD | AT91C_PA26_TWCK;
180 *AT91C_PMC_PCER = 1 << AT91C_ID_TWI; /* enable peripheral clock */
181
182 twi->TWI_IDR = 0x3ff; /* Disable all interrupts */
183 twi->TWI_CR = AT91C_TWI_SWRST; /* Reset peripheral */
184 twi->TWI_CR = AT91C_TWI_MSEN | AT91C_TWI_SVDIS; /* Set Master mode */
185
186 /* Here, CKDIV = 1 and CHDIV=CLDIV ==> CLDIV = CHDIV = 1/4*((Fmclk/FTWI) -6) */
187 twi->TWI_CWGR = AT91C_TWI_CKDIV1 | AT91C_TWI_CLDIV3 | (AT91C_TWI_CLDIV3 << 8);
188
189 printf("Found AT91 i2c\n");
190 return;
191}
192#endif /* CONFIG_HARD_I2C */