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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +05302/*
3 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
4 *
5 * Based on da830evm.c. Original Copyrights follow:
6 *
7 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
8 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +05309 */
10
11#include <common.h>
Adam Ford9c286a72018-06-10 22:25:57 -050012#include <dm.h>
Simon Glass5e6201b2019-08-01 09:46:51 -060013#include <env.h>
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +053014#include <i2c.h>
Simon Glass97589732020-05-10 11:40:02 -060015#include <init.h>
Ben Gardiner4b9538a2010-10-14 17:26:29 -040016#include <net.h>
Hadli, Manjunathad713212012-02-09 20:22:24 +000017#include <spi.h>
18#include <spi_flash.h>
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +053019#include <asm/arch/hardware.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060020#include <asm/global_data.h>
Khoronzhuk, Ivan753a00a2014-06-07 04:22:52 +030021#include <asm/ti-common/davinci_nand.h>
Ben Gardiner4b9538a2010-10-14 17:26:29 -040022#include <asm/arch/emac_defs.h>
Christian Rieschb10592f2011-11-28 23:46:18 +000023#include <asm/arch/pinmux_defs.h>
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +053024#include <asm/io.h>
Sughosh Ganu80995f92010-11-28 20:21:27 -050025#include <asm/arch/davinci_misc.h>
Masahiro Yamada56a931c2016-09-21 11:28:55 +090026#include <linux/errno.h>
Nagabhushana Netagunte24d30962011-09-03 22:19:28 -040027#include <hwconfig.h>
Simon Glass0ffb9d62017-05-31 19:47:48 -060028#include <asm/mach-types.h>
Adam Ford9c286a72018-06-10 22:25:57 -050029#include <asm/gpio.h>
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +053030
Masahiro Yamadab2c88682017-01-10 13:32:07 +090031#ifdef CONFIG_MMC_DAVINCI
Lad, Prabhakar16787da2012-06-24 21:35:15 +000032#include <mmc.h>
33#include <asm/arch/sdmmc_defs.h>
34#endif
35
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +053036DECLARE_GLOBAL_DATA_PTR;
37
Ben Gardiner4b9538a2010-10-14 17:26:29 -040038#ifdef CONFIG_DRIVER_TI_EMAC
Sudhakar Rajashekhara5851e122010-11-18 09:59:37 -050039#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
40#define HAS_RMII 1
41#else
42#define HAS_RMII 0
43#endif
44#endif /* CONFIG_DRIVER_TI_EMAC */
Ben Gardinerf522c1b2010-10-14 17:26:19 -040045
Hadli, Manjunathad713212012-02-09 20:22:24 +000046#define CFG_MAC_ADDR_SPI_BUS 0
47#define CFG_MAC_ADDR_SPI_CS 0
48#define CFG_MAC_ADDR_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
49#define CFG_MAC_ADDR_SPI_MODE SPI_MODE_3
50
51#define CFG_MAC_ADDR_OFFSET (flash->size - SZ_64K)
52
53#ifdef CONFIG_MAC_ADDR_IN_SPIFLASH
54static int get_mac_addr(u8 *addr)
55{
56 struct spi_flash *flash;
57 int ret;
58
59 flash = spi_flash_probe(CFG_MAC_ADDR_SPI_BUS, CFG_MAC_ADDR_SPI_CS,
60 CFG_MAC_ADDR_SPI_MAX_HZ, CFG_MAC_ADDR_SPI_MODE);
61 if (!flash) {
62 printf("Error - unable to probe SPI flash.\n");
63 return -1;
64 }
65
Adam Ford49223d02019-05-29 09:36:58 -050066 ret = spi_flash_read(flash, (CFG_MAC_ADDR_OFFSET), 6, addr);
Hadli, Manjunathad713212012-02-09 20:22:24 +000067 if (ret) {
68 printf("Error - unable to read MAC address from SPI flash.\n");
69 return -1;
70 }
71
72 return ret;
73}
74#endif
75
Nagabhushana Netagunte24d30962011-09-03 22:19:28 -040076void dsp_lpsc_on(unsigned domain, unsigned int id)
77{
78 dv_reg_p mdstat, mdctl, ptstat, ptcmd;
79 struct davinci_psc_regs *psc_regs;
80
81 psc_regs = davinci_psc0_regs;
82 mdstat = &psc_regs->psc0.mdstat[id];
83 mdctl = &psc_regs->psc0.mdctl[id];
84 ptstat = &psc_regs->ptstat;
85 ptcmd = &psc_regs->ptcmd;
86
87 while (*ptstat & (0x1 << domain))
88 ;
89
90 if ((*mdstat & 0x1f) == 0x03)
91 return; /* Already on and enabled */
92
93 *mdctl |= 0x03;
94
95 *ptcmd = 0x1 << domain;
96
97 while (*ptstat & (0x1 << domain))
98 ;
99 while ((*mdstat & 0x1f) != 0x03)
100 ; /* Probably an overkill... */
101}
102
103static void dspwake(void)
104{
105 unsigned *resetvect = (unsigned *)DAVINCI_L3CBARAM_BASE;
106 u32 val;
107
108 /* if the device is ARM only, return */
109 if ((readl(CHIP_REV_ID_REG) & 0x3f) == 0x10)
110 return;
111
112 if (hwconfig_subarg_cmp_f("dsp", "wake", "no", NULL))
113 return;
114
115 *resetvect++ = 0x1E000; /* DSP Idle */
116 /* clear out the next 10 words as NOP */
117 memset(resetvect, 0, sizeof(unsigned) *10);
118
119 /* setup the DSP reset vector */
120 writel(DAVINCI_L3CBARAM_BASE, HOST1CFG);
121
122 dsp_lpsc_on(1, DAVINCI_LPSC_GEM);
123 val = readl(PSC0_MDCTL + (15 * 4));
124 val |= 0x100;
125 writel(val, (PSC0_MDCTL + (15 * 4)));
126}
127
128int misc_init_r(void)
129{
130 dspwake();
Hadli, Manjunathad713212012-02-09 20:22:24 +0000131
Hadli, Manjunathe7bcd8a2012-02-09 20:22:25 +0000132#if defined(CONFIG_MAC_ADDR_IN_SPIFLASH) || defined(CONFIG_MAC_ADDR_IN_EEPROM)
133
Hadli, Manjunathad713212012-02-09 20:22:24 +0000134 uchar env_enetaddr[6];
135 int enetaddr_found;
Hadli, Manjunathe7bcd8a2012-02-09 20:22:25 +0000136
Simon Glass399a9ce2017-08-03 12:22:14 -0600137 enetaddr_found = eth_env_get_enetaddr("ethaddr", env_enetaddr);
Hadli, Manjunathe7bcd8a2012-02-09 20:22:25 +0000138
Adam Ford48889912017-09-08 17:01:17 -0500139#endif
140
Hadli, Manjunathe7bcd8a2012-02-09 20:22:25 +0000141#ifdef CONFIG_MAC_ADDR_IN_SPIFLASH
Hadli, Manjunathad713212012-02-09 20:22:24 +0000142 int spi_mac_read;
143 uchar buff[6];
144
Hadli, Manjunathad713212012-02-09 20:22:24 +0000145 spi_mac_read = get_mac_addr(buff);
Adam Ford5ff6c0a2017-09-17 20:43:46 -0500146 buff[0] = 0;
Hadli, Manjunathad713212012-02-09 20:22:24 +0000147
148 /*
149 * MAC address not present in the environment
150 * try and read the MAC address from SPI flash
151 * and set it.
152 */
153 if (!enetaddr_found) {
154 if (!spi_mac_read) {
Joe Hershberger8ecdbed2015-04-08 01:41:04 -0500155 if (is_valid_ethaddr(buff)) {
Simon Glass8551d552017-08-03 12:22:11 -0600156 if (eth_env_set_enetaddr("ethaddr", buff)) {
Hadli, Manjunathad713212012-02-09 20:22:24 +0000157 printf("Warning: Failed to "
158 "set MAC address from SPI flash\n");
159 }
160 } else {
161 printf("Warning: Invalid "
162 "MAC address read from SPI flash\n");
163 }
164 }
165 } else {
166 /*
167 * MAC address present in environment compare it with
168 * the MAC address in SPI flash and warn on mismatch
169 */
Joe Hershberger8ecdbed2015-04-08 01:41:04 -0500170 if (!spi_mac_read && is_valid_ethaddr(buff) &&
171 memcmp(env_enetaddr, buff, 6))
Hadli, Manjunathad713212012-02-09 20:22:24 +0000172 printf("Warning: MAC address in SPI flash don't match "
173 "with the MAC address in the environment\n");
Andre Przywara75f68292016-11-16 00:50:12 +0000174 printf("Default using MAC address from environment\n");
Hadli, Manjunathad713212012-02-09 20:22:24 +0000175 }
Adam Ford48889912017-09-08 17:01:17 -0500176
177#elif defined(CONFIG_MAC_ADDR_IN_EEPROM)
Hadli, Manjunathe7bcd8a2012-02-09 20:22:25 +0000178 uint8_t enetaddr[8];
179 int eeprom_mac_read;
180
181 /* Read Ethernet MAC address from EEPROM */
182 eeprom_mac_read = dvevm_read_mac_address(enetaddr);
183
184 /*
185 * MAC address not present in the environment
186 * try and read the MAC address from EEPROM flash
187 * and set it.
188 */
189 if (!enetaddr_found) {
190 if (eeprom_mac_read)
191 /* Set Ethernet MAC address from EEPROM */
192 davinci_sync_env_enetaddr(enetaddr);
193 } else {
194 /*
195 * MAC address present in environment compare it with
196 * the MAC address in EEPROM and warn on mismatch
197 */
198 if (eeprom_mac_read && memcmp(enetaddr, env_enetaddr, 6))
199 printf("Warning: MAC address in EEPROM don't match "
200 "with the MAC address in the environment\n");
Andre Przywara75f68292016-11-16 00:50:12 +0000201 printf("Default using MAC address from environment\n");
Hadli, Manjunathe7bcd8a2012-02-09 20:22:25 +0000202 }
203
Hadli, Manjunathad713212012-02-09 20:22:24 +0000204#endif
Nagabhushana Netagunte24d30962011-09-03 22:19:28 -0400205 return 0;
206}
Lad, Prabhakar16787da2012-06-24 21:35:15 +0000207
Christian Rieschb10592f2011-11-28 23:46:18 +0000208static const struct pinmux_config gpio_pins[] = {
Adam Ford1db1b562020-06-29 18:49:41 -0500209#ifdef CONFIG_MTD_NOR_FLASH
Christian Rieschb10592f2011-11-28 23:46:18 +0000210 /* GP0[11] is required for NOR to work on Rev 3 EVMs */
211 { pinmux(0), 8, 4 }, /* GP0[11] */
212#endif
Masahiro Yamadab2c88682017-01-10 13:32:07 +0900213#ifdef CONFIG_MMC_DAVINCI
Lad, Prabhakar16787da2012-06-24 21:35:15 +0000214 /* GP0[11] is required for SD to work on Rev 3 EVMs */
215 { pinmux(0), 8, 4 }, /* GP0[11] */
216#endif
Christian Rieschb10592f2011-11-28 23:46:18 +0000217};
218
Christian Riesch63e341b2011-12-09 09:47:37 +0000219const struct pinmux_resource pinmuxes[] = {
Christian Riesch0db1ffd2011-11-28 23:46:16 +0000220#ifdef CONFIG_DRIVER_TI_EMAC
Christian Rieschb10592f2011-11-28 23:46:18 +0000221 PINMUX_ITEM(emac_pins_mdio),
222#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
223 PINMUX_ITEM(emac_pins_rmii),
224#else
225 PINMUX_ITEM(emac_pins_mii),
Adam Ford3c29d262019-07-31 09:17:31 -0500226#endif
227#endif
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +0530228#ifdef CONFIG_SPI_FLASH
Christian Rieschb10592f2011-11-28 23:46:18 +0000229 PINMUX_ITEM(spi1_pins_base),
230 PINMUX_ITEM(spi1_pins_scs0),
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +0530231#endif
Christian Rieschb10592f2011-11-28 23:46:18 +0000232 PINMUX_ITEM(uart2_pins_txrx),
233 PINMUX_ITEM(uart2_pins_rtscts),
234 PINMUX_ITEM(i2c0_pins),
Ben Gardinerf522c1b2010-10-14 17:26:19 -0400235#ifdef CONFIG_NAND_DAVINCI
Christian Rieschb10592f2011-11-28 23:46:18 +0000236 PINMUX_ITEM(emifa_pins_cs3),
237 PINMUX_ITEM(emifa_pins_cs4),
238 PINMUX_ITEM(emifa_pins_nand),
Adam Ford1db1b562020-06-29 18:49:41 -0500239#elif defined(CONFIG_MTD_NOR_FLASH)
Christian Rieschb10592f2011-11-28 23:46:18 +0000240 PINMUX_ITEM(emifa_pins_cs2),
241 PINMUX_ITEM(emifa_pins_nor),
Ben Gardinerf522c1b2010-10-14 17:26:19 -0400242#endif
Christian Rieschb10592f2011-11-28 23:46:18 +0000243 PINMUX_ITEM(gpio_pins),
Masahiro Yamadab2c88682017-01-10 13:32:07 +0900244#ifdef CONFIG_MMC_DAVINCI
Lad, Prabhakar16787da2012-06-24 21:35:15 +0000245 PINMUX_ITEM(mmc0_pins),
246#endif
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +0530247};
248
Christian Riesch63e341b2011-12-09 09:47:37 +0000249const int pinmuxes_size = ARRAY_SIZE(pinmuxes);
250
Sughosh Ganua2616972012-02-02 00:44:41 +0000251const struct lpsc_resource lpsc[] = {
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +0530252 { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
253 { DAVINCI_LPSC_SPI1 }, /* Serial Flash */
254 { DAVINCI_LPSC_EMAC }, /* image download */
255 { DAVINCI_LPSC_UART2 }, /* console */
256 { DAVINCI_LPSC_GPIO },
Masahiro Yamadab2c88682017-01-10 13:32:07 +0900257#ifdef CONFIG_MMC_DAVINCI
Lad, Prabhakar16787da2012-06-24 21:35:15 +0000258 { DAVINCI_LPSC_MMC_SD },
259#endif
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +0530260};
261
Sughosh Ganua2616972012-02-02 00:44:41 +0000262const int lpsc_size = ARRAY_SIZE(lpsc);
263
Sekhar Nori6e112202010-11-19 11:39:48 -0500264#ifndef CONFIG_DA850_EVM_MAX_CPU_CLK
265#define CONFIG_DA850_EVM_MAX_CPU_CLK 300000000
266#endif
267
Manjunath Hadliac37fcb2011-10-10 21:06:38 +0000268#define REV_AM18X_EVM 0x100
269
Sekhar Nori6e112202010-11-19 11:39:48 -0500270/*
271 * get_board_rev() - setup to pass kernel board revision information
272 * Returns:
273 * bit[0-3] Maximum cpu clock rate supported by onboard SoC
274 * 0000b - 300 MHz
275 * 0001b - 372 MHz
276 * 0010b - 408 MHz
277 * 0011b - 456 MHz
278 */
279u32 get_board_rev(void)
280{
281 char *s;
282 u32 maxcpuclk = CONFIG_DA850_EVM_MAX_CPU_CLK;
283 u32 rev = 0;
284
Simon Glass64b723f2017-08-03 12:22:12 -0600285 s = env_get("maxcpuclk");
Sekhar Nori6e112202010-11-19 11:39:48 -0500286 if (s)
Simon Glassff9b9032021-07-24 09:03:30 -0600287 maxcpuclk = dectoul(s, NULL);
Sekhar Nori6e112202010-11-19 11:39:48 -0500288
289 if (maxcpuclk >= 456000000)
290 rev = 3;
291 else if (maxcpuclk >= 408000000)
292 rev = 2;
293 else if (maxcpuclk >= 372000000)
294 rev = 1;
Sekhar Nori6e112202010-11-19 11:39:48 -0500295 return rev;
296}
297
Christian Riesch79b0c8a2011-10-13 00:52:29 +0000298int board_early_init_f(void)
299{
300 /*
301 * Power on required peripherals
302 * ARM does not have access by default to PSC0 and PSC1
303 * assuming here that the DSP bootloader has set the IOPU
304 * such that PSC access is available to ARM
305 */
306 if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
307 return 1;
308
309 return 0;
310}
311
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +0530312int board_init(void)
313{
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +0530314 irq_init();
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +0530315
Ben Gardinercf86d2c2010-10-14 17:26:22 -0400316#ifdef CONFIG_NAND_DAVINCI
317 /*
318 * NAND CS setup - cycle counts based on da850evm NAND timings in the
319 * Linux kernel @ 25MHz EMIFA
320 */
Lad, Prabhakard79255d2012-06-24 21:35:21 +0000321 writel((DAVINCI_ABCR_WSETUP(2) |
322 DAVINCI_ABCR_WSTROBE(2) |
323 DAVINCI_ABCR_WHOLD(1) |
324 DAVINCI_ABCR_RSETUP(1) |
325 DAVINCI_ABCR_RSTROBE(4) |
Ben Gardinercf86d2c2010-10-14 17:26:22 -0400326 DAVINCI_ABCR_RHOLD(0) |
Ben Gardinerf5583802011-04-20 16:25:06 -0400327 DAVINCI_ABCR_TA(1) |
Ben Gardinercf86d2c2010-10-14 17:26:22 -0400328 DAVINCI_ABCR_ASIZE_8BIT),
329 &davinci_emif_regs->ab2cr); /* CS3 */
330#endif
331
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +0530332 /* arch number of the board */
333 gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM;
334
335 /* address of boot parameters */
336 gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
337
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +0530338 /* setup the SUSPSRC for ARM to control emulation suspend */
339 writel(readl(&davinci_syscfg_regs->suspsrc) &
340 ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
341 DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
342 DAVINCI_SYSCFG_SUSPSRC_UART2),
343 &davinci_syscfg_regs->suspsrc);
344
Adam Ford1db1b562020-06-29 18:49:41 -0500345#ifdef CONFIG_MTD_NOR_FLASH
Nagabhushana Netagunte63e201f2011-09-03 22:21:04 -0400346 /* Set the GPIO direction as output */
Christian Riesch248b4ce2013-06-14 14:22:36 +0200347 clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11));
Nagabhushana Netagunte63e201f2011-09-03 22:21:04 -0400348
349 /* Set the output as low */
Christian Riesch248b4ce2013-06-14 14:22:36 +0200350 writel(0x01 << 11, GPIO_BANK0_REG_CLR_ADDR);
Nagabhushana Netagunte63e201f2011-09-03 22:21:04 -0400351#endif
352
Masahiro Yamadab2c88682017-01-10 13:32:07 +0900353#ifdef CONFIG_MMC_DAVINCI
Rajashekhara, Sudhakar12ca04b2012-06-24 21:35:16 +0000354 /* Set the GPIO direction as output */
355 clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11));
356
357 /* Set the output as high */
Christian Riesch248b4ce2013-06-14 14:22:36 +0200358 writel(0x01 << 11, GPIO_BANK0_REG_SET_ADDR);
Rajashekhara, Sudhakar12ca04b2012-06-24 21:35:16 +0000359#endif
360
Ben Gardiner4b9538a2010-10-14 17:26:29 -0400361#ifdef CONFIG_DRIVER_TI_EMAC
Stefano Babic6470f732010-11-30 11:32:10 -0500362 davinci_emac_mii_mode_sel(HAS_RMII);
Ben Gardiner4b9538a2010-10-14 17:26:29 -0400363#endif /* CONFIG_DRIVER_TI_EMAC */
364
Sudhakar Rajashekhara68921812010-06-10 15:18:15 +0530365 return 0;
366}
Ben Gardiner4b9538a2010-10-14 17:26:29 -0400367
368#ifdef CONFIG_DRIVER_TI_EMAC
369
Sudhakar Rajashekhara5851e122010-11-18 09:59:37 -0500370#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
371/**
372 * rmii_hw_init
373 *
374 * DA850/OMAP-L138 EVM can interface to a daughter card for
375 * additional features. This card has an I2C GPIO Expander TCA6416
376 * to select the required functions like camera, RMII Ethernet,
377 * character LCD, video.
378 *
379 * Initialization of the expander involves configuring the
380 * polarity and direction of the ports. P07-P05 are used here.
381 * These ports are connected to a Mux chip which enables only one
382 * functionality at a time.
383 *
384 * For RMII phy to respond, the MII MDIO clock has to be disabled
385 * since both the PHY devices have address as zero. The MII MDIO
386 * clock is controlled via GPIO2[6].
387 *
388 * This code is valid for Beta version of the hardware
389 */
390int rmii_hw_init(void)
391{
392 const struct pinmux_config gpio_pins[] = {
393 { pinmux(6), 8, 1 }
394 };
395 u_int8_t buf[2];
396 unsigned int temp;
397 int ret;
398
399 /* PinMux for GPIO */
400 if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0)
401 return 1;
402
403 /* I2C Exapnder configuration */
404 /* Set polarity to non-inverted */
405 buf[0] = 0x0;
406 buf[1] = 0x0;
407 ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 4, 1, buf, 2);
408 if (ret) {
409 printf("\nExpander @ 0x%02x write FAILED!!!\n",
410 CONFIG_SYS_I2C_EXPANDER_ADDR);
411 return ret;
412 }
413
414 /* Configure P07-P05 as outputs */
415 buf[0] = 0x1f;
416 buf[1] = 0xff;
417 ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 6, 1, buf, 2);
418 if (ret) {
419 printf("\nExpander @ 0x%02x write FAILED!!!\n",
420 CONFIG_SYS_I2C_EXPANDER_ADDR);
421 }
422
423 /* For Ethernet RMII selection
424 * P07(SelA)=0
425 * P06(SelB)=1
426 * P05(SelC)=1
427 */
428 if (i2c_read(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) {
429 printf("\nExpander @ 0x%02x read FAILED!!!\n",
430 CONFIG_SYS_I2C_EXPANDER_ADDR);
431 }
432
433 buf[0] &= 0x1f;
434 buf[0] |= (0 << 7) | (1 << 6) | (1 << 5);
435 if (i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) {
436 printf("\nExpander @ 0x%02x write FAILED!!!\n",
437 CONFIG_SYS_I2C_EXPANDER_ADDR);
438 }
439
440 /* Set the output as high */
441 temp = REG(GPIO_BANK2_REG_SET_ADDR);
442 temp |= (0x01 << 6);
443 REG(GPIO_BANK2_REG_SET_ADDR) = temp;
444
445 /* Set the GPIO direction as output */
446 temp = REG(GPIO_BANK2_REG_DIR_ADDR);
447 temp &= ~(0x01 << 6);
448 REG(GPIO_BANK2_REG_DIR_ADDR) = temp;
449
450 return 0;
451}
452#endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */
453
Ben Gardiner4b9538a2010-10-14 17:26:29 -0400454/*
455 * Initializes on-board ethernet controllers.
456 */
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +0900457int board_eth_init(struct bd_info *bis)
Ben Gardiner4b9538a2010-10-14 17:26:29 -0400458{
Sudhakar Rajashekhara5851e122010-11-18 09:59:37 -0500459#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
460 /* Select RMII fucntion through the expander */
461 if (rmii_hw_init())
462 printf("RMII hardware init failed!!!\n");
463#endif
Ben Gardiner4b9538a2010-10-14 17:26:29 -0400464 return 0;
465}
466#endif /* CONFIG_DRIVER_TI_EMAC */