Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / b38cf8ef12509644b30f6f70307b43fd2f1b3bf3 / . / configs / kmeter1_defconfig
blob: 228bbe6e8401a59be6fe8e53a921db4195cc497a [file] [log] [blame]
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]1CONFIG_PPC=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]2CONFIG_SYS_TEXT_BASE=0xF0000000
Heiko Schocher6753e812020-10-02 09:23:22 +0200[diff] [blame]3CONFIG_SYS_MALLOC_F_LEN=0x800
Holger Brunckac4eb2c2019-11-26 19:09:01 +0100[diff] [blame]4CONFIG_KM_DEF_NETDEV="eth2"
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]5CONFIG_ENV_SIZE=0x4000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]6CONFIG_ENV_SECT_SIZE=0x20000
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]7CONFIG_DEFAULT_DEVICE_TREE="kmeter1"
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]8CONFIG_BOOTCOUNT_BOOTLIMIT=3
Mario Sixd10f3182019-01-21 09:17:53 +0100[diff] [blame]9CONFIG_SYS_CLK_FREQ=66000000
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]10CONFIG_MPC83xx=y
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]11CONFIG_HIGH_BATS=y
Mario Six92e20d92019-01-21 09:17:35 +0100[diff] [blame]12CONFIG_TARGET_KMETER1=y
Mario Six94867102019-01-21 09:17:54 +0100[diff] [blame]13CONFIG_DDR_MC_CLOCK_MODE_1_1=y
14CONFIG_SYSTEM_PLL_VCO_DIV_4=y
15CONFIG_SYSTEM_PLL_FACTOR_4_1=y
16CONFIG_CORE_PLL_RATIO_2_1=y
17CONFIG_QUICC_MULT_FACTOR_6=y
18CONFIG_BOOT_MEMORY_SPACE_LOW=y
19CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
20CONFIG_LALE_TIMING_EARLIER=y
21CONFIG_LDP_PIN_MUX_STATE_0=y
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]22CONFIG_BAT0=y
23CONFIG_BAT0_NAME="SDRAM"
24CONFIG_BAT0_BASE=0x00000000
25CONFIG_BAT0_LENGTH_256_MBYTES=y
26CONFIG_BAT0_ACCESS_RW=y
27CONFIG_BAT0_ICACHE_INHIBITED=y
28CONFIG_BAT0_ICACHE_GUARDED=y
29CONFIG_BAT0_DCACHE_INHIBITED=y
30CONFIG_BAT0_DCACHE_GUARDED=y
31CONFIG_BAT0_USER_MODE_VALID=y
32CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
33CONFIG_BAT1=y
34CONFIG_BAT1_NAME="IMMR"
35CONFIG_BAT1_BASE=0xE0000000
36CONFIG_BAT1_LENGTH_4_MBYTES=y
37CONFIG_BAT1_ACCESS_RW=y
38CONFIG_BAT1_ICACHE_INHIBITED=y
39CONFIG_BAT1_ICACHE_GUARDED=y
40CONFIG_BAT1_DCACHE_INHIBITED=y
41CONFIG_BAT1_DCACHE_GUARDED=y
42CONFIG_BAT1_USER_MODE_VALID=y
43CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
44CONFIG_BAT2=y
45CONFIG_BAT2_NAME="KMBEC_FPGA"
46CONFIG_BAT2_BASE=0xE8000000
47CONFIG_BAT2_LENGTH_128_MBYTES=y
48CONFIG_BAT2_ACCESS_RW=y
49CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
50CONFIG_BAT2_DCACHE_INHIBITED=y
51CONFIG_BAT2_DCACHE_GUARDED=y
52CONFIG_BAT2_USER_MODE_VALID=y
53CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
54CONFIG_BAT3=y
55CONFIG_BAT3_NAME="FLASH"
56CONFIG_BAT3_BASE=0xF0000000
57CONFIG_BAT3_LENGTH_256_MBYTES=y
58CONFIG_BAT3_ACCESS_RW=y
59CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
60CONFIG_BAT3_DCACHE_INHIBITED=y
61CONFIG_BAT3_DCACHE_GUARDED=y
62CONFIG_BAT3_USER_MODE_VALID=y
63CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
Heiko Schocherf8e8f732020-10-02 09:23:21 +0200[diff] [blame]64CONFIG_BAT4=y
65CONFIG_BAT4_NAME="STACK_IN_DCACHE"
66CONFIG_BAT4_BASE=0xE6000000
67CONFIG_BAT4_ACCESS_RW=y
68CONFIG_BAT4_USER_MODE_VALID=y
69CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]70CONFIG_BAT5=y
71CONFIG_BAT5_NAME="PAXE"
72CONFIG_BAT5_BASE=0xA0000000
73CONFIG_BAT5_LENGTH_256_MBYTES=y
74CONFIG_BAT5_ACCESS_RW=y
75CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y
76CONFIG_BAT5_DCACHE_INHIBITED=y
77CONFIG_BAT5_DCACHE_GUARDED=y
78CONFIG_BAT5_USER_MODE_VALID=y
79CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
Mario Sixb47839c2019-01-21 09:17:58 +0100[diff] [blame]80CONFIG_LBLAW0=y
81CONFIG_LBLAW0_BASE=0xF0000000
82CONFIG_LBLAW0_NAME="FLASH"
83CONFIG_LBLAW0_LENGTH_256_MBYTES=y
84CONFIG_LBLAW1=y
85CONFIG_LBLAW1_BASE=0xE8000000
86CONFIG_LBLAW1_NAME="KMBEC_FPGA"
87CONFIG_LBLAW1_LENGTH_128_MBYTES=y
88CONFIG_LBLAW3=y
89CONFIG_LBLAW3_BASE=0xA0000000
90CONFIG_LBLAW3_NAME="PAXE"
91CONFIG_LBLAW3_LENGTH_512_MBYTES=y
Tom Rini66ea5c72019-05-26 14:45:25 -0400[diff] [blame]92CONFIG_ELBC_BR0_OR0=y
93CONFIG_BR0_OR0_NAME="FLASH"
94CONFIG_BR0_OR0_BASE=0xF0000000
95CONFIG_BR0_PORTSIZE_16BIT=y
96CONFIG_OR0_AM_256_MBYTES=y
97CONFIG_OR0_SCY_5=y
98CONFIG_OR0_CSNT_EARLIER=y
99CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
100CONFIG_OR0_TRLX_RELAXED=y
101CONFIG_OR0_EAD_EXTRA=y
102CONFIG_ELBC_BR1_OR1=y
103CONFIG_BR1_OR1_NAME="KMBEC_FPGA"
104CONFIG_BR1_OR1_BASE=0xE8000000
105CONFIG_OR1_AM_64_MBYTES=y
106CONFIG_OR1_SCY_2=y
107CONFIG_OR1_CSNT_EARLIER=y
108CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y
109CONFIG_OR1_TRLX_RELAXED=y
110CONFIG_OR1_EAD_EXTRA=y
111CONFIG_ELBC_BR3_OR3=y
112CONFIG_BR3_OR3_NAME="PAXE"
113CONFIG_BR3_OR3_BASE=0xA0000000
114CONFIG_OR3_AM_256_MBYTES=y
115CONFIG_OR3_SCY_2=y
116CONFIG_OR3_CSNT_EARLIER=y
117CONFIG_OR3_ACS_HALF_CYCLE_EARLIER=y
118CONFIG_OR3_TRLX_RELAXED=y
119CONFIG_OR3_EAD_EXTRA=y
Mario Six8b2141c2019-01-21 09:18:09 +0100[diff] [blame]120CONFIG_HID0_FINAL_EMCP=y
121CONFIG_HID0_FINAL_ICE=y
122CONFIG_HID2_HBE=y
Mario Sixaa502542019-01-21 09:18:12 +0100[diff] [blame]123CONFIG_ACR_PIPE_DEP_4=y
124CONFIG_ACR_RPTCNT_4=y
125CONFIG_ACR_APARK_MASTER=y
126CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
Tom Rini66ea5c72019-05-26 14:45:25 -0400[diff] [blame]127CONFIG_LCRR_DBYP_PLL_BYPASSED=y
128CONFIG_LCRR_EADC_2=y
129CONFIG_LCRR_CLKDIV_4=y
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]130CONFIG_SYS_LOAD_ADDR=0x100000
Simon Glasse3ee2fb2016-02-22 22:55:43 -0700[diff] [blame]131CONFIG_OF_BOARD_SETUP=y
132CONFIG_OF_STDOUT_VIA_ALIAS=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]133CONFIG_AUTOBOOT_KEYED=y
134CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n"
135CONFIG_AUTOBOOT_STOP_STR=" "
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]136CONFIG_BOARD_EARLY_INIT_R=y
137CONFIG_LAST_STAGE_INIT=y
138CONFIG_MISC_INIT_R=y
139CONFIG_HUSH_PARSER=y
Tuomas Tynkkynen28d56bd2017-10-08 21:48:01 +0300[diff] [blame]140CONFIG_CMD_IMLS=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]141CONFIG_CMD_ASKENV=y
142CONFIG_CMD_GREPENV=y
Simon Glass4590d4e2017-05-17 03:25:10 -0600[diff] [blame]143CONFIG_CMD_EEPROM=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]144CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
145CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
146CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]147CONFIG_CMD_I2C=y
Heiko Schocher3c521072020-02-03 07:43:57 +0100[diff] [blame]148# CONFIG_CMD_PINMUX is not set
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]149CONFIG_CMD_DHCP=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]150CONFIG_CMD_MII=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]151CONFIG_CMD_PING=y
Simon Glassc4abb4b2017-05-17 03:25:37 -0600[diff] [blame]152CONFIG_CMD_JFFS2=y
Tom Rini2b62b912018-11-13 19:54:45 -0500[diff] [blame]153CONFIG_CMD_MTDPARTS=y
Tom Rini5ad8e112017-10-22 17:55:07 -0400[diff] [blame]154CONFIG_MTDIDS_DEFAULT="nor0=boot"
155CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi0);"
Heiko Schocher09dbb852016-09-21 07:58:19 +0200[diff] [blame]156CONFIG_CMD_UBI=y
Tom Rinic20bb732017-07-22 18:36:16 -0400[diff] [blame]157# CONFIG_CMD_UBIFS is not set
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]158CONFIG_ENV_OVERWRITE=y
Tom Rini4bb26a42019-11-10 11:28:03 -0500[diff] [blame]159CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]160CONFIG_ENV_ADDR=0xF00C0000
161CONFIG_ENV_ADDR_REDUND=0xF00E0000
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]162CONFIG_VERSION_VARIABLE=y
Lukasz Majewski6dd8c902018-02-09 23:50:57 +0100[diff] [blame]163CONFIG_BOOTCOUNT_LIMIT=y
Heiko Schocher3c521072020-02-03 07:43:57 +0100[diff] [blame]164CONFIG_DM_BOOTCOUNT=y
165CONFIG_BOOTCOUNT_MEM=y
Tom Rinif7eed202021-11-13 18:10:40 -0500[diff] [blame]166CONFIG_SYS_BR0_PRELIM_BOOL=y
167CONFIG_SYS_BR0_PRELIM=0xF0001001
168CONFIG_SYS_OR0_PRELIM=0xF0000E55
169CONFIG_SYS_BR1_PRELIM_BOOL=y
170CONFIG_SYS_BR1_PRELIM=0xE8000801
171CONFIG_SYS_OR1_PRELIM=0xFC000E25
172CONFIG_SYS_BR3_PRELIM_BOOL=y
173CONFIG_SYS_BR3_PRELIM=0xA0000801
174CONFIG_SYS_OR3_PRELIM=0xF0000E25
Tom Rini52b2e262021-08-18 23:12:24 -0400[diff] [blame]175CONFIG_SYS_I2C_LEGACY=y
Tom Rinibe94c762021-08-18 23:12:35 -0400[diff] [blame]176CONFIG_SYS_I2C_FSL=y
177CONFIG_SYS_FSL_I2C_OFFSET=0x3000
178CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
179CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
180CONFIG_SYS_I2C_SLAVE=0x7F
181CONFIG_SYS_I2C_SPEED=200000
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]182# CONFIG_MMC is not set
Miquel Raynal2e35dbb2019-10-03 19:50:05 +0200[diff] [blame]183CONFIG_MTD=y
Masahiro Yamada8cea9b52017-02-11 22:43:54 +0900[diff] [blame]184CONFIG_MTD_NOR_FLASH=y
Adam Ford76da1b22018-10-14 15:10:50 -0500[diff] [blame]185CONFIG_FLASH_CFI_DRIVER=y
186CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
187CONFIG_FLASH_CFI_MTD=y
188CONFIG_SYS_FLASH_PROTECTION=y
189CONFIG_SYS_FLASH_CFI=y
Heiko Schocher3c521072020-02-03 07:43:57 +0100[diff] [blame]190CONFIG_DM_ETH_PHY=y
191CONFIG_QE_UEC=y
Tom Rinif48e0252016-10-26 17:15:37 -0400[diff] [blame]192# CONFIG_PCI is not set
Tom Rinifa911f82019-05-12 07:59:12 -0400[diff] [blame]193CONFIG_QE=y
Thomas Choua6cec012015-11-19 21:48:14 +0800[diff] [blame]194CONFIG_SYS_NS16550=y