blob: f9aaf37247825d84f4a7b8a2b875cbb933b30b89 [file] [log] [blame]
Tom Rinie33610c2021-12-14 13:36:35 -05001config ARCH_MAP_SYSMEM
Tom Rini53320122022-04-06 09:21:25 -04002 depends on SANDBOX
Tom Rinie33610c2021-12-14 13:36:35 -05003 def_bool y
4
Masahiro Yamada58654502015-07-15 20:59:29 +09005config CREATE_ARCH_SYMLINK
6 bool
7
Masahiro Yamada332b8292016-06-28 10:48:42 +09008config HAVE_ARCH_IOREMAP
9 bool
10
Tom Rini3ef67ae2021-08-26 11:47:59 -040011config SYS_CACHE_SHIFT_4
12 bool
13
14config SYS_CACHE_SHIFT_5
15 bool
16
17config SYS_CACHE_SHIFT_6
18 bool
19
20config SYS_CACHE_SHIFT_7
21 bool
22
Dan Carpenter13ec9f82024-03-04 10:04:15 +030023config 32BIT
24 bool
25
26config 64BIT
27 bool
28
Tom Rini3ef67ae2021-08-26 11:47:59 -040029config SYS_CACHELINE_SIZE
30 int
31 default 128 if SYS_CACHE_SHIFT_7
32 default 64 if SYS_CACHE_SHIFT_6
33 default 32 if SYS_CACHE_SHIFT_5
34 default 16 if SYS_CACHE_SHIFT_4
35 # Fall-back for MIPS
36 default 32 if MIPS
37
Simon Glassb87153c2020-12-16 21:20:06 -070038config LINKER_LIST_ALIGN
39 int
40 default 32 if SANDBOX
41 default 8 if ARM64 || X86
42 default 4
43 help
44 Force the each linker list to be aligned to this boundary. This
45 is required if ll_entry_get() is used, since otherwise the linker
46 may add padding into the table, thus breaking it.
47 See linker_lists.rst for full details.
48
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090049choice
50 prompt "Architecture select"
51 default SANDBOX
52
53config ARC
54 bool "ARC architecture"
Michal Simek84f3dec2018-07-23 15:55:13 +020055 select ARC_TIMER
Vlad Zakharova465df72017-03-21 14:49:49 +030056 select CLK
Michal Simekd5d59bd2020-08-19 10:44:20 +020057 select DM
Michal Simek84f3dec2018-07-23 15:55:13 +020058 select HAVE_PRIVATE_LIBGCC
59 select SUPPORT_OF_CONTROL
Tom Rini3ef67ae2021-08-26 11:47:59 -040060 select SYS_CACHE_SHIFT_7
Vlad Zakharova465df72017-03-21 14:49:49 +030061 select TIMER
Tom Rini7b7e0ad2022-07-31 21:08:23 -040062 select SYS_BIG_ENDIAN if CPU_BIG_ENDIAN
63 select SYS_LITTLE_ENDIAN if !CPU_BIG_ENDIAN
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090064
65config ARM
66 bool "ARM architecture"
Marek Behún4778a582021-05-20 13:24:22 +020067 select ARCH_SUPPORTS_LTO
Masahiro Yamada58654502015-07-15 20:59:29 +090068 select CREATE_ARCH_SYMLINK
Masahiro Yamada06280592015-07-03 16:13:09 +090069 select HAVE_PRIVATE_LIBGCC if !ARM64
Simon Glasse170f682021-12-01 09:02:38 -070070 select SUPPORT_ACPI
Masahiro Yamada9fadbc82014-09-22 19:59:05 +090071 select SUPPORT_OF_CONTROL
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090072
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090073config M68K
74 bool "M68000 architecture"
angelo@sysam.it5e798172015-12-06 17:47:59 +010075 select HAVE_PRIVATE_LIBGCC
Angelo Dureghello6000ebc2023-02-07 23:45:03 +010076 select USE_PRIVATE_LIBGCC
Derald D. Woodseb730bd2018-01-22 17:17:10 -060077 select SYS_BOOT_GET_CMDLINE
78 select SYS_BOOT_GET_KBD
Tom Rini3ef67ae2021-08-26 11:47:59 -040079 select SYS_CACHE_SHIFT_4
Angelo Dureghelloe007b152019-03-13 21:46:51 +010080 select SUPPORT_OF_CONTROL
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090081
82config MICROBLAZE
83 bool "MicroBlaze architecture"
Masahiro Yamada9fadbc82014-09-22 19:59:05 +090084 select SUPPORT_OF_CONTROL
Michal Simeke8e52772022-06-24 14:16:32 +020085 imply CMD_TIMER
86 imply SPL_REGMAP if SPL
87 imply SPL_TIMER if SPL
88 imply TIMER
89 imply XILINX_TIMER
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090090
91config MIPS
92 bool "MIPS architecture"
Masahiro Yamada332b8292016-06-28 10:48:42 +090093 select HAVE_ARCH_IOREMAP
Masahiro Yamada9520b712014-10-24 01:30:43 +090094 select HAVE_PRIVATE_LIBGCC
Daniel Schwierzeckde5b6e22015-12-19 20:20:48 +010095 select SUPPORT_OF_CONTROL
Sean Anderson13871e12022-04-12 10:59:04 -040096 select SPL_SEPARATE_BSS if SPL
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090097
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090098config NIOS2
99 bool "Nios II architecture"
Thomas Chouc6170262015-10-21 21:34:57 +0800100 select CPU
Michal Simek84f3dec2018-07-23 15:55:13 +0200101 select DM
Tom Rini7d3684a2023-01-16 15:46:49 -0500102 select DM_EVENT
Michal Simek84f3dec2018-07-23 15:55:13 +0200103 select OF_CONTROL
104 select SUPPORT_OF_CONTROL
Michal Simek2e7c8192018-07-23 15:55:14 +0200105 imply CMD_DM
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900106
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900107config PPC
108 bool "PowerPC architecture"
Masahiro Yamada9520b712014-10-24 01:30:43 +0900109 select HAVE_PRIVATE_LIBGCC
Simon Glass90f83c82015-02-07 11:51:35 -0700110 select SUPPORT_OF_CONTROL
Derald D. Woodseb730bd2018-01-22 17:17:10 -0600111 select SYS_BOOT_GET_CMDLINE
112 select SYS_BOOT_GET_KBD
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900113
Rick Chen3301bfc2017-12-26 13:55:58 +0800114config RISCV
Bin Meng6b697752018-09-26 06:55:06 -0700115 bool "RISC-V architecture"
Anup Patel0af3e852019-02-25 08:14:04 +0000116 select CREATE_ARCH_SYMLINK
Heinrich Schuchardt934addc2023-12-19 16:04:06 +0100117 select SUPPORT_ACPI
Rick Chen3301bfc2017-12-26 13:55:58 +0800118 select SUPPORT_OF_CONTROL
Bin Menga760eba2018-09-26 06:55:19 -0700119 select OF_CONTROL
120 select DM
Tom Rini7d3684a2023-01-16 15:46:49 -0500121 select DM_EVENT
Zong Li324463e2022-11-16 07:08:39 +0000122 imply SPL_SEPARATE_BSS if SPL
Bin Meng3880c382018-09-26 06:55:20 -0700123 imply DM_SERIAL
Bin Meng3880c382018-09-26 06:55:20 -0700124 imply DM_MMC
125 imply DM_SPI
126 imply DM_SPI_FLASH
127 imply BLK
128 imply CLK
129 imply MTD
130 imply TIMER
Bin Menga760eba2018-09-26 06:55:19 -0700131 imply CMD_DM
Lukas Auer396f0bd2019-08-21 21:14:45 +0200132 imply SPL_DM
133 imply SPL_OF_CONTROL
134 imply SPL_LIBCOMMON_SUPPORT
135 imply SPL_LIBGENERIC_SUPPORT
Simon Glassf4d60392021-08-08 12:20:12 -0600136 imply SPL_SERIAL
Lukas Auer396f0bd2019-08-21 21:14:45 +0200137 imply SPL_TIMER
Rick Chen3301bfc2017-12-26 13:55:58 +0800138
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900139config SANDBOX
140 bool "Sandbox"
Marek Behún72434932021-05-20 13:24:07 +0200141 select ARCH_SUPPORTS_LTO
Tom Rini22d567e2017-01-22 19:43:11 -0500142 select BOARD_LATE_INIT
Michael Walle8ffe86c2020-05-22 14:07:38 +0200143 select BZIP2
Simon Glassc13bbdc2023-10-26 14:31:34 -0400144 select CMD_POWEROFF if CMDLINE
Masahiro Yamada5ef5ccc2015-03-31 12:47:53 +0900145 select DM
Tom Rini7d3684a2023-01-16 15:46:49 -0500146 select DM_EVENT
Andrew Scull451b8b12022-05-30 10:00:12 +0000147 select DM_FUZZING_ENGINE
Michal Simek84f3dec2018-07-23 15:55:13 +0200148 select DM_GPIO
149 select DM_I2C
Masahiro Yamadab11b2352016-09-08 18:47:35 +0900150 select DM_KEYBOARD
Michal Simek84f3dec2018-07-23 15:55:13 +0200151 select DM_MMC
Masahiro Yamada5ef5ccc2015-03-31 12:47:53 +0900152 select DM_SERIAL
Masahiro Yamada5ef5ccc2015-03-31 12:47:53 +0900153 select DM_SPI
Michal Simek84f3dec2018-07-23 15:55:13 +0200154 select DM_SPI_FLASH
Michael Walle8ffe86c2020-05-22 14:07:38 +0200155 select GZIP_COMPRESSED
Tom Rini6a4a9082022-11-19 18:45:23 -0500156 select IO_TRACE
Tom Rinic20bb732017-07-22 18:36:16 -0400157 select LZO
Tom Riniddb1ec12024-01-10 13:46:10 -0500158 select MTD
Heinrich Schuchardta3fc9a42020-03-14 12:13:40 +0100159 select OF_BOARD_SETUP
Ramon Friedc64f19b2019-04-27 11:15:23 +0300160 select PCI_ENDPOINT
Michal Simek84f3dec2018-07-23 15:55:13 +0200161 select SPI
162 select SUPPORT_OF_CONTROL
Simon Glassc13bbdc2023-10-26 14:31:34 -0400163 select SYSRESET_CMD_POWEROFF if CMD_POWEROFF
Tom Rini3ef67ae2021-08-26 11:47:59 -0400164 select SYS_CACHE_SHIFT_4
Wasim Khan4dab60b2021-03-08 16:48:16 +0100165 select IRQ
Simon Glassc13bbdc2023-10-26 14:31:34 -0400166 select SUPPORT_EXTENSION_SCAN if CMDLINE
Simon Glassa6cee932021-12-01 09:02:36 -0700167 select SUPPORT_ACPI
Bin Meng0c0d9b02018-08-02 23:58:03 -0700168 imply BITREVERSE
Simon Glass78b0ef52018-11-15 18:43:53 -0700169 select BLOBLIST
Marek Behúnf8bd43f2021-05-20 13:24:08 +0200170 imply LTO
Michal Simek2e7c8192018-07-23 15:55:14 +0200171 imply CMD_DM
Heinrich Schuchardt0e298732020-11-12 00:29:59 +0100172 imply CMD_EXCEPTION
Simon Glassf4cb4742017-05-17 03:25:44 -0600173 imply CMD_GETTIME
Simon Glass027608e2017-05-17 03:25:25 -0600174 imply CMD_HASH
Simon Glass3bebbe62017-05-17 03:25:34 -0600175 imply CMD_IO
Simon Glass30daabc2017-05-17 03:25:36 -0600176 imply CMD_IOTRACE
Simon Glassbecaa8f2017-05-17 03:25:43 -0600177 imply CMD_LZMADEC
Tom Rinie5289a72019-05-29 17:01:28 -0400178 imply CMD_SF
Michal Simek84f3dec2018-07-23 15:55:13 +0200179 imply CMD_SF_TEST
Tom Rinid8532af2017-06-02 11:03:50 -0400180 imply CRC32_VERIFY
181 imply FAT_WRITE
Rajan Vajab3b2ddb2018-09-19 03:43:46 -0700182 imply FIRMWARE
Andrew Scull451b8b12022-05-30 10:00:12 +0000183 imply FUZZING_ENGINE_SANDBOX
Daniel Thompsona9e2c672017-05-19 17:26:58 +0100184 imply HASH_VERIFY
Tom Rinid8532af2017-06-02 11:03:50 -0400185 imply LZMA
Jens Wiklanderdca252d2018-09-25 16:40:17 +0200186 imply TEE
Jens Wiklanderf1edae92018-09-25 16:40:23 +0200187 imply AVB_VERIFY
188 imply LIBAVB
189 imply CMD_AVB
Heinrich Schuchardtce33bcd2022-01-16 13:04:06 +0100190 imply PARTITION_TYPE_GUID
Igor Opaniuk623369c2021-02-14 16:27:27 +0100191 imply SCP03
192 imply CMD_SCP03
Jens Wiklanderf1edae92018-09-25 16:40:23 +0200193 imply UDP_FUNCTION_FASTBOOT
Bin Meng1bb290d2018-10-15 02:21:26 -0700194 imply VIRTIO_MMIO
195 imply VIRTIO_PCI
196 imply VIRTIO_SANDBOX
197 imply VIRTIO_BLK
198 imply VIRTIO_NET
Simon Glass799b29b2018-12-10 10:37:31 -0700199 imply DM_SOUND
Ramon Friedc64f19b2019-04-27 11:15:23 +0300200 imply PCI_SANDBOX_EP
Simon Glass98d88f82019-02-16 20:24:49 -0700201 imply PCH
Alex Marginean0daa53a2019-06-03 19:12:28 +0300202 imply PHYLIB
203 imply DM_MDIO
Alex Marginean0649be52019-07-12 10:13:53 +0300204 imply DM_MDIO_MUX
Simon Glasse264be42023-05-04 16:54:57 -0600205 imply ACPI
Simon Glass8c501022019-12-06 21:41:54 -0700206 imply ACPI_PMC
207 imply ACPI_PMC_SANDBOX
208 imply CMD_PMC
John Chaufce6f982020-07-02 12:01:21 +0800209 imply CMD_CLONE
Simon Glass07a88862020-11-05 10:33:38 -0700210 imply SILENT_CONSOLE
Simon Glass529e2082020-11-05 10:33:48 -0700211 imply BOOTARGS_SUBST
Claudiu Manoild9eaa922021-03-14 20:14:57 +0800212 imply PHY_FIXED
213 imply DM_DSA
Kory Maincent965a34f2021-05-04 19:31:23 +0200214 imply CMD_EXTENSION
Simon Glass278efc682021-11-24 09:26:44 -0700215 imply KEYBOARD
Simon Glassef9e7622021-11-24 09:26:42 -0700216 imply PHYSMEM
Simon Glass29e64b52021-12-01 09:02:43 -0700217 imply GENERATE_ACPI_TABLE
Philippe Reynes462d1632022-03-28 22:56:53 +0200218 imply BINMAN
Alexander Gendin038cb022023-10-09 01:24:36 +0000219 imply CMD_MBR
220 imply CMD_MMC
Simon Glassb1dee9e2023-10-26 14:31:33 -0400221 imply BOOTSTD_DEFAULTS if BOOTSTD_FULL && CMDLINE
222 imply BOOTMETH_DISTRO if BOOTSTD_FULL && CMDLINE
223 imply CMD_SYSBOOT if BOOTSTD_FULL
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900224
225config SH
226 bool "SuperH architecture"
Masahiro Yamada9520b712014-10-24 01:30:43 +0900227 select HAVE_PRIVATE_LIBGCC
Marek Vasut8fc9fa12019-08-31 18:27:58 +0200228 select SUPPORT_OF_CONTROL
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900229
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900230config X86
231 bool "x86 architecture"
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600232 select SUPPORT_SPL
233 select SUPPORT_TPL
Masahiro Yamada58654502015-07-15 20:59:29 +0900234 select CREATE_ARCH_SYMLINK
Masahiro Yamada5ef5ccc2015-03-31 12:47:53 +0900235 select DM
Bin Meng59c4aa42018-10-15 02:21:16 -0700236 select HAVE_ARCH_IOMAP
Michal Simek84f3dec2018-07-23 15:55:13 +0200237 select HAVE_PRIVATE_LIBGCC
238 select OF_CONTROL
Bin Meng0e0204d2017-07-30 06:23:16 -0700239 select PCI
Simon Glassa6cee932021-12-01 09:02:36 -0700240 select SUPPORT_ACPI
Michal Simek84f3dec2018-07-23 15:55:13 +0200241 select SUPPORT_OF_CONTROL
Tom Rini3ef67ae2021-08-26 11:47:59 -0400242 select SYS_CACHE_SHIFT_6
Bin Mengf0e1c3e2017-07-30 06:23:07 -0700243 select TIMER
Michal Simek84f3dec2018-07-23 15:55:13 +0200244 select USE_PRIVATE_LIBGCC
Bin Mengf0e1c3e2017-07-30 06:23:07 -0700245 select X86_TSC_TIMER
Wasim Khan4a7fef72021-03-08 16:48:15 +0100246 select IRQ
Simon Glassf69c0092020-07-19 13:55:52 -0600247 imply HAS_ROM if X86_RESET_VECTOR
Bin Meng73f5bc12017-07-30 19:24:02 -0700248 imply BLK
Michal Simek2e7c8192018-07-23 15:55:14 +0200249 imply CMD_DM
Michal Simek84f3dec2018-07-23 15:55:13 +0200250 imply CMD_FPGA_LOADMK
251 imply CMD_GETTIME
252 imply CMD_IO
253 imply CMD_IRQ
254 imply CMD_PCI
Tom Rinie5289a72019-05-29 17:01:28 -0400255 imply CMD_SF
Michal Simek84f3dec2018-07-23 15:55:13 +0200256 imply CMD_SF_TEST
257 imply CMD_ZBOOT
Bin Meng0e0204d2017-07-30 06:23:16 -0700258 imply DM_GPIO
259 imply DM_KEYBOARD
Simon Glass828b7252017-07-30 19:24:01 -0700260 imply DM_MMC
Bin Meng0e0204d2017-07-30 06:23:16 -0700261 imply DM_RTC
Tom Rini15a2ab52023-10-27 20:59:51 -0400262 imply SCSI
Michal Simek84f3dec2018-07-23 15:55:13 +0200263 imply DM_SERIAL
Tom Riniddb1ec12024-01-10 13:46:10 -0500264 imply MTD
Bin Meng0e0204d2017-07-30 06:23:16 -0700265 imply DM_SPI
266 imply DM_SPI_FLASH
267 imply DM_USB
Simon Glass1cedca12023-08-21 21:17:01 -0600268 imply LAST_STAGE_INIT
Simon Glass52cb5042022-10-18 07:46:31 -0600269 imply VIDEO
Bin Mengaf5b8d22018-07-19 03:07:33 -0700270 imply SYSRESET
Kever Yang525ea472019-04-02 20:41:25 +0800271 imply SPL_SYSRESET
Bin Mengaf5b8d22018-07-19 03:07:33 -0700272 imply SYSRESET_X86
Chris Packhamb110e112017-08-28 20:50:46 +1200273 imply USB_ETHER_ASIX
274 imply USB_ETHER_SMSC95XX
Michal Simek84f3dec2018-07-23 15:55:13 +0200275 imply USB_HOST_ETHER
Simon Glass98d88f82019-02-16 20:24:49 -0700276 imply PCH
Simon Glassef9e7622021-11-24 09:26:42 -0700277 imply PHYSMEM
Simon Glass56382fb2019-05-02 10:52:24 -0600278 imply RTC_MC146818
Simon Glasse264be42023-05-04 16:54:57 -0600279 imply ACPI
Simon Glassb0282282021-12-01 09:02:39 -0700280 imply ACPIGEN if !QEMU && !EFI_APP
Simon Glassbee77f62020-11-05 06:32:17 -0700281 imply SYSINFO if GENERATE_SMBIOS_TABLE
282 imply SYSINFO_SMBIOS if GENERATE_SMBIOS_TABLE
Simon Glass65831d92021-12-18 11:27:50 -0700283 imply TIMESTAMP
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900284
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600285 # Thing to enable for when SPL/TPL are enabled: SPL
286 imply SPL_DM
287 imply SPL_OF_LIBFDT
Simon Glass284cb9c2021-07-10 21:14:31 -0600288 imply SPL_DRIVERS_MISC
Simon Glass035939e2021-07-10 21:14:30 -0600289 imply SPL_GPIO
Simon Glass7b1ecb82019-12-06 21:42:51 -0700290 imply SPL_PINCTRL
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600291 imply SPL_LIBCOMMON_SUPPORT
292 imply SPL_LIBGENERIC_SUPPORT
Simon Glassf4d60392021-08-08 12:20:12 -0600293 imply SPL_SERIAL
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600294 imply SPL_SPI_FLASH_SUPPORT
Simon Glassa5820472021-08-08 12:20:14 -0600295 imply SPL_SPI
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600296 imply SPL_OF_CONTROL
297 imply SPL_TIMER
298 imply SPL_REGMAP
299 imply SPL_SYSCON
300 # TPL
301 imply TPL_DM
Simon Glass284cb9c2021-07-10 21:14:31 -0600302 imply TPL_DRIVERS_MISC
Simon Glass035939e2021-07-10 21:14:30 -0600303 imply TPL_GPIO
Simon Glass7b1ecb82019-12-06 21:42:51 -0700304 imply TPL_PINCTRL
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600305 imply TPL_LIBCOMMON_SUPPORT
306 imply TPL_LIBGENERIC_SUPPORT
Simon Glassf4d60392021-08-08 12:20:12 -0600307 imply TPL_SERIAL
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600308 imply TPL_OF_CONTROL
309 imply TPL_TIMER
310 imply TPL_REGMAP
311 imply TPL_SYSCON
312
Chris Zankel1387dab2016-08-10 18:36:44 +0300313config XTENSA
314 bool "Xtensa architecture"
315 select CREATE_ARCH_SYMLINK
316 select SUPPORT_OF_CONTROL
317
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900318endchoice
319
Masahiro Yamada52a5f972014-09-14 03:01:48 +0900320config SYS_ARCH
321 string
322 help
323 This option should contain the architecture name to build the
324 appropriate arch/<CONFIG_SYS_ARCH> directory.
325 All the architectures should specify this option correctly.
326
327config SYS_CPU
328 string
329 help
330 This option should contain the CPU name to build the correct
331 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU> directory.
332
333 This is optional. For those targets without the CPU directory,
334 leave this option empty.
335
336config SYS_SOC
337 string
338 help
339 This option should contain the SoC name to build the directory
340 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU>/<CONFIG_SYS_SOC>.
341
342 This is optional. For those targets without the SoC directory,
343 leave this option empty.
344
345config SYS_VENDOR
346 string
347 help
348 This option should contain the vendor name of the target board.
349 If it is set and
350 board/<CONFIG_SYS_VENDOR>/common/Makefile exists, the vendor common
351 directory is compiled.
352 If CONFIG_SYS_BOARD is also set, the sources under
353 board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> directory are compiled.
354
355 This is optional. For those targets without the vendor directory,
356 leave this option empty.
357
358config SYS_BOARD
359 string
360 help
361 This option should contain the name of the target board.
362 If it is set, either board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD>
363 or board/<CONFIG_SYS_BOARD> directory is compiled depending on
364 whether CONFIG_SYS_VENDOR is set or not.
365
366 This is optional. For those targets without the board directory,
367 leave this option empty.
368
369config SYS_CONFIG_NAME
Tom Rinibce01ee2024-01-22 17:39:20 -0500370 string "Board header file" if ARCH_MESON || ARCH_VERSAL || \
371 ARCH_VERSAL_NET || ARCH_ZYNQ || ARCH_ZYNQMP || \
372 ARCH_ZYNQMP_R5 || MICROBLAZE || NIOS2
373 default "meson64" if ARCH_MESON
374 default "microblaze-generic" if MICROBLAZE
375 default "xilinx_versal" if ARCH_VERSAL
376 default "xilinx_versal_net" if ARCH_VERSAL_NET
377 default "xilinx_zynqmp" if ARCH_ZYNQMP
378 default "xilinx_zynqmp_r5" if ARCH_ZYNQMP_R5
379 default "zynq-common" if ARCH_ZYNQ
Masahiro Yamada52a5f972014-09-14 03:01:48 +0900380 help
381 This option should contain the base name of board header file.
382 The header file include/configs/<CONFIG_SYS_CONFIG_NAME>.h
383 should be included from include/config.h.
384
Vignesh Raghavendra384c1412019-04-22 21:43:32 +0530385config SYS_DISABLE_DCACHE_OPS
386 bool
387 help
388 This option disables dcache flush and dcache invalidation
389 operations. For example, on coherent systems where cache
390 operatios are not required, enable this option to avoid them.
391 Note that, its up to the individual architectures to implement
392 this functionality.
393
Tom Rinie9269a02021-12-12 22:12:30 -0500394config SYS_IMMR
Tom Rini0c4dded2022-03-30 09:30:15 -0400395 hex "Address for the Internal Memory-Mapped Registers (IMMR) window"
Tom Rinie9269a02021-12-12 22:12:30 -0500396 depends on PPC || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A
397 default 0xFF000000 if MPC8xx
398 default 0xF0000000 if ARCH_MPC8313
399 default 0xE0000000 if MPC83xx && !ARCH_MPC8313
400 default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
Pali Rohárc68991e2022-05-02 18:29:25 +0200401 default 0xFFE00000 if ARCH_P1010 || ARCH_P1011 || ARCH_P1020 || \
402 ARCH_P1021 || ARCH_P1024 || ARCH_P1025 || \
403 ARCH_P2020
Tom Rinie9269a02021-12-12 22:12:30 -0500404 default SYS_CCSRBAR_DEFAULT
405 help
406 Address for the Internal Memory-Mapped Registers (IMMR) window used
407 to configure the features of many Freescale / NXP SoCs.
408
Tom Rinib73cd902022-12-02 16:42:36 -0500409config MONITOR_IS_IN_RAM
410 bool "U-Boot is loaded in to RAM by a pre-loader"
411 depends on M68K || NIOS2
412
Heinrich Schuchardte6e7cb62022-12-30 19:41:28 +0100413menu "Skipping low level initialization functions"
Tom Rini53320122022-04-06 09:21:25 -0400414 depends on ARM || MIPS || RISCV
Heinrich Schuchardte6e7cb62022-12-30 19:41:28 +0100415
416config SKIP_LOWLEVEL_INIT
417 bool "Skip calls to certain low level initialization functions"
Tom Rinie1e85442021-08-27 21:18:30 -0400418 help
419 If enabled, then certain low level initializations (like setting up
420 the memory controller) are omitted and/or U-Boot does not relocate
421 itself into RAM.
422 Normally this variable MUST NOT be defined. The only exception is
423 when U-Boot is loaded (to RAM) by some other boot loader or by a
424 debugger which performs these initializations itself.
425
426config SPL_SKIP_LOWLEVEL_INIT
Heinrich Schuchardte6e7cb62022-12-30 19:41:28 +0100427 bool "Skip calls to certain low level initialization functions in SPL"
428 depends on SPL
Tom Rinie1e85442021-08-27 21:18:30 -0400429 help
430 If enabled, then certain low level initializations (like setting up
431 the memory controller) are omitted and/or U-Boot does not relocate
432 itself into RAM.
433 Normally this variable MUST NOT be defined. The only exception is
434 when U-Boot is loaded (to RAM) by some other boot loader or by a
435 debugger which performs these initializations itself.
436
437config TPL_SKIP_LOWLEVEL_INIT
Heinrich Schuchardte6e7cb62022-12-30 19:41:28 +0100438 bool "Skip calls to certain low level initialization functions in TPL"
Tom Rinie1e85442021-08-27 21:18:30 -0400439 depends on SPL && ARM
440 help
441 If enabled, then certain low level initializations (like setting up
442 the memory controller) are omitted and/or U-Boot does not relocate
443 itself into RAM.
444 Normally this variable MUST NOT be defined. The only exception is
445 when U-Boot is loaded (to RAM) by some other boot loader or by a
446 debugger which performs these initializations itself.
447
448config SKIP_LOWLEVEL_INIT_ONLY
Heinrich Schuchardte6e7cb62022-12-30 19:41:28 +0100449 bool "Skip call to lowlevel_init during early boot ONLY"
Tom Rinie1e85442021-08-27 21:18:30 -0400450 depends on ARM
451 help
452 This allows just the call to lowlevel_init() to be skipped. The
453 normal CP15 init (such as enabling the instruction cache) is still
454 performed.
455
456config SPL_SKIP_LOWLEVEL_INIT_ONLY
Heinrich Schuchardte6e7cb62022-12-30 19:41:28 +0100457 bool "Skip call to lowlevel_init during early SPL boot ONLY"
Tom Rinie1e85442021-08-27 21:18:30 -0400458 depends on SPL && ARM
459 help
460 This allows just the call to lowlevel_init() to be skipped. The
461 normal CP15 init (such as enabling the instruction cache) is still
462 performed.
463
464config TPL_SKIP_LOWLEVEL_INIT_ONLY
Heinrich Schuchardte6e7cb62022-12-30 19:41:28 +0100465 bool "Skip call to lowlevel_init during early TPL boot ONLY"
Tom Rinie1e85442021-08-27 21:18:30 -0400466 depends on TPL && ARM
467 help
468 This allows just the call to lowlevel_init() to be skipped. The
469 normal CP15 init (such as enabling the instruction cache) is still
470 performed.
471
Heinrich Schuchardte6e7cb62022-12-30 19:41:28 +0100472endmenu
473
Tom Rini295ab162022-10-28 20:27:10 -0400474config SYS_HAS_NONCACHED_MEMORY
475 bool "Enable reserving a non-cached memory area for drivers"
476 depends on (ARM || MIPS) && (RTL8169 || MEDIATEK_ETH)
477 help
478 This is useful for drivers that would otherwise require a lot of
479 explicit cache maintenance. For some drivers it's also impossible to
480 properly maintain the cache. For example if the regions that need to
481 be flushed are not a multiple of the cache-line size, *and* padding
482 cannot be allocated between the regions to align them (i.e. if the
483 HW requires a contiguous array of regions, and the size of each
484 region is not cache-aligned), then a flush of one region may result
485 in overwriting data that hardware has written to another region in
486 the same cache-line. This can happen for example in network drivers
487 where descriptors for buffers are typically smaller than the CPU
488 cache-line (e.g. 16 bytes vs. 32 or 64 bytes).
489
490config SYS_NONCACHED_MEMORY
491 hex "Size in bytes of the non-cached memory area"
492 depends on SYS_HAS_NONCACHED_MEMORY
493 default 0x100000
494 help
495 Size of non-cached memory area. This area of memory will be typically
496 located right below the malloc() area and mapped uncached in the MMU.
497
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900498source "arch/arc/Kconfig"
499source "arch/arm/Kconfig"
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900500source "arch/m68k/Kconfig"
501source "arch/microblaze/Kconfig"
502source "arch/mips/Kconfig"
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900503source "arch/nios2/Kconfig"
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900504source "arch/powerpc/Kconfig"
505source "arch/sandbox/Kconfig"
506source "arch/sh/Kconfig"
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900507source "arch/x86/Kconfig"
Chris Zankel1387dab2016-08-10 18:36:44 +0300508source "arch/xtensa/Kconfig"
Rick Chen3301bfc2017-12-26 13:55:58 +0800509source "arch/riscv/Kconfig"
Tom Rinia67ff802022-03-23 17:19:55 -0400510
Tom Rinic4aecf62022-06-16 14:04:36 -0400511if ARM || M68K || PPC
512
513source "arch/Kconfig.nxp"
514
515endif
516
Tom Rinia67ff802022-03-23 17:19:55 -0400517source "board/keymile/Kconfig"
Michal Simek9599f8f2022-06-24 14:14:59 +0200518
Michal Simek1a2f7b82022-06-24 14:14:59 +0200519if MIPS || MICROBLAZE
Michal Simek9599f8f2022-06-24 14:14:59 +0200520
521choice
522 prompt "Endianness selection"
523 help
524 Some MIPS boards can be configured for either little or big endian
525 byte order. These modes require different U-Boot images. In general there
526 is one preferred byteorder for a particular system but some systems are
527 just as commonly used in the one or the other endianness.
528
529config SYS_BIG_ENDIAN
530 bool "Big endian"
Michal Simek1a2f7b82022-06-24 14:14:59 +0200531 depends on (SUPPORTS_BIG_ENDIAN && MIPS) || MICROBLAZE
Michal Simek9599f8f2022-06-24 14:14:59 +0200532
533config SYS_LITTLE_ENDIAN
534 bool "Little endian"
Michal Simek1a2f7b82022-06-24 14:14:59 +0200535 depends on (SUPPORTS_LITTLE_ENDIAN && MIPS) || MICROBLAZE
Michal Simek9599f8f2022-06-24 14:14:59 +0200536
537endchoice
538
539endif