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git01.mediatek.com / filogic / uboot / b18c47e3fad1ef62057b1253a5e8bcace489648d / . / arch / arm / include / asm / arch-s5pc1xx / gpio.h
blob: da8df74a10a8f0041950758baac927df8f1c5cbe [file] [log] [blame]
Minkyu Kang87649982009-10-01 17:20:01 +0900[diff] [blame]1/*
2 * (C) Copyright 2009 Samsung Electronics
3 * Minkyu Kang <mk7.kang@samsung.com>
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +0200[diff] [blame]5 * SPDX-License-Identifier: GPL-2.0+
Minkyu Kang87649982009-10-01 17:20:01 +0900[diff] [blame]6 */
7
8#ifndef __ASM_ARCH_GPIO_H
9#define __ASM_ARCH_GPIO_H
10
11#ifndef __ASSEMBLY__
Minkyu Kangedec1dc2010-03-24 15:31:06 +0900[diff] [blame]12struct s5p_gpio_bank {
Minkyu Kangc6cb1842009-10-15 11:19:15 +0900[diff] [blame]13 unsigned int con;
14 unsigned int dat;
15 unsigned int pull;
16 unsigned int drv;
17 unsigned int pdn_con;
18 unsigned int pdn_pull;
Minkyu Kang87649982009-10-01 17:20:01 +0900[diff] [blame]19 unsigned char res1[8];
20};
21
22struct s5pc100_gpio {
Minkyu Kangfc62ca82010-08-25 13:45:43 +0900[diff] [blame]23 struct s5p_gpio_bank a0;
24 struct s5p_gpio_bank a1;
25 struct s5p_gpio_bank b;
26 struct s5p_gpio_bank c;
27 struct s5p_gpio_bank d;
28 struct s5p_gpio_bank e0;
29 struct s5p_gpio_bank e1;
30 struct s5p_gpio_bank f0;
31 struct s5p_gpio_bank f1;
32 struct s5p_gpio_bank f2;
33 struct s5p_gpio_bank f3;
34 struct s5p_gpio_bank g0;
35 struct s5p_gpio_bank g1;
36 struct s5p_gpio_bank g2;
37 struct s5p_gpio_bank g3;
38 struct s5p_gpio_bank i;
39 struct s5p_gpio_bank j0;
40 struct s5p_gpio_bank j1;
41 struct s5p_gpio_bank j2;
42 struct s5p_gpio_bank j3;
43 struct s5p_gpio_bank j4;
44 struct s5p_gpio_bank k0;
45 struct s5p_gpio_bank k1;
46 struct s5p_gpio_bank k2;
47 struct s5p_gpio_bank k3;
48 struct s5p_gpio_bank l0;
49 struct s5p_gpio_bank l1;
50 struct s5p_gpio_bank l2;
51 struct s5p_gpio_bank l3;
52 struct s5p_gpio_bank l4;
53 struct s5p_gpio_bank h0;
54 struct s5p_gpio_bank h1;
55 struct s5p_gpio_bank h2;
56 struct s5p_gpio_bank h3;
Minkyu Kang87649982009-10-01 17:20:01 +0900[diff] [blame]57};
58
59struct s5pc110_gpio {
Minkyu Kangfc62ca82010-08-25 13:45:43 +0900[diff] [blame]60 struct s5p_gpio_bank a0;
61 struct s5p_gpio_bank a1;
62 struct s5p_gpio_bank b;
63 struct s5p_gpio_bank c0;
64 struct s5p_gpio_bank c1;
65 struct s5p_gpio_bank d0;
66 struct s5p_gpio_bank d1;
67 struct s5p_gpio_bank e0;
68 struct s5p_gpio_bank e1;
69 struct s5p_gpio_bank f0;
70 struct s5p_gpio_bank f1;
71 struct s5p_gpio_bank f2;
72 struct s5p_gpio_bank f3;
73 struct s5p_gpio_bank g0;
74 struct s5p_gpio_bank g1;
75 struct s5p_gpio_bank g2;
76 struct s5p_gpio_bank g3;
77 struct s5p_gpio_bank i;
78 struct s5p_gpio_bank j0;
79 struct s5p_gpio_bank j1;
80 struct s5p_gpio_bank j2;
81 struct s5p_gpio_bank j3;
82 struct s5p_gpio_bank j4;
83 struct s5p_gpio_bank mp0_1;
84 struct s5p_gpio_bank mp0_2;
85 struct s5p_gpio_bank mp0_3;
86 struct s5p_gpio_bank mp0_4;
87 struct s5p_gpio_bank mp0_5;
88 struct s5p_gpio_bank mp0_6;
89 struct s5p_gpio_bank mp0_7;
90 struct s5p_gpio_bank mp1_0;
91 struct s5p_gpio_bank mp1_1;
92 struct s5p_gpio_bank mp1_2;
93 struct s5p_gpio_bank mp1_3;
94 struct s5p_gpio_bank mp1_4;
95 struct s5p_gpio_bank mp1_5;
96 struct s5p_gpio_bank mp1_6;
97 struct s5p_gpio_bank mp1_7;
98 struct s5p_gpio_bank mp1_8;
99 struct s5p_gpio_bank mp2_0;
100 struct s5p_gpio_bank mp2_1;
101 struct s5p_gpio_bank mp2_2;
102 struct s5p_gpio_bank mp2_3;
103 struct s5p_gpio_bank mp2_4;
104 struct s5p_gpio_bank mp2_5;
105 struct s5p_gpio_bank mp2_6;
106 struct s5p_gpio_bank mp2_7;
107 struct s5p_gpio_bank mp2_8;
Minkyu Kangedec1dc2010-03-24 15:31:06 +0900[diff] [blame]108 struct s5p_gpio_bank res1[48];
Minkyu Kangfc62ca82010-08-25 13:45:43 +0900[diff] [blame]109 struct s5p_gpio_bank h0;
110 struct s5p_gpio_bank h1;
111 struct s5p_gpio_bank h2;
112 struct s5p_gpio_bank h3;
Minkyu Kang87649982009-10-01 17:20:01 +0900[diff] [blame]113};
Minkyu Kang1edf0f22010-02-12 18:17:52 +0900[diff] [blame]114
115/* functions */
Łukasz Majewski4d954cc2011-07-15 00:16:22 +0000[diff] [blame]116void s5p_gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg);
117void s5p_gpio_direction_output(struct s5p_gpio_bank *bank, int gpio, int en);
118void s5p_gpio_direction_input(struct s5p_gpio_bank *bank, int gpio);
119void s5p_gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int en);
120unsigned int s5p_gpio_get_value(struct s5p_gpio_bank *bank, int gpio);
121void s5p_gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode);
122void s5p_gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode);
123void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode);
Łukasz Majewski1e04cae2011-08-22 22:34:58 +0000[diff] [blame]124
125/* GPIO pins per bank */
126#define GPIO_PER_BANK 8
127
Przemyslaw Marczakb18c47e2014-01-22 11:24:10 +0100[diff] [blame^]128#define S5P_GPIO_PART_SHIFT (24)
129#define S5P_GPIO_PART_MASK (0xff)
130#define S5P_GPIO_BANK_SHIFT (8)
131#define S5P_GPIO_BANK_MASK (0xffff)
132#define S5P_GPIO_PIN_MASK (0xff)
133
134#define S5P_GPIO_SET_PART(x) \
135 (((x) & S5P_GPIO_PART_MASK) << S5P_GPIO_PART_SHIFT)
136
137#define S5P_GPIO_GET_PART(x) \
138 (((x) >> S5P_GPIO_PART_SHIFT) & S5P_GPIO_PART_MASK)
139
140#define S5P_GPIO_SET_PIN(x) \
141 ((x) & S5P_GPIO_PIN_MASK)
Łukasz Majewski1e04cae2011-08-22 22:34:58 +0000[diff] [blame]142
Przemyslaw Marczakb18c47e2014-01-22 11:24:10 +0100[diff] [blame^]143#define S5PC100_SET_BANK(bank) \
144 (((unsigned)&(((struct s5pc100_gpio *) \
145 S5PC100_GPIO_BASE)->bank) - S5PC100_GPIO_BASE) \
146 & S5P_GPIO_BANK_MASK) << S5P_GPIO_BANK_SHIFT)
147
148#define S5PC110_SET_BANK(bank) \
149 ((((unsigned)&(((struct s5pc110_gpio *) \
150 S5PC110_GPIO_BASE)->bank) - S5PC110_GPIO_BASE) \
151 & S5P_GPIO_BANK_MASK) << S5P_GPIO_BANK_SHIFT)
152
153#define s5pc100_gpio_get(bank, pin) \
154 (S5P_GPIO_SET_PART(0) | \
155 S5PC100_SET_BANK(bank) | \
156 S5P_GPIO_SET_PIN(pin))
157
158#define s5pc110_gpio_get(bank, pin) \
159 (S5P_GPIO_SET_PART(0) | \
160 S5PC110_SET_BANK(bank) | \
161 S5P_GPIO_SET_PIN(pin))
162
163static inline unsigned int s5p_gpio_base(int nr)
Łukasz Majewskid6614b72012-09-04 21:47:46 +0000[diff] [blame]164{
Przemyslaw Marczakb18c47e2014-01-22 11:24:10 +0100[diff] [blame^]165 return samsung_get_base_gpio();
Łukasz Majewskid6614b72012-09-04 21:47:46 +0000[diff] [blame]166}
Minkyu Kang87649982009-10-01 17:20:01 +0900[diff] [blame]167#endif
168
Minkyu Kang1edf0f22010-02-12 18:17:52 +0900[diff] [blame]169/* Pin configurations */
170#define GPIO_INPUT 0x0
171#define GPIO_OUTPUT 0x1
172#define GPIO_IRQ 0xf
173#define GPIO_FUNC(x) (x)
174
175/* Pull mode */
176#define GPIO_PULL_NONE 0x0
177#define GPIO_PULL_DOWN 0x1
178#define GPIO_PULL_UP 0x2
179
180/* Drive Strength level */
181#define GPIO_DRV_1X 0x0
Chander Kashyapb26418c2011-04-18 00:08:43 +0000[diff] [blame]182#define GPIO_DRV_3X 0x1
183#define GPIO_DRV_2X 0x2
Minkyu Kang1edf0f22010-02-12 18:17:52 +0900[diff] [blame]184#define GPIO_DRV_4X 0x3
185#define GPIO_DRV_FAST 0x0
186#define GPIO_DRV_SLOW 0x1
187
Minkyu Kang87649982009-10-01 17:20:01 +0900[diff] [blame]188#endif