Adam Ford | 4e96ff8 | 2018-04-15 13:51:26 -0400 | [diff] [blame] | 1 | menuconfig SPI |
| 2 | bool "SPI Support" |
Jagan Teki | 38d91fe | 2019-10-16 18:04:13 +0530 | [diff] [blame] | 3 | help |
| 4 | The "Serial Peripheral Interface" is a low level synchronous |
| 5 | protocol. Chips that support SPI can have data transfer rates |
| 6 | up to several tens of Mbit/sec. Chips are addressed with a |
| 7 | controller and a chipselect. Most SPI slaves don't support |
| 8 | dynamic device discovery; some are even write-only or read-only. |
| 9 | |
| 10 | SPI is widely used by microcontrollers to talk with sensors, |
| 11 | eeprom and flash memory, codecs and various other controller |
| 12 | chips, analog to digital (and d-to-a) converters, and more. |
| 13 | MMC and SD cards can be accessed using SPI protocol; and for |
| 14 | DataFlash cards used in MMC sockets, SPI must always be used. |
| 15 | |
| 16 | SPI is one of a family of similar protocols using a four wire |
| 17 | interface (select, clock, data in, data out) including Microwire |
| 18 | (half duplex), SSP, SSI, and PSP. This driver framework should |
| 19 | work with most such devices and controllers. |
Adam Ford | 4e96ff8 | 2018-04-15 13:51:26 -0400 | [diff] [blame] | 20 | |
| 21 | if SPI |
Jagan Teki | bfd3f8b | 2015-06-27 22:35:14 +0530 | [diff] [blame] | 22 | |
Masahiro Yamada | 57ad8ee | 2014-10-23 22:26:09 +0900 | [diff] [blame] | 23 | config DM_SPI |
| 24 | bool "Enable Driver Model for SPI drivers" |
| 25 | depends on DM |
| 26 | help |
Simon Glass | d8b771d | 2015-02-05 21:41:35 -0700 | [diff] [blame] | 27 | Enable driver model for SPI. The SPI slave interface |
| 28 | (spi_setup_slave(), spi_xfer(), etc.) is then implemented by |
| 29 | the SPI uclass. Drivers provide methods to access the SPI |
| 30 | buses that they control. The uclass interface is defined in |
| 31 | include/spi.h. The existing spi_slave structure is attached |
| 32 | as 'parent data' to every slave on each bus. Slaves |
| 33 | typically use driver-private data instead of extending the |
| 34 | spi_slave structure. |
Simon Glass | 4b322d3 | 2015-03-06 13:19:05 -0700 | [diff] [blame] | 35 | |
Boris Brezillon | 32473fe | 2018-08-16 17:30:11 +0200 | [diff] [blame] | 36 | config SPI_MEM |
| 37 | bool "SPI memory extension" |
| 38 | help |
| 39 | Enable this option if you want to enable the SPI memory extension. |
| 40 | This extension is meant to simplify interaction with SPI memories |
| 41 | by providing an high-level interface to send memory-like commands. |
| 42 | |
Chin-Ting Kuo | a891be8 | 2022-08-19 17:01:08 +0800 | [diff] [blame] | 43 | config SPI_DIRMAP |
| 44 | bool "SPI direct mapping" |
| 45 | depends on SPI_MEM |
| 46 | help |
| 47 | Enable the SPI direct mapping API. Most modern SPI controllers can |
| 48 | directly map a SPI memory (or a portion of the SPI memory) in the CPU |
| 49 | address space. Most of the time this brings significant performance |
| 50 | improvements as it automates the whole process of sending SPI memory |
| 51 | operations every time a new region is accessed. |
| 52 | |
Vignesh R | 4e341d3 | 2019-02-05 11:29:15 +0530 | [diff] [blame] | 53 | if DM_SPI |
| 54 | |
Thomas Chou | c589954 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 55 | config ALTERA_SPI |
| 56 | bool "Altera SPI driver" |
| 57 | help |
| 58 | Enable the Altera SPI driver. This driver can be used to |
| 59 | access the SPI NOR flash on platforms embedding this Altera |
| 60 | IP core. Please find details on the "Embedded Peripherals IP |
| 61 | User Guide" of Altera. |
| 62 | |
Mark Kettenis | 0c3e924 | 2022-01-23 16:48:12 +0100 | [diff] [blame] | 63 | config APPLE_SPI |
| 64 | bool "Apple SPI driver" |
| 65 | default y if ARCH_APPLE |
| 66 | help |
| 67 | Enable the Apple SPI driver. This driver can be used to |
| 68 | access the SPI flash and keyboard on machines based on Apple SoCs. |
| 69 | |
Jagan Teki | 353dffb | 2018-03-07 10:33:33 +0530 | [diff] [blame] | 70 | config ATCSPI200_SPI |
| 71 | bool "Andestech ATCSPI200 SPI driver" |
| 72 | help |
| 73 | Enable the Andestech ATCSPI200 SPI driver. This driver can be |
| 74 | used to access the SPI flash on AE3XX and AE250 platforms embedding |
| 75 | this Andestech IP core. |
| 76 | |
Wills Wang | f502148 | 2016-03-16 16:59:58 +0800 | [diff] [blame] | 77 | config ATH79_SPI |
| 78 | bool "Atheros SPI driver" |
| 79 | depends on ARCH_ATH79 |
| 80 | help |
| 81 | Enable the Atheros ar7xxx/ar9xxx SoC SPI driver, it was used |
| 82 | to access SPI NOR flash and other SPI peripherals. This driver |
| 83 | uses driver model and requires a device tree binding to operate. |
| 84 | please refer to doc/device-tree-bindings/spi/spi-ath79.txt. |
| 85 | |
Tudor Ambarus | 88151bb | 2019-06-18 08:51:50 +0000 | [diff] [blame] | 86 | config ATMEL_QSPI |
| 87 | bool "Atmel Quad SPI Controller" |
| 88 | depends on ARCH_AT91 |
| 89 | help |
| 90 | Enable the Atmel Quad SPI controller in master mode. This driver |
| 91 | does not support generic SPI. The implementation supports only the |
| 92 | spi-mem interface. |
| 93 | |
Wenyou Yang | da8ee98 | 2016-10-28 14:17:49 +0800 | [diff] [blame] | 94 | config ATMEL_SPI |
| 95 | bool "Atmel SPI driver" |
Jagan Teki | 1d831b6 | 2018-03-14 18:46:44 +0530 | [diff] [blame] | 96 | default y if ARCH_AT91 |
Wenyou Yang | da8ee98 | 2016-10-28 14:17:49 +0800 | [diff] [blame] | 97 | help |
| 98 | This enables driver for the Atmel SPI Controller, present on |
Andy Shevchenko | 8cb5cdd | 2017-07-05 16:25:22 +0300 | [diff] [blame] | 99 | many AT91 (ARM) chips. This driver can be used to access |
| 100 | the SPI Flash, such as AT25DF321. |
Wenyou Yang | da8ee98 | 2016-10-28 14:17:49 +0800 | [diff] [blame] | 101 | |
Álvaro Fernández Rojas | 55d96ec | 2018-01-20 02:13:38 +0100 | [diff] [blame] | 102 | config BCM63XX_HSSPI |
| 103 | bool "BCM63XX HSSPI driver" |
William Zhang | 96c65fa | 2023-06-07 16:37:01 -0700 | [diff] [blame] | 104 | depends on (ARCH_BMIPS || ARCH_BCMBCA) |
Álvaro Fernández Rojas | 55d96ec | 2018-01-20 02:13:38 +0100 | [diff] [blame] | 105 | help |
William Zhang | 96c65fa | 2023-06-07 16:37:01 -0700 | [diff] [blame] | 106 | Enable the BCM63XX HSSPI driver. This driver can be used to |
Álvaro Fernández Rojas | 55d96ec | 2018-01-20 02:13:38 +0100 | [diff] [blame] | 107 | access the SPI NOR flash on platforms embedding this Broadcom |
| 108 | SPI core. |
| 109 | |
William Zhang | 7ff5855 | 2023-06-07 16:37:05 -0700 | [diff] [blame] | 110 | config BCMBCA_HSSPI |
| 111 | bool "BCMBCA HSSPI driver" |
| 112 | depends on ARCH_BCMBCA && HAVE_SPI_CS_CTRL |
| 113 | help |
| 114 | This enables support for the High Speed SPI controller present on |
| 115 | newer Broadcom BCMBCA SoCs. These SoCs include an updated SPI controller |
| 116 | that adds the capability to allow the driver to control chip select |
| 117 | explicitly. |
| 118 | |
Álvaro Fernández Rojas | cc243c6 | 2018-01-23 17:14:58 +0100 | [diff] [blame] | 119 | config BCM63XX_SPI |
| 120 | bool "BCM6348 SPI driver" |
| 121 | depends on ARCH_BMIPS |
| 122 | help |
| 123 | Enable the BCM6348/BCM6358 SPI driver. This driver can be used to |
| 124 | access the SPI NOR flash on platforms embedding these Broadcom |
| 125 | SPI cores. |
| 126 | |
Thomas Fitzsimmons | 919646d | 2018-06-08 17:59:45 -0400 | [diff] [blame] | 127 | config BCMSTB_SPI |
| 128 | bool "BCMSTB SPI driver" |
| 129 | help |
| 130 | Enable the Broadcom set-top box SPI driver. This driver can |
| 131 | be used to access the SPI flash on platforms embedding this |
| 132 | Broadcom SPI core. |
| 133 | |
Pengpeng Chen | 8f04b52 | 2020-07-30 12:52:45 -0700 | [diff] [blame] | 134 | config CORTINA_SFLASH |
| 135 | bool "Cortina-Access Serial Flash controller driver" |
| 136 | depends on DM_SPI && SPI_MEM |
| 137 | help |
| 138 | Enable the Cortina-Access Serial Flash controller driver. This driver |
| 139 | can be used to access the SPI NOR/NAND flash on platforms embedding this |
| 140 | Cortina-Access IP core. |
| 141 | |
Jagan Teki | 15a932c | 2015-06-27 22:37:00 +0530 | [diff] [blame] | 142 | config CADENCE_QSPI |
| 143 | bool "Cadence QSPI driver" |
| 144 | help |
| 145 | Enable the Cadence Quad-SPI (QSPI) driver. This driver can be |
| 146 | used to access the SPI NOR flash on platforms embedding this |
| 147 | Cadence IP core. |
| 148 | |
Tom Rini | 3fb5b2f | 2022-03-30 18:07:23 -0400 | [diff] [blame] | 149 | config HAS_CQSPI_REF_CLK |
| 150 | bool "Cadence QSPI static reference clock" |
| 151 | depends on CADENCE_QSPI |
| 152 | |
| 153 | config CQSPI_REF_CLK |
| 154 | int "Cadence QSPI reference clock value in Hz" |
| 155 | depends on HAS_CQSPI_REF_CLK |
| 156 | |
T Karthik Reddy | 73701e7 | 2022-05-12 04:05:32 -0600 | [diff] [blame] | 157 | config CADENCE_OSPI_VERSAL |
| 158 | bool "Configure Versal OSPI" |
Michal Simek | 2895a22 | 2022-09-19 14:21:03 +0200 | [diff] [blame] | 159 | depends on (ARCH_VERSAL || ARCH_VERSAL_NET) && CADENCE_QSPI |
T Karthik Reddy | 73701e7 | 2022-05-12 04:05:32 -0600 | [diff] [blame] | 160 | imply DM_GPIO |
| 161 | help |
| 162 | This option is used to enable Versal OSPI DMA operations which |
| 163 | are used for ospi flash read using cadence qspi controller. |
| 164 | |
Angelo Dureghello | 72e9be3 | 2019-03-13 21:46:46 +0100 | [diff] [blame] | 165 | config CF_SPI |
| 166 | bool "ColdFire SPI driver" |
| 167 | help |
| 168 | Enable the ColdFire SPI driver. This driver can be used on |
| 169 | some m68k SoCs. |
| 170 | |
Kongyang Liu | 61c9f28 | 2024-04-20 15:08:23 +0800 | [diff] [blame] | 171 | config CV1800B_SPIF |
| 172 | bool "Sophgo cv1800b SPI Flash Controller driver" |
| 173 | depends on SPI_MEM |
| 174 | help |
| 175 | Enable the Sophgo cv1800b SPI Flash Controller driver. This driver |
| 176 | can be used to access the SPI NOR flash on platforms embedding this |
| 177 | Sophgo cv1800b IP core. |
| 178 | |
Jagan Teki | 97c18ed | 2020-05-26 13:34:26 +0530 | [diff] [blame] | 179 | config DAVINCI_SPI |
| 180 | bool "Davinci & Keystone SPI driver" |
| 181 | depends on ARCH_DAVINCI || ARCH_KEYSTONE |
| 182 | help |
| 183 | Enable the Davinci SPI driver |
| 184 | |
Jagan Teki | 15a932c | 2015-06-27 22:37:00 +0530 | [diff] [blame] | 185 | config DESIGNWARE_SPI |
| 186 | bool "Designware SPI driver" |
| 187 | help |
| 188 | Enable the Designware SPI driver. This driver can be used to |
| 189 | access the SPI NOR flash on platforms embedding this Designware |
| 190 | IP core. |
| 191 | |
Jagan Teki | 6274bf9 | 2015-06-27 15:32:19 +0530 | [diff] [blame] | 192 | config EXYNOS_SPI |
| 193 | bool "Samsung Exynos SPI driver" |
| 194 | help |
| 195 | Enable the Samsung Exynos SPI driver. This driver can be used to |
| 196 | access the SPI NOR flash on platforms embedding this Samsung |
| 197 | Exynos IP core. |
| 198 | |
Jagan Teki | ae30c02 | 2015-06-27 14:17:06 +0530 | [diff] [blame] | 199 | config FSL_DSPI |
| 200 | bool "Freescale DSPI driver" |
| 201 | help |
| 202 | Enable the Freescale DSPI driver. This driver can be used to |
| 203 | access the SPI NOR flash and SPI Data flash on platforms embedding |
| 204 | this Freescale DSPI IP core. LS102xA and Colibri VF50/VF61 platforms |
| 205 | use this driver. |
| 206 | |
Jagan Teki | 72cedd4 | 2020-05-26 00:24:19 +0530 | [diff] [blame] | 207 | config FSL_QSPI |
| 208 | bool "Freescale QSPI driver" |
| 209 | imply SPI_FLASH_BAR |
| 210 | help |
| 211 | Enable the Freescale Quad-SPI (QSPI) driver. This driver can be |
| 212 | used to access the SPI NOR flash on platforms embedding this |
| 213 | Freescale IP core. |
| 214 | |
Ye Li | d7e3c9a | 2020-06-09 00:59:06 -0700 | [diff] [blame] | 215 | config FSL_QSPI_AHB_FULL_MAP |
| 216 | bool "Use full AHB memory map space" |
| 217 | depends on FSL_QSPI |
| 218 | default y if ARCH_MX6 || ARCH_MX7 || ARCH_MX7ULP || ARCH_IMX8M |
| 219 | help |
| 220 | Enable the Freescale QSPI driver to use full AHB memory map space for |
| 221 | flash access. |
| 222 | |
Nick Hawkins | 2ccea3a | 2022-06-08 16:21:36 -0500 | [diff] [blame] | 223 | config GXP_SPI |
| 224 | bool "SPI driver for GXP" |
| 225 | imply SPI_FLASH_BAR |
| 226 | help |
| 227 | Enable support for SPI on GXP. |
| 228 | |
Jagan Teki | 3872b7c | 2015-06-27 15:43:27 +0530 | [diff] [blame] | 229 | config ICH_SPI |
| 230 | bool "Intel ICH SPI driver" |
| 231 | help |
| 232 | Enable the Intel ICH SPI driver. This driver can be used to |
| 233 | access the SPI NOR flash on platforms embedding this Intel |
| 234 | ICH IP core. |
| 235 | |
Rayagonda Kokatanur | 1969f2b | 2022-02-09 14:16:13 -0800 | [diff] [blame] | 236 | config IPROC_QSPI |
| 237 | bool "Broadcom iProc QSPI Flash Controller driver" |
| 238 | help |
| 239 | Enable Broadcom iProc QSPI Flash Controller driver. |
| 240 | This driver can be used to access the SPI NOR flash. |
| 241 | |
Bhargav Shah | 83a2631 | 2020-06-18 23:15:13 +0530 | [diff] [blame] | 242 | config KIRKWOOD_SPI |
| 243 | bool "Marvell Kirkwood SPI Driver" |
| 244 | help |
| 245 | Enable support for SPI on various Marvell SoCs, such as |
| 246 | Kirkwood and Armada 375. |
| 247 | |
Neil Armstrong | 5c16217 | 2018-11-22 11:01:05 +0100 | [diff] [blame] | 248 | config MESON_SPIFC |
| 249 | bool "Amlogic Meson SPI Flash Controller driver" |
| 250 | depends on ARCH_MESON |
| 251 | help |
| 252 | Enable the Amlogic Meson SPI Flash Controller SPIFC) driver. |
| 253 | This driver can be used to access the SPI NOR flash chips on |
| 254 | Amlogic Meson SoCs. |
| 255 | |
Padmarao Begari | 32678b0 | 2022-10-27 11:32:01 +0530 | [diff] [blame] | 256 | config MICROCHIP_COREQSPI |
| 257 | bool "Microchip FPGA QSPI Controller driver" |
| 258 | help |
| 259 | Enable the QSPI driver for Microchip FPGA QSPI controllers. |
| 260 | This driver can be used on Polarfire SoC. |
| 261 | |
Igor Prusov | 3f02775 | 2023-10-25 01:51:39 +0300 | [diff] [blame] | 262 | config MESON_SPIFC_A1 |
| 263 | bool "Amlogic Meson A1 SPI Flash Controller driver" |
| 264 | depends on ARCH_MESON |
| 265 | help |
| 266 | Enable the Amlogic A1 SPI Flash Controller (SPIFC) driver. |
| 267 | This driver can be used to access the SPI NOR/NAND flash chips |
| 268 | with STR mode frequency up to 98MHz. Dual and quad modes are |
| 269 | supported by controller. |
| 270 | |
Christophe Leroy | 847362b | 2018-11-21 08:51:57 +0000 | [diff] [blame] | 271 | config MPC8XX_SPI |
| 272 | bool "MPC8XX SPI Driver" |
Christophe Leroy | bc6a457 | 2024-04-02 19:20:07 +0200 | [diff] [blame] | 273 | depends on MPC8xx && DM_GPIO |
Christophe Leroy | 847362b | 2018-11-21 08:51:57 +0000 | [diff] [blame] | 274 | help |
| 275 | Enable support for SPI on MPC8XX |
| 276 | |
Jagan Teki | 52515d5 | 2019-04-29 01:58:53 +0530 | [diff] [blame] | 277 | config MPC8XXX_SPI |
| 278 | bool "MPC8XXX SPI Driver" |
| 279 | help |
| 280 | Enable support for SPI on the MPC8XXX PowerPC SoCs. |
| 281 | |
Jagan Teki | 72cedd4 | 2020-05-26 00:24:19 +0530 | [diff] [blame] | 282 | config MSCC_BB_SPI |
| 283 | bool "MSCC bitbang SPI driver" |
| 284 | depends on SOC_VCOREIII |
| 285 | help |
| 286 | Enable MSCC bitbang SPI driver. This driver can be used on |
| 287 | MSCC SOCs. |
| 288 | |
developer | 2dfdc3f | 2020-11-12 16:36:42 +0800 | [diff] [blame] | 289 | config MT7620_SPI |
| 290 | bool "MediaTek MT7620 SPI driver" |
| 291 | depends on SOC_MT7620 |
| 292 | help |
| 293 | Enable the MT7620 SPI driver. This driver can be used to access |
| 294 | generic SPI devices on MediaTek MT7620 SoC. |
| 295 | |
Stefan Roese | 8adb8cb | 2018-08-16 10:48:48 +0200 | [diff] [blame] | 296 | config MT7621_SPI |
| 297 | bool "MediaTek MT7621 SPI driver" |
developer | 005064e | 2022-05-20 11:23:08 +0800 | [diff] [blame] | 298 | depends on SOC_MT7621 || SOC_MT7628 |
Stefan Roese | 8adb8cb | 2018-08-16 10:48:48 +0200 | [diff] [blame] | 299 | help |
| 300 | Enable the MT7621 SPI driver. This driver can be used to access |
| 301 | the SPI NOR flash on platforms embedding this Ralink / MediaTek |
| 302 | SPI core, like MT7621/7628/7688. |
| 303 | |
developer | f33cf3c | 2021-01-20 15:31:33 +0800 | [diff] [blame] | 304 | config MTK_SNOR |
| 305 | bool "Mediatek SPI-NOR controller driver" |
| 306 | depends on SPI_MEM |
| 307 | help |
| 308 | Enable the Mediatek SPINOR controller driver. This driver has |
| 309 | better read/write performance with NOR. |
| 310 | |
developer | 8a78b4d | 2019-07-22 17:09:01 +0530 | [diff] [blame] | 311 | config MTK_SNFI_SPI |
| 312 | bool "Mediatek SPI memory controller driver" |
| 313 | depends on SPI_MEM |
| 314 | help |
| 315 | Enable the Mediatek SPI memory controller driver. This driver is |
| 316 | originally based on the MediaTek SNFI IP core. It can only be |
| 317 | used to access SPI memory devices like SPI-NOR or SPI-NAND on |
| 318 | platforms embedding this IP core, like MT7622/M7629. |
| 319 | |
developer | 2420220 | 2022-09-09 19:59:45 +0800 | [diff] [blame] | 320 | config MTK_SPIM |
| 321 | bool "Mediatek SPI-MEM master controller driver" |
| 322 | depends on SPI_MEM |
| 323 | help |
| 324 | Enable MediaTek SPI-MEM master controller driver. This driver mainly |
| 325 | supports SPI flashes. You can use single, dual or quad mode |
| 326 | transmission on this controller. |
| 327 | |
Stefan Roese | 9ec1c78 | 2016-05-19 15:56:44 +0200 | [diff] [blame] | 328 | config MVEBU_A3700_SPI |
| 329 | bool "Marvell Armada 3700 SPI driver" |
Marek Behún | 0afd934 | 2018-04-24 17:21:26 +0200 | [diff] [blame] | 330 | select CLK_ARMADA_3720 |
Stefan Roese | 9ec1c78 | 2016-05-19 15:56:44 +0200 | [diff] [blame] | 331 | help |
| 332 | Enable the Marvell Armada 3700 SPI driver. This driver can be |
| 333 | used to access the SPI NOR flash on platforms embedding this |
| 334 | Marvell IP core. |
| 335 | |
Jagan Teki | 2174d85 | 2020-05-25 23:24:23 +0530 | [diff] [blame] | 336 | config MXS_SPI |
| 337 | bool "MXS SPI Driver" |
| 338 | help |
| 339 | Enable the MXS SPI controller driver. This driver can be used |
| 340 | on the i.MX23 and i.MX28 SoCs. |
| 341 | |
Zhengxun | c93136b | 2021-06-23 17:15:15 +0000 | [diff] [blame] | 342 | config SPI_MXIC |
| 343 | bool "Macronix MX25F0A SPI controller" |
| 344 | help |
| 345 | Enable the Macronix MX25F0A SPI controller driver. This driver |
| 346 | can be used to access the SPI flash on platforms embedding |
| 347 | this Macronix IP core. |
| 348 | |
Jim Liu | 464b7cd | 2022-04-26 16:52:45 +0800 | [diff] [blame] | 349 | config NPCM_FIU_SPI |
| 350 | bool "FIU driver for Nuvoton NPCM SoC" |
| 351 | help |
| 352 | This enables support for the Flash Interface Unit SPI controller |
| 353 | in master mode. |
| 354 | |
Jim Liu | 68d2912 | 2022-05-31 18:14:02 +0800 | [diff] [blame] | 355 | config NPCM_PSPI |
| 356 | bool "PSPI driver for Nuvoton NPCM SoC" |
| 357 | help |
| 358 | PSPI driver for NPCM SoC |
| 359 | |
Michael Walle | d3967f3 | 2019-12-18 00:09:58 +0100 | [diff] [blame] | 360 | config NXP_FSPI |
| 361 | bool "NXP FlexSPI driver" |
| 362 | depends on SPI_MEM |
| 363 | help |
| 364 | Enable the NXP FlexSPI (FSPI) driver. This driver can be used to |
| 365 | access the SPI NOR flash on platforms embedding this NXP IP core. |
| 366 | |
Suneel Garapati | 4171777 | 2020-07-30 13:56:18 +0200 | [diff] [blame] | 367 | config OCTEON_SPI |
| 368 | bool "Octeon SPI driver" |
Simon Glass | 3933d29 | 2021-08-01 18:54:44 -0600 | [diff] [blame] | 369 | depends on ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2 |
Suneel Garapati | 4171777 | 2020-07-30 13:56:18 +0200 | [diff] [blame] | 370 | help |
| 371 | Enable the Octeon SPI driver. This driver can be used to |
| 372 | access the SPI NOR flash on Octeon II/III and OcteonTX/TX2 |
| 373 | SoC platforms. |
| 374 | |
Jagan Teki | 99899c5 | 2020-05-27 18:26:36 +0530 | [diff] [blame] | 375 | config OMAP3_SPI |
| 376 | bool "McSPI driver for OMAP" |
| 377 | help |
| 378 | SPI master controller for OMAP24XX and later Multichannel SPI |
| 379 | (McSPI). This driver be used to access SPI chips on platforms |
| 380 | embedding this OMAP3 McSPI IP core. |
| 381 | |
Purna Chandra Mandal | ffa5442 | 2016-06-02 14:26:08 +0530 | [diff] [blame] | 382 | config PIC32_SPI |
| 383 | bool "Microchip PIC32 SPI driver" |
| 384 | depends on MACH_PIC32 |
| 385 | help |
| 386 | Enable the Microchip PIC32 SPI driver. This driver can be used |
| 387 | to access the SPI NOR flash, MMC-over-SPI on platforms based on |
| 388 | Microchip PIC32 family devices. |
| 389 | |
Quentin Schulz | 3add62d | 2018-08-31 16:28:29 +0200 | [diff] [blame] | 390 | config PL022_SPI |
| 391 | bool "ARM AMBA PL022 SSP controller driver" |
| 392 | depends on ARM |
| 393 | help |
| 394 | This selects the ARM(R) AMBA(R) PrimeCell PL022 SSP |
| 395 | controller. If you have an embedded system with an AMBA(R) |
| 396 | bus and a PL022 controller, say Y or M here. |
| 397 | |
Robert Marko | e4b17a7 | 2020-10-08 22:05:09 +0200 | [diff] [blame] | 398 | config SPI_QUP |
| 399 | bool "Qualcomm SPI controller with QUP interface" |
| 400 | depends on ARCH_IPQ40XX |
| 401 | help |
| 402 | Qualcomm Universal Peripheral (QUP) core is an AHB slave that |
| 403 | provides a common data path (an output FIFO and an input FIFO) |
| 404 | for serial peripheral interface (SPI) mini-core. SPI in master |
| 405 | mode supports up to 50MHz, up to four chip selects, programmable |
| 406 | data path from 4 bits to 32 bits and numerous protocol variants. |
| 407 | |
Marek Vasut | 6ca967b | 2017-11-29 06:29:46 +0100 | [diff] [blame] | 408 | config RENESAS_RPC_SPI |
| 409 | bool "Renesas RPC SPI driver" |
Marek Vasut | 47c4f50 | 2023-02-28 22:28:30 +0100 | [diff] [blame] | 410 | depends on RCAR_64 || RZA1 |
Hai Pham | 64f3ca8 | 2022-08-25 10:32:56 +0700 | [diff] [blame] | 411 | imply SPI_FLASH_SFDP_SUPPORT |
Marek Vasut | 6ca967b | 2017-11-29 06:29:46 +0100 | [diff] [blame] | 412 | help |
| 413 | Enable the Renesas RPC SPI driver, used to access SPI NOR flash |
| 414 | on Renesas RCar Gen3 SoCs. This uses driver model and requires a |
| 415 | device tree binding to operate. |
| 416 | |
Chris Morgan | 3afbc76 | 2021-08-05 16:26:38 +0800 | [diff] [blame] | 417 | config ROCKCHIP_SFC |
| 418 | bool "Rockchip SFC Driver" |
| 419 | help |
| 420 | Enable the Rockchip SFC Driver for SPI NOR flash. This device is |
| 421 | a limited purpose SPI controller for driving NOR flash on certain |
| 422 | Rockchip SoCs. This uses driver model and requires a device tree |
| 423 | binding to operate. |
| 424 | |
Simon Glass | d1c1377 | 2015-09-01 19:19:37 -0600 | [diff] [blame] | 425 | config ROCKCHIP_SPI |
| 426 | bool "Rockchip SPI driver" |
| 427 | help |
| 428 | Enable the Rockchip SPI driver, used to access SPI NOR flash and |
| 429 | other SPI peripherals (such as the Chrome OS EC) on Rockchip SoCs. |
| 430 | This uses driver model and requires a device tree binding to |
| 431 | operate. |
| 432 | |
Simon Glass | 4b322d3 | 2015-03-06 13:19:05 -0700 | [diff] [blame] | 433 | config SANDBOX_SPI |
| 434 | bool "Sandbox SPI driver" |
| 435 | depends on SANDBOX && DM |
| 436 | help |
| 437 | Enable SPI support for sandbox. This is an emulation of a real SPI |
| 438 | bus. Devices can be attached to the bus using the device tree |
| 439 | which specifies the driver to use. As an example, see this device |
| 440 | tree fragment from sandbox.dts. It shows that the SPI bus has a |
| 441 | single flash device on chip select 0 which is emulated by the driver |
| 442 | for "sandbox,spi-flash", which is in drivers/mtd/spi/sandbox.c. |
| 443 | |
| 444 | spi@0 { |
| 445 | #address-cells = <1>; |
| 446 | #size-cells = <0>; |
| 447 | reg = <0>; |
| 448 | compatible = "sandbox,spi"; |
| 449 | cs-gpios = <0>, <&gpio_a 0>; |
| 450 | flash@0 { |
| 451 | reg = <0>; |
Simon Glass | 7e36868 | 2019-05-18 11:59:49 -0600 | [diff] [blame] | 452 | compatible = "spansion,m25p16", "jedec,spi-nor"; |
Simon Glass | 4b322d3 | 2015-03-06 13:19:05 -0700 | [diff] [blame] | 453 | spi-max-frequency = <40000000>; |
| 454 | sandbox,filename = "spi.bin"; |
| 455 | }; |
Jagan Teki | 15a932c | 2015-06-27 22:37:00 +0530 | [diff] [blame] | 456 | }; |
Jagan Teki | dd32f51 | 2015-06-27 04:41:11 +0530 | [diff] [blame] | 457 | |
Tom Rini | 8f0dfd4 | 2022-12-02 16:42:43 -0500 | [diff] [blame] | 458 | config SANDBOX_SPI_MAX_BUS |
| 459 | int |
| 460 | depends on SANDBOX |
| 461 | default 1 |
| 462 | |
| 463 | config SANDBOX_SPI_MAX_CS |
| 464 | int |
| 465 | depends on SANDBOX |
| 466 | default 10 |
| 467 | |
Chin-Ting Kuo | 4d2caaf | 2022-08-19 17:01:04 +0800 | [diff] [blame] | 468 | config SPI_ASPEED_SMC |
| 469 | bool "ASPEED SPI flash controller driver" |
| 470 | depends on DM_SPI && SPI_MEM |
Chin-Ting Kuo | 4d2caaf | 2022-08-19 17:01:04 +0800 | [diff] [blame] | 471 | help |
| 472 | Enable ASPEED SPI flash controller driver for AST2500 |
| 473 | and AST2600 SoCs. |
| 474 | |
Bhargav Shah | 3c34f75 | 2019-07-17 04:23:43 +0000 | [diff] [blame] | 475 | config SPI_SIFIVE |
| 476 | bool "SiFive SPI driver" |
| 477 | help |
| 478 | This driver supports the SiFive SPI IP. If unsure say N. |
| 479 | Enable the SiFive SPI controller driver. |
| 480 | |
| 481 | The SiFive SPI controller driver is found on various SiFive SoCs. |
| 482 | |
Jagan Teki | e576244 | 2020-05-26 08:34:37 +0530 | [diff] [blame] | 483 | config SOFT_SPI |
| 484 | bool "Soft SPI driver" |
| 485 | help |
| 486 | Enable Soft SPI driver. This driver is to use GPIO simulate |
| 487 | the SPI protocol. |
| 488 | |
Kunihiko Hayashi | 7509ea1 | 2022-11-29 11:17:09 +0900 | [diff] [blame] | 489 | config SPI_SN_F_OSPI |
| 490 | tristate "Socionext F_OSPI SPI flash controller" |
| 491 | depends on SPI_MEM |
| 492 | help |
| 493 | This enables support for the Socionext F_OSPI controller |
| 494 | for connecting an SPI flash memory over up to 8-bit wide bus. |
| 495 | It supports indirect access mode only. |
| 496 | |
Jagan Teki | 7b68ef4 | 2019-02-27 20:02:13 +0530 | [diff] [blame] | 497 | config SPI_SUNXI |
| 498 | bool "Allwinner SoC SPI controllers" |
Jagan Teki | 9f6eafd | 2019-10-16 18:05:56 +0530 | [diff] [blame] | 499 | default ARCH_SUNXI |
Jagan Teki | 7b68ef4 | 2019-02-27 20:02:13 +0530 | [diff] [blame] | 500 | help |
| 501 | Enable the Allwinner SoC SPi controller driver. |
| 502 | |
| 503 | Same controller driver can reuse in all Allwinner SoC variants. |
| 504 | |
Michael Kurz | 337ff2a | 2017-01-22 16:04:30 +0100 | [diff] [blame] | 505 | config STM32_QSPI |
| 506 | bool "STM32F7 QSPI driver" |
Patrice Chotard | d43c496 | 2019-04-30 16:09:18 +0200 | [diff] [blame] | 507 | depends on STM32F4 || STM32F7 || ARCH_STM32MP |
Michael Kurz | 337ff2a | 2017-01-22 16:04:30 +0100 | [diff] [blame] | 508 | help |
| 509 | Enable the STM32F7 Quad-SPI (QSPI) driver. This driver can be |
| 510 | used to access the SPI NOR flash chips on platforms embedding |
| 511 | this ST IP core. |
| 512 | |
Patrice Chotard | 0b08bf8 | 2019-04-30 18:08:28 +0200 | [diff] [blame] | 513 | config STM32_SPI |
| 514 | bool "STM32 SPI driver" |
| 515 | depends on ARCH_STM32MP |
| 516 | help |
| 517 | Enable the STM32 Serial Peripheral Interface (SPI) driver for STM32MP |
| 518 | SoCs. This uses driver model and requires a device tree binding to |
| 519 | operate. |
| 520 | |
Jagan Teki | 7977d66 | 2015-06-27 15:57:53 +0530 | [diff] [blame] | 521 | config TEGRA114_SPI |
| 522 | bool "nVidia Tegra114 SPI driver" |
| 523 | help |
| 524 | Enable the nVidia Tegra114 SPI driver. This driver can be used to |
| 525 | access the SPI NOR flash on platforms embedding this nVidia Tegra114 |
| 526 | IP core. |
| 527 | |
| 528 | This controller is different than the older SoCs SPI controller and |
| 529 | also register interface get changed with this controller. |
| 530 | |
Jagan Teki | a900d40 | 2015-06-27 16:04:05 +0530 | [diff] [blame] | 531 | config TEGRA20_SFLASH |
| 532 | bool "nVidia Tegra20 Serial Flash controller driver" |
| 533 | help |
| 534 | Enable the nVidia Tegra20 Serial Flash controller driver. This driver |
| 535 | can be used to access the SPI NOR flash on platforms embedding this |
| 536 | nVidia Tegra20 IP core. |
| 537 | |
Jagan Teki | 271aa56 | 2015-06-27 16:07:54 +0530 | [diff] [blame] | 538 | config TEGRA20_SLINK |
| 539 | bool "nVidia Tegra20/Tegra30 SLINK driver" |
| 540 | help |
| 541 | Enable the nVidia Tegra20/Tegra30 SLINK driver. This driver can |
| 542 | be used to access the SPI NOR flash on platforms embedding this |
| 543 | nVidia Tegra20/Tegra30 IP cores. |
| 544 | |
Tom Warren | 5fb0c84 | 2015-10-12 14:50:54 -0700 | [diff] [blame] | 545 | config TEGRA210_QSPI |
| 546 | bool "nVidia Tegra210 QSPI driver" |
| 547 | help |
| 548 | Enable the Tegra Quad-SPI (QSPI) driver for T210. This driver |
| 549 | be used to access SPI chips on platforms embedding this |
| 550 | NVIDIA Tegra210 IP core. |
| 551 | |
Vignesh Raghavendra | f3603b8 | 2019-04-16 21:31:59 +0530 | [diff] [blame] | 552 | config TI_QSPI |
| 553 | bool "TI QSPI driver" |
| 554 | imply TI_EDMA3 |
| 555 | help |
| 556 | Enable the TI Quad-SPI (QSPI) driver for DRA7xx and AM43xx evms. |
| 557 | This driver support spi flash single, quad and memory reads. |
| 558 | |
Kunihiko Hayashi | 7a40ec0 | 2019-07-05 10:03:18 +0900 | [diff] [blame] | 559 | config UNIPHIER_SPI |
| 560 | bool "Socionext UniPhier SPI driver" |
| 561 | depends on ARCH_UNIPHIER |
| 562 | help |
| 563 | Enable the Socionext UniPhier SPI driver. This driver can |
| 564 | be used to access SPI chips on platforms embedding this |
| 565 | UniPhier IP core. |
| 566 | |
Jagan Teki | cd70d7d | 2015-06-27 04:32:43 +0530 | [diff] [blame] | 567 | config XILINX_SPI |
| 568 | bool "Xilinx SPI driver" |
Jagan Teki | cd70d7d | 2015-06-27 04:32:43 +0530 | [diff] [blame] | 569 | help |
| 570 | Enable the Xilinx SPI driver from the Xilinx EDK. This SPI |
| 571 | controller support 8 bit SPI transfers only, with or w/o FIFO. |
| 572 | For more info on Xilinx SPI Register Definitions and Overview |
| 573 | see driver file - drivers/spi/xilinx_spi.c |
| 574 | |
Jagan Teki | cad526f | 2015-06-27 00:51:38 +0530 | [diff] [blame] | 575 | config ZYNQ_SPI |
| 576 | bool "Zynq SPI driver" |
Jagan Teki | cad526f | 2015-06-27 00:51:38 +0530 | [diff] [blame] | 577 | help |
| 578 | Enable the Zynq SPI driver. This driver can be used to |
| 579 | access the SPI NOR flash on platforms embedding this Zynq |
| 580 | SPI IP core. |
Jagan Teki | bfd3f8b | 2015-06-27 22:35:14 +0530 | [diff] [blame] | 581 | |
Jagan Teki | f2e1c41 | 2015-08-16 00:19:38 +0530 | [diff] [blame] | 582 | config ZYNQ_QSPI |
| 583 | bool "Zynq QSPI driver" |
Vignesh R | 1f66bca | 2019-02-05 11:29:28 +0530 | [diff] [blame] | 584 | imply SPI_FLASH_BAR |
Jagan Teki | f2e1c41 | 2015-08-16 00:19:38 +0530 | [diff] [blame] | 585 | help |
| 586 | Enable the Zynq Quad-SPI (QSPI) driver. This driver can be |
| 587 | used to access the SPI NOR flash on platforms embedding this |
| 588 | Zynq QSPI IP core. This IP is used to connect the flash in |
| 589 | 4-bit qspi, 8-bit dual stacked and shared 4-bit dual parallel. |
| 590 | |
Siva Durga Prasad Paladugu | 7659738 | 2018-07-04 17:31:23 +0530 | [diff] [blame] | 591 | config ZYNQMP_GQSPI |
| 592 | bool "Configure ZynqMP Generic QSPI" |
Siva Durga Prasad Paladugu | 7659738 | 2018-07-04 17:31:23 +0530 | [diff] [blame] | 593 | help |
| 594 | This option is used to enable ZynqMP QSPI controller driver which |
| 595 | is used to communicate with qspi flash devices. |
| 596 | |
Jagan Teki | 15a932c | 2015-06-27 22:37:00 +0530 | [diff] [blame] | 597 | endif # if DM_SPI |
| 598 | |
Jagan Teki | a0497a3 | 2015-06-27 15:21:36 +0530 | [diff] [blame] | 599 | config FSL_ESPI |
| 600 | bool "Freescale eSPI driver" |
Corentin Guillevic | cffcee9 | 2023-03-24 10:54:19 +0100 | [diff] [blame] | 601 | depends on MPC85xx |
Xiaowei Bao | 72817cd | 2019-10-31 14:34:40 +0800 | [diff] [blame] | 602 | imply SPI_FLASH_BAR |
Jagan Teki | a0497a3 | 2015-06-27 15:21:36 +0530 | [diff] [blame] | 603 | help |
| 604 | Enable the Freescale eSPI driver. This driver can be used to |
| 605 | access the SPI interface and SPI NOR flash on platforms embedding |
| 606 | this Freescale eSPI IP core. |
| 607 | |
Tuomas Tynkkynen | fa8fdfd | 2018-02-07 02:42:17 +0200 | [diff] [blame] | 608 | config SH_QSPI |
| 609 | bool "Renesas Quad SPI driver" |
| 610 | help |
| 611 | Enable the Renesas Quad SPI controller driver. This driver can be |
| 612 | used on Renesas SoCs. |
| 613 | |
Tuomas Tynkkynen | d395879 | 2018-02-07 02:42:19 +0200 | [diff] [blame] | 614 | config MXC_SPI |
| 615 | bool "MXC SPI Driver" |
| 616 | help |
| 617 | Enable the MXC SPI controller driver. This driver can be used |
| 618 | on various i.MX SoCs such as i.MX31/35/51/6/7. |
| 619 | |
Jassi Brar | 717bab2 | 2021-06-04 18:44:27 +0900 | [diff] [blame] | 620 | config SYNQUACER_SPI |
| 621 | bool "Socionext SynQuacer HS-SPI driver" |
| 622 | depends on ARCH_SYNQUACER |
| 623 | help |
| 624 | Enable the Socionext HS-SPI driver for SynQuacer. This driver can |
| 625 | be used to access the SPI interface and SPI NOR flash on platforms |
| 626 | embedding this HS-SPI IP core. |
| 627 | |
Adam Ford | 4e96ff8 | 2018-04-15 13:51:26 -0400 | [diff] [blame] | 628 | endif # menu "SPI Support" |