Patrick Delaunay | d6e53c7 | 2018-10-26 09:02:52 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 2 | /* |
| 3 | * Generic DWC3 Glue layer |
| 4 | * |
| 5 | * Copyright (C) 2016 - 2018 Xilinx, Inc. |
| 6 | * |
| 7 | * Based on dwc3-omap.c. |
| 8 | */ |
| 9 | |
| 10 | #include <common.h> |
Simon Glass | 6333448 | 2019-11-14 12:57:39 -0700 | [diff] [blame] | 11 | #include <cpu_func.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 12 | #include <log.h> |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 13 | #include <dm.h> |
| 14 | #include <dm/device-internal.h> |
| 15 | #include <dm/lists.h> |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 16 | #include <dwc3-uboot.h> |
Simon Glass | 4dcacfc | 2020-05-10 11:40:13 -0600 | [diff] [blame] | 17 | #include <linux/bitops.h> |
Frank Wang | f5a6c5b | 2020-05-26 11:34:31 +0800 | [diff] [blame] | 18 | #include <linux/delay.h> |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 19 | #include <linux/usb/ch9.h> |
| 20 | #include <linux/usb/gadget.h> |
| 21 | #include <malloc.h> |
| 22 | #include <usb.h> |
| 23 | #include "core.h" |
| 24 | #include "gadget.h" |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 25 | #include <reset.h> |
| 26 | #include <clk.h> |
Jean-Jacques Hiblot | 175cd7c | 2019-09-11 11:33:50 +0200 | [diff] [blame] | 27 | #include <usb/xhci.h> |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 28 | |
Frank Wang | f5a6c5b | 2020-05-26 11:34:31 +0800 | [diff] [blame] | 29 | struct dwc3_glue_data { |
| 30 | struct clk_bulk clks; |
| 31 | struct reset_ctl_bulk resets; |
| 32 | fdt_addr_t regs; |
| 33 | }; |
| 34 | |
Jean-Jacques Hiblot | a33aa76 | 2019-09-11 11:33:48 +0200 | [diff] [blame] | 35 | struct dwc3_generic_plat { |
| 36 | fdt_addr_t base; |
| 37 | u32 maximum_speed; |
| 38 | enum usb_dr_mode dr_mode; |
| 39 | }; |
| 40 | |
Jean-Jacques Hiblot | a33aa76 | 2019-09-11 11:33:48 +0200 | [diff] [blame] | 41 | struct dwc3_generic_priv { |
Jean-Jacques Hiblot | 2bf2c35 | 2019-09-11 11:33:49 +0200 | [diff] [blame] | 42 | void *base; |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 43 | struct dwc3 dwc3; |
developer | f8bced1 | 2020-05-02 11:35:13 +0200 | [diff] [blame] | 44 | struct phy_bulk phys; |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 45 | }; |
| 46 | |
Jean-Jacques Hiblot | 175cd7c | 2019-09-11 11:33:50 +0200 | [diff] [blame] | 47 | struct dwc3_generic_host_priv { |
| 48 | struct xhci_ctrl xhci_ctrl; |
| 49 | struct dwc3_generic_priv gen_priv; |
| 50 | }; |
| 51 | |
Jean-Jacques Hiblot | 2bf2c35 | 2019-09-11 11:33:49 +0200 | [diff] [blame] | 52 | static int dwc3_generic_probe(struct udevice *dev, |
| 53 | struct dwc3_generic_priv *priv) |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 54 | { |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 55 | int rc; |
Simon Glass | fa20e93 | 2020-12-03 16:55:20 -0700 | [diff] [blame] | 56 | struct dwc3_generic_plat *plat = dev_get_plat(dev); |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 57 | struct dwc3 *dwc3 = &priv->dwc3; |
Simon Glass | fa20e93 | 2020-12-03 16:55:20 -0700 | [diff] [blame] | 58 | struct dwc3_glue_data *glue = dev_get_plat(dev->parent); |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 59 | |
Jean-Jacques Hiblot | ce868d0 | 2019-09-11 11:33:52 +0200 | [diff] [blame] | 60 | dwc3->dev = dev; |
Jean-Jacques Hiblot | a33aa76 | 2019-09-11 11:33:48 +0200 | [diff] [blame] | 61 | dwc3->maximum_speed = plat->maximum_speed; |
| 62 | dwc3->dr_mode = plat->dr_mode; |
Jean-Jacques Hiblot | ce868d0 | 2019-09-11 11:33:52 +0200 | [diff] [blame] | 63 | #if CONFIG_IS_ENABLED(OF_CONTROL) |
| 64 | dwc3_of_parse(dwc3); |
| 65 | #endif |
Jean-Jacques Hiblot | a33aa76 | 2019-09-11 11:33:48 +0200 | [diff] [blame] | 66 | |
Frank Wang | f5a6c5b | 2020-05-26 11:34:31 +0800 | [diff] [blame] | 67 | /* |
| 68 | * It must hold whole USB3.0 OTG controller in resetting to hold pipe |
| 69 | * power state in P2 before initializing TypeC PHY on RK3399 platform. |
| 70 | */ |
| 71 | if (device_is_compatible(dev->parent, "rockchip,rk3399-dwc3")) { |
| 72 | reset_assert_bulk(&glue->resets); |
| 73 | udelay(1); |
| 74 | } |
| 75 | |
developer | f8bced1 | 2020-05-02 11:35:13 +0200 | [diff] [blame] | 76 | rc = dwc3_setup_phy(dev, &priv->phys); |
Siva Durga Prasad Paladugu | c37f8f3 | 2020-10-21 14:17:31 +0200 | [diff] [blame] | 77 | if (rc && rc != -ENOTSUPP) |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 78 | return rc; |
| 79 | |
Frank Wang | f5a6c5b | 2020-05-26 11:34:31 +0800 | [diff] [blame] | 80 | if (device_is_compatible(dev->parent, "rockchip,rk3399-dwc3")) |
| 81 | reset_deassert_bulk(&glue->resets); |
| 82 | |
Jean-Jacques Hiblot | 2bf2c35 | 2019-09-11 11:33:49 +0200 | [diff] [blame] | 83 | priv->base = map_physmem(plat->base, DWC3_OTG_REGS_END, MAP_NOCACHE); |
| 84 | dwc3->regs = priv->base + DWC3_GLOBALS_REGS_START; |
Jean-Jacques Hiblot | ce868d0 | 2019-09-11 11:33:52 +0200 | [diff] [blame] | 85 | |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 86 | |
| 87 | rc = dwc3_init(dwc3); |
| 88 | if (rc) { |
Jean-Jacques Hiblot | 2bf2c35 | 2019-09-11 11:33:49 +0200 | [diff] [blame] | 89 | unmap_physmem(priv->base, MAP_NOCACHE); |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 90 | return rc; |
| 91 | } |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 92 | |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 93 | return 0; |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 94 | } |
| 95 | |
Jean-Jacques Hiblot | 2bf2c35 | 2019-09-11 11:33:49 +0200 | [diff] [blame] | 96 | static int dwc3_generic_remove(struct udevice *dev, |
| 97 | struct dwc3_generic_priv *priv) |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 98 | { |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 99 | struct dwc3 *dwc3 = &priv->dwc3; |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 100 | |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 101 | dwc3_remove(dwc3); |
developer | f8bced1 | 2020-05-02 11:35:13 +0200 | [diff] [blame] | 102 | dwc3_shutdown_phy(dev, &priv->phys); |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 103 | unmap_physmem(dwc3->regs, MAP_NOCACHE); |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 104 | |
| 105 | return 0; |
| 106 | } |
| 107 | |
Simon Glass | aad29ae | 2020-12-03 16:55:21 -0700 | [diff] [blame] | 108 | static int dwc3_generic_of_to_plat(struct udevice *dev) |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 109 | { |
Simon Glass | fa20e93 | 2020-12-03 16:55:20 -0700 | [diff] [blame] | 110 | struct dwc3_generic_plat *plat = dev_get_plat(dev); |
Simon Glass | a7ece58 | 2020-12-19 10:40:14 -0700 | [diff] [blame] | 111 | ofnode node = dev_ofnode(dev); |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 112 | |
Angus Ainslie | 6e382a8 | 2022-02-02 15:08:54 -0800 | [diff] [blame] | 113 | if (!strncmp(dev->name, "port", 4) || !strncmp(dev->name, "hub", 3)) { |
| 114 | /* This is a leaf so check the parent */ |
| 115 | plat->base = dev_read_addr(dev->parent); |
| 116 | } else { |
| 117 | plat->base = dev_read_addr(dev); |
| 118 | } |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 119 | |
Jean-Jacques Hiblot | a33aa76 | 2019-09-11 11:33:48 +0200 | [diff] [blame] | 120 | plat->maximum_speed = usb_get_maximum_speed(node); |
| 121 | if (plat->maximum_speed == USB_SPEED_UNKNOWN) { |
Jean-Jacques Hiblot | 547df0d | 2019-09-11 11:33:51 +0200 | [diff] [blame] | 122 | pr_info("No USB maximum speed specified. Using super speed\n"); |
| 123 | plat->maximum_speed = USB_SPEED_SUPER; |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 124 | } |
| 125 | |
Jean-Jacques Hiblot | a33aa76 | 2019-09-11 11:33:48 +0200 | [diff] [blame] | 126 | plat->dr_mode = usb_get_dr_mode(node); |
| 127 | if (plat->dr_mode == USB_DR_MODE_UNKNOWN) { |
Angus Ainslie | 6e382a8 | 2022-02-02 15:08:54 -0800 | [diff] [blame] | 128 | /* might be a leaf so check the parent for mode */ |
| 129 | node = dev_ofnode(dev->parent); |
| 130 | plat->dr_mode = usb_get_dr_mode(node); |
| 131 | if (plat->dr_mode == USB_DR_MODE_UNKNOWN) { |
| 132 | pr_err("Invalid usb mode setup\n"); |
| 133 | return -ENODEV; |
| 134 | } |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 135 | } |
| 136 | |
| 137 | return 0; |
| 138 | } |
| 139 | |
Jean-Jacques Hiblot | 2bf2c35 | 2019-09-11 11:33:49 +0200 | [diff] [blame] | 140 | #if CONFIG_IS_ENABLED(DM_USB_GADGET) |
| 141 | int dm_usb_gadget_handle_interrupts(struct udevice *dev) |
| 142 | { |
| 143 | struct dwc3_generic_priv *priv = dev_get_priv(dev); |
| 144 | struct dwc3 *dwc3 = &priv->dwc3; |
| 145 | |
| 146 | dwc3_gadget_uboot_handle_interrupt(dwc3); |
| 147 | |
| 148 | return 0; |
| 149 | } |
| 150 | |
| 151 | static int dwc3_generic_peripheral_probe(struct udevice *dev) |
| 152 | { |
| 153 | struct dwc3_generic_priv *priv = dev_get_priv(dev); |
| 154 | |
| 155 | return dwc3_generic_probe(dev, priv); |
| 156 | } |
| 157 | |
| 158 | static int dwc3_generic_peripheral_remove(struct udevice *dev) |
| 159 | { |
| 160 | struct dwc3_generic_priv *priv = dev_get_priv(dev); |
| 161 | |
| 162 | return dwc3_generic_remove(dev, priv); |
| 163 | } |
| 164 | |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 165 | U_BOOT_DRIVER(dwc3_generic_peripheral) = { |
| 166 | .name = "dwc3-generic-peripheral", |
Jean-Jacques Hiblot | 9dc0d5c | 2018-11-29 10:52:46 +0100 | [diff] [blame] | 167 | .id = UCLASS_USB_GADGET_GENERIC, |
Simon Glass | aad29ae | 2020-12-03 16:55:21 -0700 | [diff] [blame] | 168 | .of_to_plat = dwc3_generic_of_to_plat, |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 169 | .probe = dwc3_generic_peripheral_probe, |
| 170 | .remove = dwc3_generic_peripheral_remove, |
Simon Glass | 8a2b47f | 2020-12-03 16:55:17 -0700 | [diff] [blame] | 171 | .priv_auto = sizeof(struct dwc3_generic_priv), |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 172 | .plat_auto = sizeof(struct dwc3_generic_plat), |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 173 | }; |
Jean-Jacques Hiblot | 44aaec7 | 2018-11-29 10:52:42 +0100 | [diff] [blame] | 174 | #endif |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 175 | |
Simon Glass | 1f2440c | 2021-07-10 21:14:29 -0600 | [diff] [blame] | 176 | #if defined(CONFIG_SPL_USB_HOST) || \ |
Kunihiko Hayashi | b032aa6 | 2021-05-12 23:11:14 +0900 | [diff] [blame] | 177 | !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_HOST) |
Jean-Jacques Hiblot | 175cd7c | 2019-09-11 11:33:50 +0200 | [diff] [blame] | 178 | static int dwc3_generic_host_probe(struct udevice *dev) |
| 179 | { |
| 180 | struct xhci_hcor *hcor; |
| 181 | struct xhci_hccr *hccr; |
| 182 | struct dwc3_generic_host_priv *priv = dev_get_priv(dev); |
| 183 | int rc; |
| 184 | |
| 185 | rc = dwc3_generic_probe(dev, &priv->gen_priv); |
| 186 | if (rc) |
| 187 | return rc; |
| 188 | |
| 189 | hccr = (struct xhci_hccr *)priv->gen_priv.base; |
| 190 | hcor = (struct xhci_hcor *)(priv->gen_priv.base + |
| 191 | HC_LENGTH(xhci_readl(&(hccr)->cr_capbase))); |
| 192 | |
| 193 | return xhci_register(dev, hccr, hcor); |
| 194 | } |
| 195 | |
| 196 | static int dwc3_generic_host_remove(struct udevice *dev) |
| 197 | { |
| 198 | struct dwc3_generic_host_priv *priv = dev_get_priv(dev); |
| 199 | int rc; |
| 200 | |
| 201 | rc = xhci_deregister(dev); |
| 202 | if (rc) |
| 203 | return rc; |
| 204 | |
| 205 | return dwc3_generic_remove(dev, &priv->gen_priv); |
| 206 | } |
| 207 | |
| 208 | U_BOOT_DRIVER(dwc3_generic_host) = { |
| 209 | .name = "dwc3-generic-host", |
| 210 | .id = UCLASS_USB, |
Simon Glass | aad29ae | 2020-12-03 16:55:21 -0700 | [diff] [blame] | 211 | .of_to_plat = dwc3_generic_of_to_plat, |
Jean-Jacques Hiblot | 175cd7c | 2019-09-11 11:33:50 +0200 | [diff] [blame] | 212 | .probe = dwc3_generic_host_probe, |
| 213 | .remove = dwc3_generic_host_remove, |
Simon Glass | 8a2b47f | 2020-12-03 16:55:17 -0700 | [diff] [blame] | 214 | .priv_auto = sizeof(struct dwc3_generic_host_priv), |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 215 | .plat_auto = sizeof(struct dwc3_generic_plat), |
Jean-Jacques Hiblot | 175cd7c | 2019-09-11 11:33:50 +0200 | [diff] [blame] | 216 | .ops = &xhci_usb_ops, |
| 217 | .flags = DM_FLAG_ALLOC_PRIV_DMA, |
| 218 | }; |
| 219 | #endif |
| 220 | |
Jean-Jacques Hiblot | ae004d3 | 2018-11-29 10:52:49 +0100 | [diff] [blame] | 221 | struct dwc3_glue_ops { |
Marek Vasut | 68c8656 | 2022-04-13 00:42:55 +0200 | [diff] [blame^] | 222 | void (*glue_configure)(struct udevice *dev, int index, |
Jean-Jacques Hiblot | ae004d3 | 2018-11-29 10:52:49 +0100 | [diff] [blame] | 223 | enum usb_dr_mode mode); |
| 224 | }; |
| 225 | |
Marek Vasut | 68c8656 | 2022-04-13 00:42:55 +0200 | [diff] [blame^] | 226 | void dwc3_ti_glue_configure(struct udevice *dev, int index, |
Jean-Jacques Hiblot | 65596f1 | 2018-11-29 10:57:40 +0100 | [diff] [blame] | 227 | enum usb_dr_mode mode) |
| 228 | { |
| 229 | #define USBOTGSS_UTMI_OTG_STATUS 0x0084 |
| 230 | #define USBOTGSS_UTMI_OTG_OFFSET 0x0480 |
| 231 | |
| 232 | /* UTMI_OTG_STATUS REGISTER */ |
| 233 | #define USBOTGSS_UTMI_OTG_STATUS_SW_MODE BIT(31) |
| 234 | #define USBOTGSS_UTMI_OTG_STATUS_POWERPRESENT BIT(9) |
| 235 | #define USBOTGSS_UTMI_OTG_STATUS_TXBITSTUFFENABLE BIT(8) |
| 236 | #define USBOTGSS_UTMI_OTG_STATUS_IDDIG BIT(4) |
| 237 | #define USBOTGSS_UTMI_OTG_STATUS_SESSEND BIT(3) |
| 238 | #define USBOTGSS_UTMI_OTG_STATUS_SESSVALID BIT(2) |
| 239 | #define USBOTGSS_UTMI_OTG_STATUS_VBUSVALID BIT(1) |
| 240 | enum dwc3_omap_utmi_mode { |
| 241 | DWC3_OMAP_UTMI_MODE_UNKNOWN = 0, |
| 242 | DWC3_OMAP_UTMI_MODE_HW, |
| 243 | DWC3_OMAP_UTMI_MODE_SW, |
| 244 | }; |
| 245 | |
| 246 | u32 use_id_pin; |
| 247 | u32 host_mode; |
| 248 | u32 reg; |
| 249 | u32 utmi_mode; |
| 250 | u32 utmi_status_offset = USBOTGSS_UTMI_OTG_STATUS; |
| 251 | |
Simon Glass | fa20e93 | 2020-12-03 16:55:20 -0700 | [diff] [blame] | 252 | struct dwc3_glue_data *glue = dev_get_plat(dev); |
Jean-Jacques Hiblot | 65596f1 | 2018-11-29 10:57:40 +0100 | [diff] [blame] | 253 | void *base = map_physmem(glue->regs, 0x10000, MAP_NOCACHE); |
| 254 | |
| 255 | if (device_is_compatible(dev, "ti,am437x-dwc3")) |
| 256 | utmi_status_offset += USBOTGSS_UTMI_OTG_OFFSET; |
| 257 | |
| 258 | utmi_mode = dev_read_u32_default(dev, "utmi-mode", |
| 259 | DWC3_OMAP_UTMI_MODE_UNKNOWN); |
| 260 | if (utmi_mode != DWC3_OMAP_UTMI_MODE_HW) { |
| 261 | debug("%s: OTG is not supported. defaulting to PERIPHERAL\n", |
| 262 | dev->name); |
| 263 | mode = USB_DR_MODE_PERIPHERAL; |
| 264 | } |
| 265 | |
| 266 | switch (mode) { |
| 267 | case USB_DR_MODE_PERIPHERAL: |
| 268 | use_id_pin = 0; |
| 269 | host_mode = 0; |
| 270 | break; |
| 271 | case USB_DR_MODE_HOST: |
| 272 | use_id_pin = 0; |
| 273 | host_mode = 1; |
| 274 | break; |
| 275 | case USB_DR_MODE_OTG: |
| 276 | default: |
| 277 | use_id_pin = 1; |
| 278 | host_mode = 0; |
| 279 | break; |
| 280 | } |
| 281 | |
| 282 | reg = readl(base + utmi_status_offset); |
| 283 | |
| 284 | reg &= ~(USBOTGSS_UTMI_OTG_STATUS_SW_MODE); |
| 285 | if (!use_id_pin) |
| 286 | reg |= USBOTGSS_UTMI_OTG_STATUS_SW_MODE; |
| 287 | |
| 288 | writel(reg, base + utmi_status_offset); |
| 289 | |
| 290 | reg &= ~(USBOTGSS_UTMI_OTG_STATUS_SESSEND | |
| 291 | USBOTGSS_UTMI_OTG_STATUS_VBUSVALID | |
| 292 | USBOTGSS_UTMI_OTG_STATUS_IDDIG); |
| 293 | |
| 294 | reg |= USBOTGSS_UTMI_OTG_STATUS_SESSVALID | |
| 295 | USBOTGSS_UTMI_OTG_STATUS_POWERPRESENT; |
| 296 | |
| 297 | if (!host_mode) |
| 298 | reg |= USBOTGSS_UTMI_OTG_STATUS_IDDIG | |
| 299 | USBOTGSS_UTMI_OTG_STATUS_VBUSVALID; |
| 300 | |
| 301 | writel(reg, base + utmi_status_offset); |
| 302 | |
| 303 | unmap_physmem(base, MAP_NOCACHE); |
| 304 | } |
| 305 | |
| 306 | struct dwc3_glue_ops ti_ops = { |
Marek Vasut | 68c8656 | 2022-04-13 00:42:55 +0200 | [diff] [blame^] | 307 | .glue_configure = dwc3_ti_glue_configure, |
Jean-Jacques Hiblot | 65596f1 | 2018-11-29 10:57:40 +0100 | [diff] [blame] | 308 | }; |
| 309 | |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 310 | static int dwc3_glue_bind(struct udevice *parent) |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 311 | { |
Kever Yang | 1b80705 | 2020-03-04 08:59:50 +0800 | [diff] [blame] | 312 | ofnode node; |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 313 | int ret; |
Angus Ainslie | 6e382a8 | 2022-02-02 15:08:54 -0800 | [diff] [blame] | 314 | enum usb_dr_mode dr_mode; |
| 315 | |
| 316 | dr_mode = usb_get_dr_mode(dev_ofnode(parent)); |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 317 | |
Simon Glass | a7ece58 | 2020-12-19 10:40:14 -0700 | [diff] [blame] | 318 | ofnode_for_each_subnode(node, dev_ofnode(parent)) { |
Kever Yang | 1b80705 | 2020-03-04 08:59:50 +0800 | [diff] [blame] | 319 | const char *name = ofnode_get_name(node); |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 320 | struct udevice *dev; |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 321 | const char *driver = NULL; |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 322 | |
| 323 | debug("%s: subnode name: %s\n", __func__, name); |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 324 | |
Angus Ainslie | 6e382a8 | 2022-02-02 15:08:54 -0800 | [diff] [blame] | 325 | /* if the parent node doesn't have a mode check the leaf */ |
| 326 | if (!dr_mode) |
| 327 | dr_mode = usb_get_dr_mode(node); |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 328 | |
| 329 | switch (dr_mode) { |
| 330 | case USB_DR_MODE_PERIPHERAL: |
| 331 | case USB_DR_MODE_OTG: |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 332 | #if CONFIG_IS_ENABLED(DM_USB_GADGET) |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 333 | debug("%s: dr_mode: OTG or Peripheral\n", __func__); |
| 334 | driver = "dwc3-generic-peripheral"; |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 335 | #endif |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 336 | break; |
Simon Glass | 1f2440c | 2021-07-10 21:14:29 -0600 | [diff] [blame] | 337 | #if defined(CONFIG_SPL_USB_HOST) || !defined(CONFIG_SPL_BUILD) |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 338 | case USB_DR_MODE_HOST: |
| 339 | debug("%s: dr_mode: HOST\n", __func__); |
Jean-Jacques Hiblot | 175cd7c | 2019-09-11 11:33:50 +0200 | [diff] [blame] | 340 | driver = "dwc3-generic-host"; |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 341 | break; |
Jean-Jacques Hiblot | 175cd7c | 2019-09-11 11:33:50 +0200 | [diff] [blame] | 342 | #endif |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 343 | default: |
| 344 | debug("%s: unsupported dr_mode\n", __func__); |
| 345 | return -ENODEV; |
| 346 | }; |
| 347 | |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 348 | if (!driver) |
| 349 | continue; |
| 350 | |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 351 | ret = device_bind_driver_to_node(parent, driver, name, |
Kever Yang | 1b80705 | 2020-03-04 08:59:50 +0800 | [diff] [blame] | 352 | node, &dev); |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 353 | if (ret) { |
| 354 | debug("%s: not able to bind usb device mode\n", |
| 355 | __func__); |
| 356 | return ret; |
| 357 | } |
| 358 | } |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 359 | |
| 360 | return 0; |
| 361 | } |
| 362 | |
| 363 | static int dwc3_glue_reset_init(struct udevice *dev, |
| 364 | struct dwc3_glue_data *glue) |
| 365 | { |
| 366 | int ret; |
| 367 | |
| 368 | ret = reset_get_bulk(dev, &glue->resets); |
Vignesh Raghavendra | e9310fc | 2019-10-25 13:48:05 +0530 | [diff] [blame] | 369 | if (ret == -ENOTSUPP || ret == -ENOENT) |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 370 | return 0; |
| 371 | else if (ret) |
| 372 | return ret; |
| 373 | |
| 374 | ret = reset_deassert_bulk(&glue->resets); |
| 375 | if (ret) { |
| 376 | reset_release_bulk(&glue->resets); |
| 377 | return ret; |
| 378 | } |
| 379 | |
| 380 | return 0; |
| 381 | } |
| 382 | |
| 383 | static int dwc3_glue_clk_init(struct udevice *dev, |
| 384 | struct dwc3_glue_data *glue) |
| 385 | { |
| 386 | int ret; |
| 387 | |
| 388 | ret = clk_get_bulk(dev, &glue->clks); |
Vignesh Raghavendra | e9310fc | 2019-10-25 13:48:05 +0530 | [diff] [blame] | 389 | if (ret == -ENOSYS || ret == -ENOENT) |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 390 | return 0; |
| 391 | if (ret) |
| 392 | return ret; |
| 393 | |
| 394 | #if CONFIG_IS_ENABLED(CLK) |
| 395 | ret = clk_enable_bulk(&glue->clks); |
| 396 | if (ret) { |
| 397 | clk_release_bulk(&glue->clks); |
| 398 | return ret; |
| 399 | } |
| 400 | #endif |
| 401 | |
| 402 | return 0; |
| 403 | } |
| 404 | |
| 405 | static int dwc3_glue_probe(struct udevice *dev) |
| 406 | { |
Jean-Jacques Hiblot | ae004d3 | 2018-11-29 10:52:49 +0100 | [diff] [blame] | 407 | struct dwc3_glue_ops *ops = (struct dwc3_glue_ops *)dev_get_driver_data(dev); |
Simon Glass | fa20e93 | 2020-12-03 16:55:20 -0700 | [diff] [blame] | 408 | struct dwc3_glue_data *glue = dev_get_plat(dev); |
Jean-Jacques Hiblot | ae004d3 | 2018-11-29 10:52:49 +0100 | [diff] [blame] | 409 | struct udevice *child = NULL; |
| 410 | int index = 0; |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 411 | int ret; |
| 412 | |
Jean-Jacques Hiblot | ae004d3 | 2018-11-29 10:52:49 +0100 | [diff] [blame] | 413 | glue->regs = dev_read_addr(dev); |
| 414 | |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 415 | ret = dwc3_glue_clk_init(dev, glue); |
| 416 | if (ret) |
| 417 | return ret; |
| 418 | |
| 419 | ret = dwc3_glue_reset_init(dev, glue); |
| 420 | if (ret) |
| 421 | return ret; |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 422 | |
Jean-Jacques Hiblot | ae004d3 | 2018-11-29 10:52:49 +0100 | [diff] [blame] | 423 | ret = device_find_first_child(dev, &child); |
| 424 | if (ret) |
| 425 | return ret; |
| 426 | |
Frank Wang | f5a6c5b | 2020-05-26 11:34:31 +0800 | [diff] [blame] | 427 | if (glue->resets.count == 0) { |
| 428 | ret = dwc3_glue_reset_init(child, glue); |
| 429 | if (ret) |
| 430 | return ret; |
| 431 | } |
| 432 | |
Jean-Jacques Hiblot | ae004d3 | 2018-11-29 10:52:49 +0100 | [diff] [blame] | 433 | while (child) { |
| 434 | enum usb_dr_mode dr_mode; |
| 435 | |
Simon Glass | a7ece58 | 2020-12-19 10:40:14 -0700 | [diff] [blame] | 436 | dr_mode = usb_get_dr_mode(dev_ofnode(child)); |
Jean-Jacques Hiblot | ae004d3 | 2018-11-29 10:52:49 +0100 | [diff] [blame] | 437 | device_find_next_child(&child); |
Marek Vasut | 68c8656 | 2022-04-13 00:42:55 +0200 | [diff] [blame^] | 438 | if (ops && ops->glue_configure) |
| 439 | ops->glue_configure(dev, index, dr_mode); |
Jean-Jacques Hiblot | ae004d3 | 2018-11-29 10:52:49 +0100 | [diff] [blame] | 440 | index++; |
| 441 | } |
| 442 | |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 443 | return 0; |
| 444 | } |
| 445 | |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 446 | static int dwc3_glue_remove(struct udevice *dev) |
| 447 | { |
Simon Glass | fa20e93 | 2020-12-03 16:55:20 -0700 | [diff] [blame] | 448 | struct dwc3_glue_data *glue = dev_get_plat(dev); |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 449 | |
| 450 | reset_release_bulk(&glue->resets); |
| 451 | |
| 452 | clk_release_bulk(&glue->clks); |
| 453 | |
Jean-Jacques Hiblot | 5a94557 | 2019-07-05 09:33:56 +0200 | [diff] [blame] | 454 | return 0; |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 455 | } |
| 456 | |
| 457 | static const struct udevice_id dwc3_glue_ids[] = { |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 458 | { .compatible = "xlnx,zynqmp-dwc3" }, |
Siva Durga Prasad Paladugu | 1eb3c30 | 2020-05-12 08:36:01 +0200 | [diff] [blame] | 459 | { .compatible = "xlnx,versal-dwc3" }, |
Jean-Jacques Hiblot | 3e0684b | 2018-12-04 11:12:56 +0100 | [diff] [blame] | 460 | { .compatible = "ti,keystone-dwc3"}, |
Jean-Jacques Hiblot | 65596f1 | 2018-11-29 10:57:40 +0100 | [diff] [blame] | 461 | { .compatible = "ti,dwc3", .data = (ulong)&ti_ops }, |
Jean-Jacques Hiblot | ca848df | 2018-12-04 11:30:50 +0100 | [diff] [blame] | 462 | { .compatible = "ti,am437x-dwc3", .data = (ulong)&ti_ops }, |
Vignesh Raghavendra | c628295 | 2019-12-09 10:37:29 +0530 | [diff] [blame] | 463 | { .compatible = "ti,am654-dwc3" }, |
Frank Wang | f5a6c5b | 2020-05-26 11:34:31 +0800 | [diff] [blame] | 464 | { .compatible = "rockchip,rk3328-dwc3" }, |
| 465 | { .compatible = "rockchip,rk3399-dwc3" }, |
Robert Marko | 746862b | 2020-09-10 16:00:05 +0200 | [diff] [blame] | 466 | { .compatible = "qcom,dwc3" }, |
Angus Ainslie | 6e382a8 | 2022-02-02 15:08:54 -0800 | [diff] [blame] | 467 | { .compatible = "fsl,imx8mq-dwc3" }, |
Andy Shevchenko | 221d7fa | 2020-12-03 19:45:01 +0200 | [diff] [blame] | 468 | { .compatible = "intel,tangier-dwc3" }, |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 469 | { } |
| 470 | }; |
| 471 | |
| 472 | U_BOOT_DRIVER(dwc3_generic_wrapper) = { |
| 473 | .name = "dwc3-generic-wrapper", |
Jean-Jacques Hiblot | b49b5c2 | 2019-07-05 09:33:58 +0200 | [diff] [blame] | 474 | .id = UCLASS_NOP, |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 475 | .of_match = dwc3_glue_ids, |
| 476 | .bind = dwc3_glue_bind, |
| 477 | .probe = dwc3_glue_probe, |
| 478 | .remove = dwc3_glue_remove, |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 479 | .plat_auto = sizeof(struct dwc3_glue_data), |
Jean-Jacques Hiblot | aa866a0 | 2018-11-29 10:52:48 +0100 | [diff] [blame] | 480 | |
Michal Simek | 9d8cbbf | 2018-05-18 13:15:06 +0200 | [diff] [blame] | 481 | }; |