blob: fb09b3ab1edb8ea764379bc5d84c13cb2707ebec [file] [log] [blame]
Patrick Delaunayd6e53c72018-10-26 09:02:52 +02001// SPDX-License-Identifier: GPL-2.0
Michal Simek9d8cbbf2018-05-18 13:15:06 +02002/*
3 * Generic DWC3 Glue layer
4 *
5 * Copyright (C) 2016 - 2018 Xilinx, Inc.
6 *
7 * Based on dwc3-omap.c.
8 */
9
10#include <common.h>
Simon Glass63334482019-11-14 12:57:39 -070011#include <cpu_func.h>
Simon Glass0f2af882020-05-10 11:40:05 -060012#include <log.h>
Michal Simek9d8cbbf2018-05-18 13:15:06 +020013#include <dm.h>
14#include <dm/device-internal.h>
15#include <dm/lists.h>
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +010016#include <dwc3-uboot.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060017#include <linux/bitops.h>
Frank Wangf5a6c5b2020-05-26 11:34:31 +080018#include <linux/delay.h>
Michal Simek9d8cbbf2018-05-18 13:15:06 +020019#include <linux/usb/ch9.h>
20#include <linux/usb/gadget.h>
21#include <malloc.h>
22#include <usb.h>
23#include "core.h"
24#include "gadget.h"
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +010025#include <reset.h>
26#include <clk.h>
Jean-Jacques Hiblot175cd7c2019-09-11 11:33:50 +020027#include <usb/xhci.h>
Michal Simek9d8cbbf2018-05-18 13:15:06 +020028
Frank Wangf5a6c5b2020-05-26 11:34:31 +080029struct dwc3_glue_data {
30 struct clk_bulk clks;
31 struct reset_ctl_bulk resets;
32 fdt_addr_t regs;
33};
34
Jean-Jacques Hiblota33aa762019-09-11 11:33:48 +020035struct dwc3_generic_plat {
36 fdt_addr_t base;
37 u32 maximum_speed;
38 enum usb_dr_mode dr_mode;
39};
40
Jean-Jacques Hiblota33aa762019-09-11 11:33:48 +020041struct dwc3_generic_priv {
Jean-Jacques Hiblot2bf2c352019-09-11 11:33:49 +020042 void *base;
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +010043 struct dwc3 dwc3;
developerf8bced12020-05-02 11:35:13 +020044 struct phy_bulk phys;
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +010045};
46
Jean-Jacques Hiblot175cd7c2019-09-11 11:33:50 +020047struct dwc3_generic_host_priv {
48 struct xhci_ctrl xhci_ctrl;
49 struct dwc3_generic_priv gen_priv;
50};
51
Jean-Jacques Hiblot2bf2c352019-09-11 11:33:49 +020052static int dwc3_generic_probe(struct udevice *dev,
53 struct dwc3_generic_priv *priv)
Michal Simek9d8cbbf2018-05-18 13:15:06 +020054{
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +010055 int rc;
Jean-Jacques Hiblota33aa762019-09-11 11:33:48 +020056 struct dwc3_generic_plat *plat = dev_get_platdata(dev);
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +010057 struct dwc3 *dwc3 = &priv->dwc3;
Frank Wangf5a6c5b2020-05-26 11:34:31 +080058 struct dwc3_glue_data *glue = dev_get_platdata(dev->parent);
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +010059
Jean-Jacques Hiblotce868d02019-09-11 11:33:52 +020060 dwc3->dev = dev;
Jean-Jacques Hiblota33aa762019-09-11 11:33:48 +020061 dwc3->maximum_speed = plat->maximum_speed;
62 dwc3->dr_mode = plat->dr_mode;
Jean-Jacques Hiblotce868d02019-09-11 11:33:52 +020063#if CONFIG_IS_ENABLED(OF_CONTROL)
64 dwc3_of_parse(dwc3);
65#endif
Jean-Jacques Hiblota33aa762019-09-11 11:33:48 +020066
Frank Wangf5a6c5b2020-05-26 11:34:31 +080067 /*
68 * It must hold whole USB3.0 OTG controller in resetting to hold pipe
69 * power state in P2 before initializing TypeC PHY on RK3399 platform.
70 */
71 if (device_is_compatible(dev->parent, "rockchip,rk3399-dwc3")) {
72 reset_assert_bulk(&glue->resets);
73 udelay(1);
74 }
75
developerf8bced12020-05-02 11:35:13 +020076 rc = dwc3_setup_phy(dev, &priv->phys);
Siva Durga Prasad Paladuguc37f8f32020-10-21 14:17:31 +020077 if (rc && rc != -ENOTSUPP)
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +010078 return rc;
79
Frank Wangf5a6c5b2020-05-26 11:34:31 +080080 if (device_is_compatible(dev->parent, "rockchip,rk3399-dwc3"))
81 reset_deassert_bulk(&glue->resets);
82
Jean-Jacques Hiblot2bf2c352019-09-11 11:33:49 +020083 priv->base = map_physmem(plat->base, DWC3_OTG_REGS_END, MAP_NOCACHE);
84 dwc3->regs = priv->base + DWC3_GLOBALS_REGS_START;
Jean-Jacques Hiblotce868d02019-09-11 11:33:52 +020085
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +010086
87 rc = dwc3_init(dwc3);
88 if (rc) {
Jean-Jacques Hiblot2bf2c352019-09-11 11:33:49 +020089 unmap_physmem(priv->base, MAP_NOCACHE);
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +010090 return rc;
91 }
Michal Simek9d8cbbf2018-05-18 13:15:06 +020092
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +010093 return 0;
Michal Simek9d8cbbf2018-05-18 13:15:06 +020094}
95
Jean-Jacques Hiblot2bf2c352019-09-11 11:33:49 +020096static int dwc3_generic_remove(struct udevice *dev,
97 struct dwc3_generic_priv *priv)
Michal Simek9d8cbbf2018-05-18 13:15:06 +020098{
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +010099 struct dwc3 *dwc3 = &priv->dwc3;
Michal Simek9d8cbbf2018-05-18 13:15:06 +0200100
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +0100101 dwc3_remove(dwc3);
developerf8bced12020-05-02 11:35:13 +0200102 dwc3_shutdown_phy(dev, &priv->phys);
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +0100103 unmap_physmem(dwc3->regs, MAP_NOCACHE);
Michal Simek9d8cbbf2018-05-18 13:15:06 +0200104
105 return 0;
106}
107
Jean-Jacques Hiblot2bf2c352019-09-11 11:33:49 +0200108static int dwc3_generic_ofdata_to_platdata(struct udevice *dev)
Michal Simek9d8cbbf2018-05-18 13:15:06 +0200109{
Jean-Jacques Hiblota33aa762019-09-11 11:33:48 +0200110 struct dwc3_generic_plat *plat = dev_get_platdata(dev);
Kever Yang1b807052020-03-04 08:59:50 +0800111 ofnode node = dev->node;
Michal Simek9d8cbbf2018-05-18 13:15:06 +0200112
Kever Yang1b807052020-03-04 08:59:50 +0800113 plat->base = dev_read_addr(dev);
Michal Simek9d8cbbf2018-05-18 13:15:06 +0200114
Jean-Jacques Hiblota33aa762019-09-11 11:33:48 +0200115 plat->maximum_speed = usb_get_maximum_speed(node);
116 if (plat->maximum_speed == USB_SPEED_UNKNOWN) {
Jean-Jacques Hiblot547df0d2019-09-11 11:33:51 +0200117 pr_info("No USB maximum speed specified. Using super speed\n");
118 plat->maximum_speed = USB_SPEED_SUPER;
Michal Simek9d8cbbf2018-05-18 13:15:06 +0200119 }
120
Jean-Jacques Hiblota33aa762019-09-11 11:33:48 +0200121 plat->dr_mode = usb_get_dr_mode(node);
122 if (plat->dr_mode == USB_DR_MODE_UNKNOWN) {
Michal Simek9d8cbbf2018-05-18 13:15:06 +0200123 pr_err("Invalid usb mode setup\n");
124 return -ENODEV;
125 }
126
127 return 0;
128}
129
Jean-Jacques Hiblot2bf2c352019-09-11 11:33:49 +0200130#if CONFIG_IS_ENABLED(DM_USB_GADGET)
131int dm_usb_gadget_handle_interrupts(struct udevice *dev)
132{
133 struct dwc3_generic_priv *priv = dev_get_priv(dev);
134 struct dwc3 *dwc3 = &priv->dwc3;
135
136 dwc3_gadget_uboot_handle_interrupt(dwc3);
137
138 return 0;
139}
140
141static int dwc3_generic_peripheral_probe(struct udevice *dev)
142{
143 struct dwc3_generic_priv *priv = dev_get_priv(dev);
144
145 return dwc3_generic_probe(dev, priv);
146}
147
148static int dwc3_generic_peripheral_remove(struct udevice *dev)
149{
150 struct dwc3_generic_priv *priv = dev_get_priv(dev);
151
152 return dwc3_generic_remove(dev, priv);
153}
154
Michal Simek9d8cbbf2018-05-18 13:15:06 +0200155U_BOOT_DRIVER(dwc3_generic_peripheral) = {
156 .name = "dwc3-generic-peripheral",
Jean-Jacques Hiblot9dc0d5c2018-11-29 10:52:46 +0100157 .id = UCLASS_USB_GADGET_GENERIC,
Jean-Jacques Hiblot2bf2c352019-09-11 11:33:49 +0200158 .ofdata_to_platdata = dwc3_generic_ofdata_to_platdata,
Michal Simek9d8cbbf2018-05-18 13:15:06 +0200159 .probe = dwc3_generic_peripheral_probe,
160 .remove = dwc3_generic_peripheral_remove,
Simon Glass8a2b47f2020-12-03 16:55:17 -0700161 .priv_auto = sizeof(struct dwc3_generic_priv),
162 .platdata_auto = sizeof(struct dwc3_generic_plat),
Michal Simek9d8cbbf2018-05-18 13:15:06 +0200163};
Jean-Jacques Hiblot44aaec72018-11-29 10:52:42 +0100164#endif
Michal Simek9d8cbbf2018-05-18 13:15:06 +0200165
Jean-Jacques Hiblot175cd7c2019-09-11 11:33:50 +0200166#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD)
167static int dwc3_generic_host_probe(struct udevice *dev)
168{
169 struct xhci_hcor *hcor;
170 struct xhci_hccr *hccr;
171 struct dwc3_generic_host_priv *priv = dev_get_priv(dev);
172 int rc;
173
174 rc = dwc3_generic_probe(dev, &priv->gen_priv);
175 if (rc)
176 return rc;
177
178 hccr = (struct xhci_hccr *)priv->gen_priv.base;
179 hcor = (struct xhci_hcor *)(priv->gen_priv.base +
180 HC_LENGTH(xhci_readl(&(hccr)->cr_capbase)));
181
182 return xhci_register(dev, hccr, hcor);
183}
184
185static int dwc3_generic_host_remove(struct udevice *dev)
186{
187 struct dwc3_generic_host_priv *priv = dev_get_priv(dev);
188 int rc;
189
190 rc = xhci_deregister(dev);
191 if (rc)
192 return rc;
193
194 return dwc3_generic_remove(dev, &priv->gen_priv);
195}
196
197U_BOOT_DRIVER(dwc3_generic_host) = {
198 .name = "dwc3-generic-host",
199 .id = UCLASS_USB,
200 .ofdata_to_platdata = dwc3_generic_ofdata_to_platdata,
201 .probe = dwc3_generic_host_probe,
202 .remove = dwc3_generic_host_remove,
Simon Glass8a2b47f2020-12-03 16:55:17 -0700203 .priv_auto = sizeof(struct dwc3_generic_host_priv),
204 .platdata_auto = sizeof(struct dwc3_generic_plat),
Jean-Jacques Hiblot175cd7c2019-09-11 11:33:50 +0200205 .ops = &xhci_usb_ops,
206 .flags = DM_FLAG_ALLOC_PRIV_DMA,
207};
208#endif
209
Jean-Jacques Hiblotae004d32018-11-29 10:52:49 +0100210struct dwc3_glue_ops {
211 void (*select_dr_mode)(struct udevice *dev, int index,
212 enum usb_dr_mode mode);
213};
214
Jean-Jacques Hiblot65596f12018-11-29 10:57:40 +0100215void dwc3_ti_select_dr_mode(struct udevice *dev, int index,
216 enum usb_dr_mode mode)
217{
218#define USBOTGSS_UTMI_OTG_STATUS 0x0084
219#define USBOTGSS_UTMI_OTG_OFFSET 0x0480
220
221/* UTMI_OTG_STATUS REGISTER */
222#define USBOTGSS_UTMI_OTG_STATUS_SW_MODE BIT(31)
223#define USBOTGSS_UTMI_OTG_STATUS_POWERPRESENT BIT(9)
224#define USBOTGSS_UTMI_OTG_STATUS_TXBITSTUFFENABLE BIT(8)
225#define USBOTGSS_UTMI_OTG_STATUS_IDDIG BIT(4)
226#define USBOTGSS_UTMI_OTG_STATUS_SESSEND BIT(3)
227#define USBOTGSS_UTMI_OTG_STATUS_SESSVALID BIT(2)
228#define USBOTGSS_UTMI_OTG_STATUS_VBUSVALID BIT(1)
229enum dwc3_omap_utmi_mode {
230 DWC3_OMAP_UTMI_MODE_UNKNOWN = 0,
231 DWC3_OMAP_UTMI_MODE_HW,
232 DWC3_OMAP_UTMI_MODE_SW,
233};
234
235 u32 use_id_pin;
236 u32 host_mode;
237 u32 reg;
238 u32 utmi_mode;
239 u32 utmi_status_offset = USBOTGSS_UTMI_OTG_STATUS;
240
241 struct dwc3_glue_data *glue = dev_get_platdata(dev);
242 void *base = map_physmem(glue->regs, 0x10000, MAP_NOCACHE);
243
244 if (device_is_compatible(dev, "ti,am437x-dwc3"))
245 utmi_status_offset += USBOTGSS_UTMI_OTG_OFFSET;
246
247 utmi_mode = dev_read_u32_default(dev, "utmi-mode",
248 DWC3_OMAP_UTMI_MODE_UNKNOWN);
249 if (utmi_mode != DWC3_OMAP_UTMI_MODE_HW) {
250 debug("%s: OTG is not supported. defaulting to PERIPHERAL\n",
251 dev->name);
252 mode = USB_DR_MODE_PERIPHERAL;
253 }
254
255 switch (mode) {
256 case USB_DR_MODE_PERIPHERAL:
257 use_id_pin = 0;
258 host_mode = 0;
259 break;
260 case USB_DR_MODE_HOST:
261 use_id_pin = 0;
262 host_mode = 1;
263 break;
264 case USB_DR_MODE_OTG:
265 default:
266 use_id_pin = 1;
267 host_mode = 0;
268 break;
269 }
270
271 reg = readl(base + utmi_status_offset);
272
273 reg &= ~(USBOTGSS_UTMI_OTG_STATUS_SW_MODE);
274 if (!use_id_pin)
275 reg |= USBOTGSS_UTMI_OTG_STATUS_SW_MODE;
276
277 writel(reg, base + utmi_status_offset);
278
279 reg &= ~(USBOTGSS_UTMI_OTG_STATUS_SESSEND |
280 USBOTGSS_UTMI_OTG_STATUS_VBUSVALID |
281 USBOTGSS_UTMI_OTG_STATUS_IDDIG);
282
283 reg |= USBOTGSS_UTMI_OTG_STATUS_SESSVALID |
284 USBOTGSS_UTMI_OTG_STATUS_POWERPRESENT;
285
286 if (!host_mode)
287 reg |= USBOTGSS_UTMI_OTG_STATUS_IDDIG |
288 USBOTGSS_UTMI_OTG_STATUS_VBUSVALID;
289
290 writel(reg, base + utmi_status_offset);
291
292 unmap_physmem(base, MAP_NOCACHE);
293}
294
295struct dwc3_glue_ops ti_ops = {
296 .select_dr_mode = dwc3_ti_select_dr_mode,
297};
298
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +0100299static int dwc3_glue_bind(struct udevice *parent)
Michal Simek9d8cbbf2018-05-18 13:15:06 +0200300{
Kever Yang1b807052020-03-04 08:59:50 +0800301 ofnode node;
Michal Simek9d8cbbf2018-05-18 13:15:06 +0200302 int ret;
303
Kever Yang1b807052020-03-04 08:59:50 +0800304 ofnode_for_each_subnode(node, parent->node) {
305 const char *name = ofnode_get_name(node);
Michal Simek9d8cbbf2018-05-18 13:15:06 +0200306 enum usb_dr_mode dr_mode;
307 struct udevice *dev;
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +0100308 const char *driver = NULL;
Michal Simek9d8cbbf2018-05-18 13:15:06 +0200309
310 debug("%s: subnode name: %s\n", __func__, name);
Michal Simek9d8cbbf2018-05-18 13:15:06 +0200311
312 dr_mode = usb_get_dr_mode(node);
313
314 switch (dr_mode) {
315 case USB_DR_MODE_PERIPHERAL:
316 case USB_DR_MODE_OTG:
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +0100317#if CONFIG_IS_ENABLED(DM_USB_GADGET)
Michal Simek9d8cbbf2018-05-18 13:15:06 +0200318 debug("%s: dr_mode: OTG or Peripheral\n", __func__);
319 driver = "dwc3-generic-peripheral";
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +0100320#endif
Michal Simek9d8cbbf2018-05-18 13:15:06 +0200321 break;
Jean-Jacques Hiblot175cd7c2019-09-11 11:33:50 +0200322#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD)
Michal Simek9d8cbbf2018-05-18 13:15:06 +0200323 case USB_DR_MODE_HOST:
324 debug("%s: dr_mode: HOST\n", __func__);
Jean-Jacques Hiblot175cd7c2019-09-11 11:33:50 +0200325 driver = "dwc3-generic-host";
Michal Simek9d8cbbf2018-05-18 13:15:06 +0200326 break;
Jean-Jacques Hiblot175cd7c2019-09-11 11:33:50 +0200327#endif
Michal Simek9d8cbbf2018-05-18 13:15:06 +0200328 default:
329 debug("%s: unsupported dr_mode\n", __func__);
330 return -ENODEV;
331 };
332
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +0100333 if (!driver)
334 continue;
335
Michal Simek9d8cbbf2018-05-18 13:15:06 +0200336 ret = device_bind_driver_to_node(parent, driver, name,
Kever Yang1b807052020-03-04 08:59:50 +0800337 node, &dev);
Michal Simek9d8cbbf2018-05-18 13:15:06 +0200338 if (ret) {
339 debug("%s: not able to bind usb device mode\n",
340 __func__);
341 return ret;
342 }
343 }
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +0100344
345 return 0;
346}
347
348static int dwc3_glue_reset_init(struct udevice *dev,
349 struct dwc3_glue_data *glue)
350{
351 int ret;
352
353 ret = reset_get_bulk(dev, &glue->resets);
Vignesh Raghavendrae9310fc2019-10-25 13:48:05 +0530354 if (ret == -ENOTSUPP || ret == -ENOENT)
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +0100355 return 0;
356 else if (ret)
357 return ret;
358
359 ret = reset_deassert_bulk(&glue->resets);
360 if (ret) {
361 reset_release_bulk(&glue->resets);
362 return ret;
363 }
364
365 return 0;
366}
367
368static int dwc3_glue_clk_init(struct udevice *dev,
369 struct dwc3_glue_data *glue)
370{
371 int ret;
372
373 ret = clk_get_bulk(dev, &glue->clks);
Vignesh Raghavendrae9310fc2019-10-25 13:48:05 +0530374 if (ret == -ENOSYS || ret == -ENOENT)
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +0100375 return 0;
376 if (ret)
377 return ret;
378
379#if CONFIG_IS_ENABLED(CLK)
380 ret = clk_enable_bulk(&glue->clks);
381 if (ret) {
382 clk_release_bulk(&glue->clks);
383 return ret;
384 }
385#endif
386
387 return 0;
388}
389
390static int dwc3_glue_probe(struct udevice *dev)
391{
Jean-Jacques Hiblotae004d32018-11-29 10:52:49 +0100392 struct dwc3_glue_ops *ops = (struct dwc3_glue_ops *)dev_get_driver_data(dev);
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +0100393 struct dwc3_glue_data *glue = dev_get_platdata(dev);
Jean-Jacques Hiblotae004d32018-11-29 10:52:49 +0100394 struct udevice *child = NULL;
395 int index = 0;
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +0100396 int ret;
397
Jean-Jacques Hiblotae004d32018-11-29 10:52:49 +0100398 glue->regs = dev_read_addr(dev);
399
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +0100400 ret = dwc3_glue_clk_init(dev, glue);
401 if (ret)
402 return ret;
403
404 ret = dwc3_glue_reset_init(dev, glue);
405 if (ret)
406 return ret;
Michal Simek9d8cbbf2018-05-18 13:15:06 +0200407
Jean-Jacques Hiblotae004d32018-11-29 10:52:49 +0100408 ret = device_find_first_child(dev, &child);
409 if (ret)
410 return ret;
411
Frank Wangf5a6c5b2020-05-26 11:34:31 +0800412 if (glue->resets.count == 0) {
413 ret = dwc3_glue_reset_init(child, glue);
414 if (ret)
415 return ret;
416 }
417
Jean-Jacques Hiblotae004d32018-11-29 10:52:49 +0100418 while (child) {
419 enum usb_dr_mode dr_mode;
420
Kever Yang1b807052020-03-04 08:59:50 +0800421 dr_mode = usb_get_dr_mode(child->node);
Jean-Jacques Hiblotae004d32018-11-29 10:52:49 +0100422 device_find_next_child(&child);
423 if (ops && ops->select_dr_mode)
424 ops->select_dr_mode(dev, index, dr_mode);
425 index++;
426 }
427
Michal Simek9d8cbbf2018-05-18 13:15:06 +0200428 return 0;
429}
430
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +0100431static int dwc3_glue_remove(struct udevice *dev)
432{
433 struct dwc3_glue_data *glue = dev_get_platdata(dev);
434
435 reset_release_bulk(&glue->resets);
436
437 clk_release_bulk(&glue->clks);
438
Jean-Jacques Hiblot5a945572019-07-05 09:33:56 +0200439 return 0;
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +0100440}
441
442static const struct udevice_id dwc3_glue_ids[] = {
Michal Simek9d8cbbf2018-05-18 13:15:06 +0200443 { .compatible = "xlnx,zynqmp-dwc3" },
Siva Durga Prasad Paladugu1eb3c302020-05-12 08:36:01 +0200444 { .compatible = "xlnx,versal-dwc3" },
Jean-Jacques Hiblot3e0684b2018-12-04 11:12:56 +0100445 { .compatible = "ti,keystone-dwc3"},
Jean-Jacques Hiblot65596f12018-11-29 10:57:40 +0100446 { .compatible = "ti,dwc3", .data = (ulong)&ti_ops },
Jean-Jacques Hiblotca848df2018-12-04 11:30:50 +0100447 { .compatible = "ti,am437x-dwc3", .data = (ulong)&ti_ops },
Vignesh Raghavendrac6282952019-12-09 10:37:29 +0530448 { .compatible = "ti,am654-dwc3" },
Frank Wangf5a6c5b2020-05-26 11:34:31 +0800449 { .compatible = "rockchip,rk3328-dwc3" },
450 { .compatible = "rockchip,rk3399-dwc3" },
Robert Marko746862b2020-09-10 16:00:05 +0200451 { .compatible = "qcom,dwc3" },
Michal Simek9d8cbbf2018-05-18 13:15:06 +0200452 { }
453};
454
455U_BOOT_DRIVER(dwc3_generic_wrapper) = {
456 .name = "dwc3-generic-wrapper",
Jean-Jacques Hiblotb49b5c22019-07-05 09:33:58 +0200457 .id = UCLASS_NOP,
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +0100458 .of_match = dwc3_glue_ids,
459 .bind = dwc3_glue_bind,
460 .probe = dwc3_glue_probe,
461 .remove = dwc3_glue_remove,
Simon Glass8a2b47f2020-12-03 16:55:17 -0700462 .platdata_auto = sizeof(struct dwc3_glue_data),
Jean-Jacques Hiblotaa866a02018-11-29 10:52:48 +0100463
Michal Simek9d8cbbf2018-05-18 13:15:06 +0200464};