Tom Warren | d50f905 | 2011-01-27 10:58:08 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2010,2011 |
| 3 | * NVIDIA Corporation <www.nvidia.com> |
| 4 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
Tom Warren | d50f905 | 2011-01-27 10:58:08 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef __CONFIG_H |
| 9 | #define __CONFIG_H |
| 10 | |
Alexey Brodkin | 267d8e2 | 2014-02-26 17:47:58 +0400 | [diff] [blame] | 11 | #include <linux/sizes.h> |
Simon Glass | ef2fb1a | 2012-04-02 13:19:03 +0000 | [diff] [blame] | 12 | |
| 13 | /* LP0 suspend / resume */ |
Tom Warren | 22562a4 | 2012-09-04 17:00:24 -0700 | [diff] [blame] | 14 | #define CONFIG_TEGRA_LP0 |
Simon Glass | ef2fb1a | 2012-04-02 13:19:03 +0000 | [diff] [blame] | 15 | #define CONFIG_AES |
| 16 | #define CONFIG_TEGRA_PMU |
| 17 | #define CONFIG_TPS6586X_POWER |
| 18 | #define CONFIG_TEGRA_CLOCK_SCALING |
| 19 | |
Allen Martin | 55d98a1 | 2012-08-31 08:30:00 +0000 | [diff] [blame] | 20 | #include "tegra20-common.h" |
Tom Warren | d50f905 | 2011-01-27 10:58:08 +0000 | [diff] [blame] | 21 | |
| 22 | /* High-level configuration options */ |
Allen Martin | 55d98a1 | 2012-08-31 08:30:00 +0000 | [diff] [blame] | 23 | #define V_PROMPT "Tegra20 (SeaBoard) # " |
Tom Warren | 22562a4 | 2012-09-04 17:00:24 -0700 | [diff] [blame] | 24 | #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Seaboard" |
Tom Warren | d50f905 | 2011-01-27 10:58:08 +0000 | [diff] [blame] | 25 | |
| 26 | /* Board-specific serial config */ |
Tom Warren | 22562a4 | 2012-09-04 17:00:24 -0700 | [diff] [blame] | 27 | #define CONFIG_TEGRA_ENABLE_UARTD |
Tom Warren | d50f905 | 2011-01-27 10:58:08 +0000 | [diff] [blame] | 28 | #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE |
| 29 | |
Simon Glass | c800b26 | 2011-11-05 04:46:47 +0000 | [diff] [blame] | 30 | /* On Seaboard: GPIO_PI3 = Port I = 8, bit = 3 */ |
| 31 | #define CONFIG_UART_DISABLE_GPIO GPIO_PI3 |
| 32 | |
Tom Warren | 10ae897 | 2011-02-23 09:54:31 +0000 | [diff] [blame] | 33 | #define CONFIG_MACH_TYPE MACH_TYPE_SEABOARD |
Tom Warren | d50f905 | 2011-01-27 10:58:08 +0000 | [diff] [blame] | 34 | |
Simon Glass | a05a32b | 2012-02-03 15:14:00 +0000 | [diff] [blame] | 35 | /* I2C */ |
Simon Glass | 026fefb | 2012-10-30 07:28:53 +0000 | [diff] [blame] | 36 | #define CONFIG_SYS_I2C_TEGRA |
Simon Glass | a05a32b | 2012-02-03 15:14:00 +0000 | [diff] [blame] | 37 | #define CONFIG_CMD_I2C |
| 38 | |
Tom Warren | 732c37a | 2011-05-31 10:30:38 +0000 | [diff] [blame] | 39 | /* SD/MMC */ |
| 40 | #define CONFIG_MMC |
| 41 | #define CONFIG_GENERIC_MMC |
Tom Warren | 8c57e96 | 2012-05-22 11:44:48 +0000 | [diff] [blame] | 42 | #define CONFIG_TEGRA_MMC |
Tom Warren | 732c37a | 2011-05-31 10:30:38 +0000 | [diff] [blame] | 43 | #define CONFIG_CMD_MMC |
| 44 | |
Stephen Warren | ade0d5c | 2012-05-24 11:38:39 +0000 | [diff] [blame] | 45 | /* Environment in eMMC, at the end of 2nd "boot sector" */ |
| 46 | #define CONFIG_ENV_IS_IN_MMC |
Stephen Warren | 46597a3 | 2013-06-11 15:14:03 -0600 | [diff] [blame] | 47 | #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) |
Stephen Warren | ade0d5c | 2012-05-24 11:38:39 +0000 | [diff] [blame] | 48 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
Stephen Warren | 20da39b | 2012-07-30 10:55:45 +0000 | [diff] [blame] | 49 | #define CONFIG_SYS_MMC_ENV_PART 2 |
Simon Glass | 3e094a8 | 2012-02-27 10:52:52 +0000 | [diff] [blame] | 50 | |
| 51 | /* USB Host support */ |
Stephen Warren | 9cc4e4b | 2012-10-12 09:45:49 +0000 | [diff] [blame] | 52 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 3 |
Simon Glass | 3e094a8 | 2012-02-27 10:52:52 +0000 | [diff] [blame] | 53 | #define CONFIG_USB_EHCI |
| 54 | #define CONFIG_USB_EHCI_TEGRA |
| 55 | #define CONFIG_USB_STORAGE |
| 56 | #define CONFIG_CMD_USB |
| 57 | |
Stephen Warren | 96a025a | 2012-05-16 06:36:12 +0000 | [diff] [blame] | 58 | /* USB networking support */ |
| 59 | #define CONFIG_USB_HOST_ETHER |
Stephen Warren | 96a025a | 2012-05-16 06:36:12 +0000 | [diff] [blame] | 60 | #define CONFIG_USB_ETHER_ASIX |
| 61 | |
| 62 | /* General networking support */ |
| 63 | #define CONFIG_CMD_NET |
| 64 | #define CONFIG_CMD_DHCP |
| 65 | |
Simon Glass | 9e838a3 | 2012-04-17 09:01:37 +0000 | [diff] [blame] | 66 | /* Enable keyboard */ |
Tom Warren | 22562a4 | 2012-09-04 17:00:24 -0700 | [diff] [blame] | 67 | #define CONFIG_TEGRA_KEYBOARD |
Simon Glass | 9e838a3 | 2012-04-17 09:01:37 +0000 | [diff] [blame] | 68 | #define CONFIG_KEYBOARD |
| 69 | |
Allen Martin | fec01a0 | 2012-10-24 08:32:06 +0000 | [diff] [blame] | 70 | /* USB keyboard */ |
| 71 | #define CONFIG_USB_KEYBOARD |
Mayuresh Kulkarni | ac221a8 | 2012-10-17 13:25:00 +0000 | [diff] [blame] | 72 | |
| 73 | /* LCD support */ |
| 74 | #define CONFIG_LCD |
| 75 | #define CONFIG_PWM_TEGRA |
| 76 | #define CONFIG_VIDEO_TEGRA |
| 77 | #define LCD_BPP LCD_COLOR16 |
| 78 | #define CONFIG_SYS_WHITE_ON_BLACK |
| 79 | #define CONFIG_CONSOLE_SCROLL_LINES 10 |
Stephen Warren | de17c29 | 2012-05-16 06:21:00 +0000 | [diff] [blame] | 80 | |
Simon Glass | bad90ee | 2012-07-29 20:53:30 +0000 | [diff] [blame] | 81 | /* NAND support */ |
| 82 | #define CONFIG_CMD_NAND |
| 83 | #define CONFIG_TEGRA_NAND |
| 84 | |
| 85 | /* Max number of NAND devices */ |
| 86 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
Simon Glass | 3e7b329 | 2012-11-05 13:21:01 +0000 | [diff] [blame] | 87 | |
| 88 | #include "tegra-common-post.h" |
| 89 | |
Tom Warren | d50f905 | 2011-01-27 10:58:08 +0000 | [diff] [blame] | 90 | #endif /* __CONFIG_H */ |