Tom Warren | d50f905 | 2011-01-27 10:58:08 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2010,2011 |
| 3 | * NVIDIA Corporation <www.nvidia.com> |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #ifndef __CONFIG_H |
| 25 | #define __CONFIG_H |
| 26 | |
| 27 | #include <asm/sizes.h> |
Simon Glass | ef2fb1a | 2012-04-02 13:19:03 +0000 | [diff] [blame] | 28 | |
| 29 | /* LP0 suspend / resume */ |
Tom Warren | 22562a4 | 2012-09-04 17:00:24 -0700 | [diff] [blame] | 30 | #define CONFIG_TEGRA_LP0 |
Simon Glass | ef2fb1a | 2012-04-02 13:19:03 +0000 | [diff] [blame] | 31 | #define CONFIG_AES |
| 32 | #define CONFIG_TEGRA_PMU |
| 33 | #define CONFIG_TPS6586X_POWER |
| 34 | #define CONFIG_TEGRA_CLOCK_SCALING |
| 35 | |
Allen Martin | 55d98a1 | 2012-08-31 08:30:00 +0000 | [diff] [blame] | 36 | #include "tegra20-common.h" |
Tom Warren | d50f905 | 2011-01-27 10:58:08 +0000 | [diff] [blame] | 37 | |
Simon Glass | f678ae6 | 2012-02-27 10:52:53 +0000 | [diff] [blame] | 38 | /* Enable fdt support for Seaboard. Flash the image in u-boot-dtb.bin */ |
Allen Martin | 55d98a1 | 2012-08-31 08:30:00 +0000 | [diff] [blame] | 39 | #define CONFIG_DEFAULT_DEVICE_TREE tegra20-seaboard |
Simon Glass | f678ae6 | 2012-02-27 10:52:53 +0000 | [diff] [blame] | 40 | #define CONFIG_OF_CONTROL |
| 41 | #define CONFIG_OF_SEPARATE |
| 42 | |
Tom Warren | d50f905 | 2011-01-27 10:58:08 +0000 | [diff] [blame] | 43 | /* High-level configuration options */ |
Allen Martin | 55d98a1 | 2012-08-31 08:30:00 +0000 | [diff] [blame] | 44 | #define V_PROMPT "Tegra20 (SeaBoard) # " |
Tom Warren | 22562a4 | 2012-09-04 17:00:24 -0700 | [diff] [blame] | 45 | #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Seaboard" |
Tom Warren | d50f905 | 2011-01-27 10:58:08 +0000 | [diff] [blame] | 46 | |
| 47 | /* Board-specific serial config */ |
Tom Warren | 22562a4 | 2012-09-04 17:00:24 -0700 | [diff] [blame] | 48 | #define CONFIG_TEGRA_ENABLE_UARTD |
Tom Warren | d50f905 | 2011-01-27 10:58:08 +0000 | [diff] [blame] | 49 | #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE |
| 50 | |
Simon Glass | c800b26 | 2011-11-05 04:46:47 +0000 | [diff] [blame] | 51 | /* On Seaboard: GPIO_PI3 = Port I = 8, bit = 3 */ |
| 52 | #define CONFIG_UART_DISABLE_GPIO GPIO_PI3 |
| 53 | |
Tom Warren | 10ae897 | 2011-02-23 09:54:31 +0000 | [diff] [blame] | 54 | #define CONFIG_MACH_TYPE MACH_TYPE_SEABOARD |
Tom Warren | d50f905 | 2011-01-27 10:58:08 +0000 | [diff] [blame] | 55 | |
Tom Warren | 112a188 | 2011-04-14 12:18:06 +0000 | [diff] [blame] | 56 | #define CONFIG_BOARD_EARLY_INIT_F |
Tom Warren | 732c37a | 2011-05-31 10:30:38 +0000 | [diff] [blame] | 57 | |
Simon Glass | a05a32b | 2012-02-03 15:14:00 +0000 | [diff] [blame] | 58 | /* I2C */ |
| 59 | #define CONFIG_TEGRA_I2C |
| 60 | #define CONFIG_SYS_I2C_INIT_BOARD |
| 61 | #define CONFIG_I2C_MULTI_BUS |
| 62 | #define CONFIG_SYS_MAX_I2C_BUS 4 |
| 63 | #define CONFIG_SYS_I2C_SPEED 100000 |
| 64 | #define CONFIG_CMD_I2C |
| 65 | |
Tom Warren | 732c37a | 2011-05-31 10:30:38 +0000 | [diff] [blame] | 66 | /* SD/MMC */ |
| 67 | #define CONFIG_MMC |
| 68 | #define CONFIG_GENERIC_MMC |
Tom Warren | 8c57e96 | 2012-05-22 11:44:48 +0000 | [diff] [blame] | 69 | #define CONFIG_TEGRA_MMC |
Tom Warren | 732c37a | 2011-05-31 10:30:38 +0000 | [diff] [blame] | 70 | #define CONFIG_CMD_MMC |
| 71 | |
| 72 | #define CONFIG_DOS_PARTITION |
| 73 | #define CONFIG_EFI_PARTITION |
| 74 | #define CONFIG_CMD_EXT2 |
| 75 | #define CONFIG_CMD_FAT |
Simon Glass | 4e61a34 | 2011-11-05 04:46:48 +0000 | [diff] [blame] | 76 | |
Stephen Warren | ade0d5c | 2012-05-24 11:38:39 +0000 | [diff] [blame] | 77 | /* Environment in eMMC, at the end of 2nd "boot sector" */ |
| 78 | #define CONFIG_ENV_IS_IN_MMC |
Stephen Warren | 20da39b | 2012-07-30 10:55:45 +0000 | [diff] [blame] | 79 | #define CONFIG_ENV_OFFSET ((512 * 1024) - CONFIG_ENV_SIZE) |
Stephen Warren | ade0d5c | 2012-05-24 11:38:39 +0000 | [diff] [blame] | 80 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
Stephen Warren | 20da39b | 2012-07-30 10:55:45 +0000 | [diff] [blame] | 81 | #define CONFIG_SYS_MMC_ENV_PART 2 |
Simon Glass | 3e094a8 | 2012-02-27 10:52:52 +0000 | [diff] [blame] | 82 | |
| 83 | /* USB Host support */ |
Stephen Warren | 9cc4e4b | 2012-10-12 09:45:49 +0000 | [diff] [blame^] | 84 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 3 |
Simon Glass | 3e094a8 | 2012-02-27 10:52:52 +0000 | [diff] [blame] | 85 | #define CONFIG_USB_EHCI |
| 86 | #define CONFIG_USB_EHCI_TEGRA |
| 87 | #define CONFIG_USB_STORAGE |
| 88 | #define CONFIG_CMD_USB |
| 89 | |
Stephen Warren | 96a025a | 2012-05-16 06:36:12 +0000 | [diff] [blame] | 90 | /* USB networking support */ |
| 91 | #define CONFIG_USB_HOST_ETHER |
Stephen Warren | 96a025a | 2012-05-16 06:36:12 +0000 | [diff] [blame] | 92 | #define CONFIG_USB_ETHER_ASIX |
| 93 | |
| 94 | /* General networking support */ |
| 95 | #define CONFIG_CMD_NET |
| 96 | #define CONFIG_CMD_DHCP |
| 97 | |
Simon Glass | 9e838a3 | 2012-04-17 09:01:37 +0000 | [diff] [blame] | 98 | /* Enable keyboard */ |
Tom Warren | 22562a4 | 2012-09-04 17:00:24 -0700 | [diff] [blame] | 99 | #define CONFIG_TEGRA_KEYBOARD |
Simon Glass | 9e838a3 | 2012-04-17 09:01:37 +0000 | [diff] [blame] | 100 | #define CONFIG_KEYBOARD |
| 101 | |
Tom Warren | 22562a4 | 2012-09-04 17:00:24 -0700 | [diff] [blame] | 102 | #undef TEGRA_DEVICE_SETTINGS |
| 103 | #define TEGRA_DEVICE_SETTINGS "stdin=serial,tegra-kbc\0" \ |
| 104 | "stdout=serial\0" \ |
| 105 | "stderr=serial\0" |
Stephen Warren | de17c29 | 2012-05-16 06:21:00 +0000 | [diff] [blame] | 106 | |
Tom Warren | 22562a4 | 2012-09-04 17:00:24 -0700 | [diff] [blame] | 107 | #include "tegra-common-post.h" |
Stephen Warren | de17c29 | 2012-05-16 06:21:00 +0000 | [diff] [blame] | 108 | |
Simon Glass | bad90ee | 2012-07-29 20:53:30 +0000 | [diff] [blame] | 109 | /* NAND support */ |
| 110 | #define CONFIG_CMD_NAND |
| 111 | #define CONFIG_TEGRA_NAND |
| 112 | |
| 113 | /* Max number of NAND devices */ |
| 114 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 115 | |
| 116 | /* Somewhat oddly, the NAND base address must be a config option */ |
Tom Warren | 22562a4 | 2012-09-04 17:00:24 -0700 | [diff] [blame] | 117 | #define CONFIG_SYS_NAND_BASE NV_PA_NAND_BASE |
Tom Warren | d50f905 | 2011-01-27 10:58:08 +0000 | [diff] [blame] | 118 | #endif /* __CONFIG_H */ |