blob: 8b8a73d0f9ee79a43343c6f1b9e56562ba712418 [file] [log] [blame]
Vikas Manocha1b51c932016-02-11 15:47:20 -08001/*
Patrice Chotard789ee0e2017-10-23 09:53:58 +02002 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
3 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
Vikas Manocha1b51c932016-02-11 15:47:20 -08004 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
Vikas Manocha1b51c932016-02-11 15:47:20 -080011#define CONFIG_SYS_FLASH_BASE 0x08000000
12#define CONFIG_SYS_INIT_SP_ADDR 0x20050000
Vikas Manocha50218ae2017-05-28 12:55:10 -070013
14#ifdef CONFIG_SUPPORT_SPL
Vikas Manochaf0e32c02017-05-28 12:55:14 -070015#define CONFIG_SYS_LOAD_ADDR 0x08008000
Vikas Manocha50218ae2017-05-28 12:55:10 -070016#else
Vikas Manochaf0e32c02017-05-28 12:55:14 -070017#define CONFIG_SYS_LOAD_ADDR 0xC0400000
18#define CONFIG_LOADADDR 0xC0400000
Vikas Manocha50218ae2017-05-28 12:55:10 -070019#endif
Vikas Manocha1b51c932016-02-11 15:47:20 -080020
Vikas Manocha1b51c932016-02-11 15:47:20 -080021/*
22 * Configuration of the external SDRAM memory
23 */
24#define CONFIG_NR_DRAM_BANKS 1
Vikas Manocha1b51c932016-02-11 15:47:20 -080025
Vikas Manocha49408022016-03-09 15:18:14 -080026#define CONFIG_SYS_MAX_FLASH_SECT 8
27#define CONFIG_SYS_MAX_FLASH_BANKS 1
Vikas Manocha1b51c932016-02-11 15:47:20 -080028
Vikas Manocha1b51c932016-02-11 15:47:20 -080029#define CONFIG_ENV_SIZE (8 << 10)
30
Vikas Manocha49408022016-03-09 15:18:14 -080031#define CONFIG_STM32_FLASH
Vikas Manocha1b51c932016-02-11 15:47:20 -080032
Michael Kurz812962b2017-01-22 16:04:27 +010033#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL (8)
34#define CONFIG_DW_ALTDESCRIPTOR
35#define CONFIG_MII
Michael Kurz2c5a22f2017-01-22 16:04:29 +010036#define CONFIG_PHY_SMSC
Michael Kurz812962b2017-01-22 16:04:27 +010037
Toshifumi NISHINAGA65bfb9c2016-07-08 01:02:24 +090038#define CONFIG_SYS_CLK_FREQ 200000000 /* 200 MHz */
Vikas Manocha1b51c932016-02-11 15:47:20 -080039#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */
40
41#define CONFIG_CMDLINE_TAG
42#define CONFIG_SETUP_MEMORY_TAGS
43#define CONFIG_INITRD_TAG
44#define CONFIG_REVISION_TAG
45
46#define CONFIG_SYS_CBSIZE 1024
Vikas Manocha1b51c932016-02-11 15:47:20 -080047
Michael Kurz812962b2017-01-22 16:04:27 +010048#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
Vikas Manocha1b51c932016-02-11 15:47:20 -080049
Vikas Manocha1b51c932016-02-11 15:47:20 -080050#define CONFIG_BOOTCOMMAND \
51 "run bootcmd_romfs"
52
53#define CONFIG_EXTRA_ENV_SETTINGS \
54 "bootargs_romfs=uclinux.physaddr=0x08180000 root=/dev/mtdblock0\0" \
55 "bootcmd_romfs=setenv bootargs ${bootargs} ${bootargs_romfs};" \
56 "bootm 0x08044000 - 0x08042000\0"
57
Vikas Manocha1b51c932016-02-11 15:47:20 -080058
59/*
60 * Command line configuration.
61 */
Vikas Manocha1a1e2752017-03-27 13:02:45 -070062#define CONFIG_CMD_CACHE
Vikas Manocha9c7573e2017-04-10 15:03:00 -070063#define CONFIG_BOARD_LATE_INIT
Vikas Manochad7a80fc2017-04-10 15:03:02 -070064#define CONFIG_DISPLAY_BOARDINFO
Vikas Manocha50218ae2017-05-28 12:55:10 -070065
66/* For SPL */
67#ifdef CONFIG_SUPPORT_SPL
68#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
Vikas Manocha50218ae2017-05-28 12:55:10 -070069#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_FLASH_BASE
70#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
71#define CONFIG_SYS_SPL_LEN 0x00008000
Vikas Manochaf0e32c02017-05-28 12:55:14 -070072#define CONFIG_SYS_UBOOT_START 0x080083FD
Vikas Manocha50218ae2017-05-28 12:55:10 -070073#define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + \
74 CONFIG_SYS_SPL_LEN)
Vikas Manochab785bb42017-05-28 12:55:13 -070075
Vikas Manochab785bb42017-05-28 12:55:13 -070076/* DT blob (fdt) address */
Vikas Manochab785bb42017-05-28 12:55:13 -070077#define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \
78 0x1C0000)
Vikas Manocha50218ae2017-05-28 12:55:10 -070079#endif
80/* For SPL ends */
81
yannick fertre030af822018-03-02 15:59:28 +010082/* For splashcreen */
83#ifdef CONFIG_DM_VIDEO
84#define CONFIG_VIDEO_BMP_RLE8
85#define CONFIG_BMP_16BPP
86#define CONFIG_BMP_24BPP
87#define CONFIG_BMP_32BPP
88#define CONFIG_SPLASH_SCREEN
89#define CONFIG_SPLASH_SCREEN_ALIGN
90#endif
91
Vikas Manocha1b51c932016-02-11 15:47:20 -080092#endif /* __CONFIG_H */