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git01.mediatek.com / filogic / uboot / a3782b1197d19ea5f0ee4e9de53507cca525976a / . / drivers / usb / host / Kconfig
blob: bb5893d56dbed2f62c54afb279081a8e77f8f881 [file] [log] [blame]
Masahiro Yamada1b0a06b2014-11-07 18:48:31 +0900[diff] [blame]1#
2# USB Host Controller Drivers
3#
4comment "USB Host Controller Drivers"
5
Masahiro Yamada59cfdc02016-08-01 00:16:34 +0900[diff] [blame]6config USB_HOST
7 bool
Tom Rini5b9e6162021-07-09 10:11:56 -0400[diff] [blame]8 select DM_USB
Marek Vasut1d5c59c2023-05-06 16:42:37 +0200[diff] [blame]9 help
10 Enable access to USB (Universal Serial Bus) host devices so that
11 SPL can load U-Boot from a connected USB peripheral, such as a USB
12 flash stick. While USB takes a little longer to start up than most
13 buses, it is very flexible since many different types of storage
14 device can be attached.
15
16config SPL_USB_HOST
17 bool "Support USB host drivers"
18 depends on SPL
19 help
20 For detailed help see USB_HOST Kconfig symbol. This option enables
21 the drivers in drivers/usb/host as part of an SPL build.
Masahiro Yamada59cfdc02016-08-01 00:16:34 +0900[diff] [blame]22
Masahiro Yamada1b0a06b2014-11-07 18:48:31 +0900[diff] [blame]23config USB_XHCI_HCD
24 bool "xHCI HCD (USB 3.0) support"
Tom Rini5b9e6162021-07-09 10:11:56 -0400[diff] [blame]25 depends on DM && OF_CONTROL
Masahiro Yamada59cfdc02016-08-01 00:16:34 +0900[diff] [blame]26 select USB_HOST
Masahiro Yamada1b0a06b2014-11-07 18:48:31 +0900[diff] [blame]27 ---help---
28 The eXtensible Host Controller Interface (xHCI) is standard for USB 3.0
29 "SuperSpeed" host controller hardware.
30
Masahiro Yamada1b0a06b2014-11-07 18:48:31 +0900[diff] [blame]31if USB_XHCI_HCD
32
Masahiro Yamadad3b72ca2016-06-04 07:35:04 +0900[diff] [blame]33config USB_XHCI_DWC3
34 bool "DesignWare USB3 DRD Core Support"
35 help
36 Say Y or if your system has a Dual Role SuperSpeed
37 USB controller based on the DesignWare USB3 IP Core.
38
Neil Armstrong069421e2018-04-11 17:08:00 +0200[diff] [blame]39config USB_XHCI_DWC3_OF_SIMPLE
40 bool "DesignWare USB3 DRD Generic OF Simple Glue Layer"
Jean-Jacques Hiblot74d9a9d2018-04-12 10:41:10 +0200[diff] [blame]41 depends on DM_USB
Jean-Jacques Hiblot6c705f42018-04-12 10:41:11 +0200[diff] [blame]42 default y if DRA7XX
Neil Armstrong069421e2018-04-11 17:08:00 +0200[diff] [blame]43 help
44 Support USB2/3 functionality in simple SoC integrations with
45 USB controller based on the DesignWare USB3 IP Core.
46
Tom Rini6d772e52022-06-10 23:03:00 -0400[diff] [blame]47config USB_XHCI_EXYNOS
48 bool "Support for Samsung Exynos5 family on-chip xHCI USB controller"
49 depends on ARCH_EXYNOS5
50 default y
51 help
52 Enables support for he on-chip xHCI controller on Samsung Exynos5
53 SoCs.
54
developer507fc9b2020-05-02 11:35:18 +0200[diff] [blame]55config USB_XHCI_MTK
56 bool "Support for MediaTek on-chip xHCI USB controller"
developer4adcdca2022-05-20 11:22:56 +0800[diff] [blame]57 depends on ARCH_MEDIATEK || SOC_MT7621
developer507fc9b2020-05-02 11:35:18 +0200[diff] [blame]58 help
59 Enables support for the on-chip xHCI controller on MediaTek SoCs.
60
Stefan Roese07faf112016-07-14 11:39:20 +0200[diff] [blame]61config USB_XHCI_MVEBU
62 bool "MVEBU USB 3.0 support"
63 default y
64 depends on ARCH_MVEBU
Konstantin Porotchkin1b5ed4d2017-02-12 11:10:30 +0200[diff] [blame]65 select DM_REGULATOR
Stefan Roese07faf112016-07-14 11:39:20 +0200[diff] [blame]66 help
67 Choose this option to add support for USB 3.0 driver on mvebu
68 SoCs, which includes Armada8K, Armada3700 and other Armada
69 family SoCs.
70
Patrick Rudolpha3782b12024-10-23 15:19:59 +0200[diff] [blame^]71config USB_XHCI_GENERIC
72 bool "Generic SoC USB 3.0 support"
73 depends on OF_CONTROL
74 default n
75 help
76 Choose this option to add support for USB 3.0 driver for SoCs
77 that do not need platform specific code, like on emulated targets.
78
Stefan Roesedf33b572020-08-24 13:04:38 +0200[diff] [blame]79config USB_XHCI_OCTEON
80 bool "Support for Marvell Octeon family on-chip xHCI USB controller"
81 depends on ARCH_OCTEON
82 default y
83 help
84 Enables support for the on-chip xHCI controller on Marvell Octeon
85 family SoCs. This is a driver for the dwc3 to provide the glue logic
86 to configure the controller.
87
Tom Riniebc1c842021-09-12 20:32:22 -0400[diff] [blame]88config USB_XHCI_OMAP
89 bool "Support for TI OMAP family xHCI USB controller"
90 depends on ARCH_OMAP2PLUS
91 help
92 Enables support for the on-chip xHCI controller found on some TI SoC
93 families. Note that some families have multiple contollers while
94 others only have something such as DesignWare-based controllers.
95 Consult the SoC documentation to determine if this option applies
96 to your hardware.
97
Bin Mengd34d6fc2017-07-19 21:50:08 +0800[diff] [blame]98config USB_XHCI_PCI
99 bool "Support for PCI-based xHCI USB controller"
Heinrich Schuchardt9c83bad2023-11-20 15:56:36 +0100[diff] [blame]100 depends on DM_USB && PCI
Bin Mengd34d6fc2017-07-19 21:50:08 +0800[diff] [blame]101 default y if X86
102 help
103 Enables support for the PCI-based xHCI controller.
104
Marek Vasut24257272017-10-15 15:01:29 +0200[diff] [blame]105config USB_XHCI_RCAR
106 bool "Renesas RCar USB 3.0 support"
107 default y
Marek Vasut6468c4c2024-02-27 17:05:55 +0100[diff] [blame]108 depends on ARCH_RENESAS
Marek Vasut24257272017-10-15 15:01:29 +0200[diff] [blame]109 help
110 Choose this option to add support for USB 3.0 driver on Renesas
111 RCar Gen3 SoCs.
112
Patrice Chotardf2505b12017-09-05 11:04:24 +0200[diff] [blame]113config USB_XHCI_STI
114 bool "Support for STMicroelectronics STiH407 family on-chip xHCI USB controller"
115 depends on ARCH_STI
116 default y
117 help
118 Enables support for the on-chip xHCI controller on STMicroelectronics
119 STiH407 family SoCs. This is a driver for the dwc3 to provide the glue logic
120 to configure the controller.
121
Uri Mashiachf6ff74e2017-02-23 15:39:36 +0200[diff] [blame]122config USB_XHCI_DRA7XX_INDEX
123 int "DRA7XX xHCI USB index"
124 range 0 1
125 default 0
126 depends on DRA7XX
127 help
128 Select the DRA7XX xHCI USB index.
129 Current supported values: 0, 1.
130
Ran Wanga5a97352017-10-23 10:09:22 +0800[diff] [blame]131config USB_XHCI_FSL
132 bool "Support for NXP Layerscape on-chip xHCI USB controller"
133 default y if ARCH_LS1021A || FSL_LSCH3 || FSL_LSCH2
134 depends on !SPL_NO_USB
135 help
136 Enables support for the on-chip xHCI controller on NXP Layerscape SoCs.
Rayagonda Kokatanurf59d24e2020-04-09 09:23:15 +0530[diff] [blame]137
138config USB_XHCI_BRCM
139 bool "Broadcom USB3 Host XHCI controller"
140 depends on DM_USB
141 help
142 USB controller based on the Broadcom USB3 IP Core.
143 Supports USB2/3 functionality.
144
Masahiro Yamada78a9c792016-08-01 00:16:32 +0900[diff] [blame]145endif # USB_XHCI_HCD
Alexey Brodkin83fd3122015-12-14 17:18:50 +0300[diff] [blame]146
Tom Rini21ad2802022-06-08 08:24:26 -0400[diff] [blame]147config EHCI_DESC_BIG_ENDIAN
148 bool
149
150config EHCI_MMIO_BIG_ENDIAN
151 bool
152
Masahiro Yamada1b0a06b2014-11-07 18:48:31 +0900[diff] [blame]153config USB_EHCI_HCD
154 bool "EHCI HCD (USB 2.0) support"
Tom Rini7716cd62017-05-12 22:33:28 -0400[diff] [blame]155 default y if ARCH_MX5 || ARCH_MX6
Tom Rini5b9e6162021-07-09 10:11:56 -0400[diff] [blame]156 depends on DM && OF_CONTROL
Masahiro Yamada59cfdc02016-08-01 00:16:34 +0900[diff] [blame]157 select USB_HOST
Tom Rini21ad2802022-06-08 08:24:26 -0400[diff] [blame]158 select EHCI_DESC_BIG_ENDIAN if SYS_BIG_ENDIAN
159 select EHCI_MMIO_BIG_ENDIAN if SYS_BIG_ENDIAN
Masahiro Yamada1b0a06b2014-11-07 18:48:31 +0900[diff] [blame]160 ---help---
161 The Enhanced Host Controller Interface (EHCI) is standard for USB 2.0
162 "high speed" (480 Mbit/sec, 60 Mbyte/sec) host controller hardware.
163 If your USB host controller supports USB 2.0, you will likely want to
164 configure this Host Controller Driver.
165
166 EHCI controllers are packaged with "companion" host controllers (OHCI
167 or UHCI) to handle USB 1.1 devices connected to root hub ports. Ports
168 will connect to EHCI if the device is high speed, otherwise they
169 connect to a companion controller. If you configure EHCI, you should
170 probably configure the OHCI (for NEC and some other vendors) USB Host
171 Controller Driver or UHCI (for Via motherboards) Host Controller
172 Driver too.
173
174 You may want to read <file:Documentation/usb/ehci.txt>.
175
Masahiro Yamada1b0a06b2014-11-07 18:48:31 +0900[diff] [blame]176if USB_EHCI_HCD
177
Marek Behúne1489262021-10-09 15:27:35 +0200[diff] [blame]178config USB_EHCI_IS_TDI
179 bool
180
Wenyou Yang11e26652016-08-05 08:57:35 +0800[diff] [blame]181config USB_EHCI_ATMEL
182 bool "Support for Atmel on-chip EHCI USB controller"
183 depends on ARCH_AT91
184 default y
185 ---help---
186 Enables support for the on-chip EHCI controller on Atmel chips.
187
Tom Rini6d772e52022-06-10 23:03:00 -0400[diff] [blame]188config USB_EHCI_EXYNOS
189 bool "Support for Samsung Exynos EHCI USB controller"
190 depends on ARCH_EXYNOS
191 default y
192 ---help---
193 Enables support for the on-chip EHCI controller on Samsung Exynos
194 SoCs.
195
Stefan Roese03901022015-09-01 11:39:44 +0200[diff] [blame]196config USB_EHCI_MARVELL
Tom Rini496a4172017-05-12 22:33:29 -0400[diff] [blame]197 bool "Support for Marvell on-chip EHCI USB controller"
Trevor Woernerbb7ab072020-05-06 08:02:40 -0400[diff] [blame]198 depends on ARCH_MVEBU || ARCH_KIRKWOOD || ARCH_ORION5X
Stefan Roese03901022015-09-01 11:39:44 +0200[diff] [blame]199 default y
Marek Behúne1489262021-10-09 15:27:35 +0200[diff] [blame]200 select USB_EHCI_IS_TDI if !ARM64
Chris Packham927671e2022-11-05 17:23:57 +1300[diff] [blame]201 select USB_EHCI_IS_TDI if ALLEYCAT_5
Stefan Roese03901022015-09-01 11:39:44 +0200[diff] [blame]202 ---help---
203 Enables support for the on-chip EHCI controller on MVEBU SoCs.
204
Lukasz Majewski6fccaf22019-04-04 12:26:55 +0200[diff] [blame]205config USB_EHCI_MX5
206 bool "Support for i.MX5 on-chip EHCI USB controller"
207 depends on ARCH_MX5
Lukasz Majewski6fccaf22019-04-04 12:26:55 +0200[diff] [blame]208 help
209 Enables support for the on-chip EHCI controller on i.MX5 SoCs.
210
Nikita Kiryanov99241032015-07-23 17:19:35 +0300[diff] [blame]211config USB_EHCI_MX6
Ye Li9da57ea2019-10-24 10:29:32 -0300[diff] [blame]212 bool "Support for i.MX6/i.MX7ULP on-chip EHCI USB controller"
Giulio Benetti13ded2c2021-05-20 16:10:15 +0200[diff] [blame]213 depends on ARCH_MX6 || ARCH_MX7ULP || ARCH_IMXRT
Tom Rini21ad2802022-06-08 08:24:26 -0400[diff] [blame]214 select EHCI_HCD_INIT_AFTER_RESET
Nikita Kiryanov99241032015-07-23 17:19:35 +0300[diff] [blame]215 default y
216 ---help---
217 Enables support for the on-chip EHCI controller on i.MX6 SoCs.
218
Stefan Agner100fe072016-07-13 00:25:36 -0700[diff] [blame]219config USB_EHCI_MX7
220 bool "Support for i.MX7 on-chip EHCI USB controller"
Mathieu Othacehe887eef82024-02-19 18:05:31 +0100[diff] [blame]221 depends on ARCH_MX7 || IMX8M || IMX93
Tom Rini21ad2802022-06-08 08:24:26 -0400[diff] [blame]222 select EHCI_HCD_INIT_AFTER_RESET if ARCH_MX7
Mathieu Othacehe887eef82024-02-19 18:05:31 +0100[diff] [blame]223 select PHY if IMX8M || IMX93
224 select NOP_PHY if IMX8M || IMX93
Stefan Agner100fe072016-07-13 00:25:36 -0700[diff] [blame]225 default y
226 ---help---
227 Enables support for the on-chip EHCI controller on i.MX7 SoCs.
228
Marek Behún53d53512021-10-09 15:27:33 +0200[diff] [blame]229config USB_EHCI_MXS
Lukasz Majewski7a4aba62021-12-22 10:55:06 +0100[diff] [blame]230 bool "Support for i.MX23/i.MX28 EHCI USB controller"
231 depends on ARCH_MX23 || ARCH_MX28
Marek Behún53d53512021-10-09 15:27:33 +0200[diff] [blame]232 default y
Marek Behúne1489262021-10-09 15:27:35 +0200[diff] [blame]233 select USB_EHCI_IS_TDI
Marek Behún53d53512021-10-09 15:27:33 +0200[diff] [blame]234 help
Lukasz Majewski7a4aba62021-12-22 10:55:06 +0100[diff] [blame]235 Enables support for the on-chip EHCI controller on i.MX23 and
236 i.MX28 SoCs.
Marek Behún53d53512021-10-09 15:27:33 +0200[diff] [blame]237
Jim Liu1fd3b3d2022-06-21 17:09:02 +0800[diff] [blame]238config USB_EHCI_NPCM
239 bool "Support for Nuvoton NPCM on-chip EHCI USB controller"
240 depends on ARCH_NPCM
Jim Liu1fd3b3d2022-06-21 17:09:02 +0800[diff] [blame]241 ---help---
242 Enables support for the on-chip EHCI controller on
243 Nuvoton NPCM chips.
244
Tom Rini639a8402017-05-12 22:33:30 -0400[diff] [blame]245config USB_EHCI_OMAP
246 bool "Support for OMAP3+ on-chip EHCI USB controller"
247 depends on ARCH_OMAP2PLUS
Adam Fordcb9a3562022-02-19 17:08:44 -0600[diff] [blame]248 select PHY
249 imply NOP_PHY
Tom Rini639a8402017-05-12 22:33:30 -0400[diff] [blame]250 default y
251 ---help---
252 Enables support for the on-chip EHCI controller on OMAP3 and later
253 SoCs.
254
Marcel Ziswiler31f44952019-03-25 17:24:54 +0100[diff] [blame]255config USB_EHCI_VF
256 bool "Support for Vybrid on-chip EHCI USB controller"
257 depends on ARCH_VF610
258 default y
259 help
260 Enables support for the on-chip EHCI controller on Vybrid SoCs.
261
Ye Li9da57ea2019-10-24 10:29:32 -0300[diff] [blame]262if USB_EHCI_MX6 || USB_EHCI_MX7
Stefan Agner8652ce92016-07-13 00:25:38 -0700[diff] [blame]263
264config MXC_USB_OTG_HACTIVE
265 bool "USB Power pin high active"
266 ---help---
267 Set the USB Power pin polarity to be high active (PWR_POL)
268
269endif
270
Mateusz Kulikowskidc381172016-03-31 23:12:26 +0200[diff] [blame]271config USB_EHCI_MSM
272 bool "Support for Qualcomm on-chip EHCI USB controller"
273 depends on DM_USB
274 select USB_ULPI_VIEWPORT
Ramon Fried7e365962018-09-21 13:35:50 +0300[diff] [blame]275 select MSM8916_USB_PHY
Mateusz Kulikowskidc381172016-03-31 23:12:26 +0200[diff] [blame]276 ---help---
277 Enables support for the on-chip EHCI controller on Qualcomm
278 Snapdragon SoCs.
Mateusz Kulikowskidc381172016-03-31 23:12:26 +0200[diff] [blame]279
Bin Mengec4b5732017-08-09 00:21:54 -0700[diff] [blame]280config USB_EHCI_PCI
281 bool "Support for PCI-based EHCI USB controller"
282 default y if X86
283 help
284 Enables support for the PCI-based EHCI controller.
285
Peter Robinson43ecef42019-02-20 12:17:27 +0000[diff] [blame]286config USB_EHCI_TEGRA
287 bool "Support for NVIDIA Tegra on-chip EHCI USB controller"
Trevor Woerner513f6402020-05-06 08:02:41 -0400[diff] [blame]288 depends on ARCH_TEGRA
Marek Behúne1489262021-10-09 15:27:35 +0200[diff] [blame]289 select USB_EHCI_IS_TDI
Peter Robinson43ecef42019-02-20 12:17:27 +0000[diff] [blame]290 ---help---
291 Enable support for Tegra on-chip EHCI USB controller
292
Siva Durga Prasad Paladugu42fcc182016-07-22 14:51:51 +0530[diff] [blame]293config USB_EHCI_ZYNQ
294 bool "Support for Xilinx Zynq on-chip EHCI USB controller"
Michal Simek3239d712020-08-24 14:41:51 +0200[diff] [blame]295 default y if ARCH_ZYNQ
Marek Behúne1489262021-10-09 15:27:35 +0200[diff] [blame]296 select USB_EHCI_IS_TDI
Siva Durga Prasad Paladugu42fcc182016-07-22 14:51:51 +0530[diff] [blame]297 ---help---
298 Enable support for Zynq on-chip EHCI USB controller
299
Alexey Brodkina6aff432015-12-02 12:32:02 +0300[diff] [blame]300config USB_EHCI_GENERIC
301 bool "Support for generic EHCI USB controller"
Alexey Brodkina6aff432015-12-02 12:32:02 +0300[diff] [blame]302 depends on DM_USB
Jagan Teki1ba41e12018-12-22 18:18:10 +0530[diff] [blame]303 default ARCH_SUNXI
Alexey Brodkina6aff432015-12-02 12:32:02 +0300[diff] [blame]304 ---help---
305 Enables support for generic EHCI controller.
306
Tom Rini30fd3d92022-06-08 08:24:27 -0400[diff] [blame]307config EHCI_HCD_INIT_AFTER_RESET
308 bool
309
Ran Wang9798b662017-12-20 10:34:20 +0800[diff] [blame]310config USB_EHCI_FSL
311 bool "Support for FSL on-chip EHCI USB controller"
Tom Rini30fd3d92022-06-08 08:24:27 -0400[diff] [blame]312 select EHCI_HCD_INIT_AFTER_RESET
Tom Rini8d7aa572022-07-31 21:08:29 -0400[diff] [blame]313 select SYS_FSL_USB_INTERNAL_UTMI_PHY if MPC85xx && \
314 !(ARCH_B4860 || ARCH_B4420 || ARCH_P4080 || ARCH_P1020 || ARCH_P2020)
Ran Wang9798b662017-12-20 10:34:20 +0800[diff] [blame]315 ---help---
316 Enables support for the on-chip EHCI controller on FSL chips.
Tom Rinic85a7922022-06-08 08:24:31 -0400[diff] [blame]317
Tom Rini8d7aa572022-07-31 21:08:29 -0400[diff] [blame]318config SYS_FSL_USB_INTERNAL_UTMI_PHY
319 bool
320 depends on USB_EHCI_FSL
321
Tom Rinic85a7922022-06-08 08:24:31 -0400[diff] [blame]322config USB_EHCI_TXFIFO_THRESH
323 hex
324 depends on USB_EHCI_TEGRA
325 default 0x10
326 help
327 This parameter affects a TXFILLTUNING field that controls how much
328 data is sent to the latency fifo before it is sent to the wire.
329 Without this parameter, the default (2) causes occasional Data Buffer
330 Errors in OUT packets depending on the buffer address and size.
331
Masahiro Yamada78a9c792016-08-01 00:16:32 +0900[diff] [blame]332endif # USB_EHCI_HCD
333
Tom Rini112d2e02022-06-25 11:02:31 -0400[diff] [blame]334config USB_OHCI_NEW
335 bool
336
337config SYS_USB_OHCI_CPU_INIT
338 bool
339
Masahiro Yamada78a9c792016-08-01 00:16:32 +0900[diff] [blame]340config USB_OHCI_HCD
341 bool "OHCI HCD (USB 1.1) support"
Tom Rini5b9e6162021-07-09 10:11:56 -0400[diff] [blame]342 depends on DM && OF_CONTROL
343 select USB_HOST
Tom Rini112d2e02022-06-25 11:02:31 -0400[diff] [blame]344 select USB_OHCI_NEW
Masahiro Yamada78a9c792016-08-01 00:16:32 +0900[diff] [blame]345 ---help---
346 The Open Host Controller Interface (OHCI) is a standard for accessing
347 USB 1.1 host controller hardware. It does more in hardware than Intel's
348 UHCI specification. If your USB host controller follows the OHCI spec,
349 say Y. On most non-x86 systems, and on x86 hardware that's not using a
350 USB controller from Intel or VIA, this is appropriate. If your host
351 controller doesn't use PCI, this is probably appropriate. For a PCI
352 based system where you're not sure, the "lspci -v" entry will list the
353 right "prog-if" for your USB controller(s): EHCI, OHCI, or UHCI.
354
Tom Rini5b9e6162021-07-09 10:11:56 -0400[diff] [blame]355if USB_OHCI_HCD
356
Heiko Schocher124f9472019-07-16 10:49:07 +0200[diff] [blame]357config USB_OHCI_PCI
358 bool "Support for PCI-based OHCI USB controller"
Tom Rini5b9e6162021-07-09 10:11:56 -0400[diff] [blame]359 depends on PCI
Heiko Schocher124f9472019-07-16 10:49:07 +0200[diff] [blame]360 help
361 Enables support for the PCI-based OHCI controller.
362
Masahiro Yamada78a9c792016-08-01 00:16:32 +0900[diff] [blame]363config USB_OHCI_GENERIC
364 bool "Support for generic OHCI USB controller"
Jagan Teki1ba41e12018-12-22 18:18:10 +0530[diff] [blame]365 default ARCH_SUNXI
Masahiro Yamada78a9c792016-08-01 00:16:32 +0900[diff] [blame]366 ---help---
367 Enables support for generic OHCI controller.
368
Adam Ford5f364f52019-04-30 05:21:41 -0500[diff] [blame]369config USB_OHCI_DA8XX
370 bool "Support for da850 OHCI USB controller"
371 help
372 Enable support for the da850 USB controller.
373
Jim Liu1fd3b3d2022-06-21 17:09:02 +0800[diff] [blame]374config USB_OHCI_NPCM
375 bool "Support for Nuvoton NPCM on-chip OHCI USB controller"
376 depends on ARCH_NPCM
Jim Liu1fd3b3d2022-06-21 17:09:02 +0800[diff] [blame]377 ---help---
378 Enables support for the on-chip OHCI controller on
379 Nuvoton NPCM chips.
380
Masahiro Yamada78a9c792016-08-01 00:16:32 +0900[diff] [blame]381endif # USB_OHCI_HCD
Masahiro Yamada718ba3c2016-08-01 00:16:33 +0900[diff] [blame]382
Tom Rini112d2e02022-06-25 11:02:31 -0400[diff] [blame]383config SYS_USB_OHCI_SLOT_NAME
384 string "Display name for the OHCI controller"
385 depends on USB_OHCI_NEW && !DM_USB
386
Tom Rini112d2e02022-06-25 11:02:31 -0400[diff] [blame]387config SYS_OHCI_SWAP_REG_ACCESS
388 bool "Perform byte swapping on OHCI controller register accesses"
389 depends on USB_OHCI_NEW
390
Masahiro Yamada718ba3c2016-08-01 00:16:33 +0900[diff] [blame]391config USB_UHCI_HCD
392 bool "UHCI HCD (most Intel and VIA) support"
Masahiro Yamada59cfdc02016-08-01 00:16:34 +0900[diff] [blame]393 select USB_HOST
Masahiro Yamada718ba3c2016-08-01 00:16:33 +0900[diff] [blame]394 ---help---
395 The Universal Host Controller Interface is a standard by Intel for
396 accessing the USB hardware in the PC (which is also called the USB
397 host controller). If your USB host controller conforms to this
398 standard, you may want to say Y, but see below. All recent boards
399 with Intel PCI chipsets (like intel 430TX, 440FX, 440LX, 440BX,
400 i810, i820) conform to this standard. Also all VIA PCI chipsets
401 (like VIA VP2, VP3, MVP3, Apollo Pro, Apollo Pro II or Apollo Pro
402 133) and LEON/GRLIB SoCs with the GRUSBHC controller.
403 If unsure, say Y.
404
405if USB_UHCI_HCD
406
407endif # USB_UHCI_HCD
Philipp Tomsich54983812017-07-03 18:30:06 +0200[diff] [blame]408
409config USB_DWC2
410 bool "DesignWare USB2 Core support"
Tom Rini5b9e6162021-07-09 10:11:56 -0400[diff] [blame]411 depends on DM && OF_CONTROL
Philipp Tomsich54983812017-07-03 18:30:06 +0200[diff] [blame]412 select USB_HOST
413 ---help---
414 The DesignWare USB 2.0 controller is compliant with the
415 USB-Implementers Forum (USB-IF) USB 2.0 specifications.
416 Hi-Speed (480 Mbps), Full-Speed (12 Mbps), and Low-Speed (1.5 Mbps)
417 operation is compliant to the controller Supplement. If you want to
418 enable this controller in host mode, say Y.
Alexey Brodkinf19414b2018-02-28 16:16:58 +0300[diff] [blame]419
420if USB_DWC2
421config USB_DWC2_BUFFER_SIZE
422 int "Data buffer size in kB"
423 default 64
424 ---help---
425 By default 64 kB buffer is used but if amount of RAM avaialble on
426 the target is not enough to accommodate allocation of buffer of
427 that size it is possible to shrink it. Smaller sizes should be fine
428 because larger transactions could be split in smaller ones.
429
430endif # USB_DWC2
Marek Vasut88016032019-08-11 13:23:43 +0200[diff] [blame]431
432config USB_R8A66597_HCD
433 bool "Renesas R8A66597 USB Core support"
Tom Rini5b9e6162021-07-09 10:11:56 -0400[diff] [blame]434 depends on DM && OF_CONTROL
Marek Vasut88016032019-08-11 13:23:43 +0200[diff] [blame]435 select USB_HOST
436 ---help---
437 This enables support for the on-chip Renesas R8A66597 USB 2.0
438 controller, present in various RZ and SH SoCs.
Tom Rinibde21702022-06-12 20:02:04 -0400[diff] [blame]439
Tom Rini112d2e02022-06-25 11:02:31 -0400[diff] [blame]440config USB_ATMEL
441 bool "AT91 OHCI USB support"
442 depends on ARCH_AT91
443 select SYS_USB_OHCI_CPU_INIT
444 select USB_OHCI_NEW
445
446choice
447 prompt "Clock for OHCI"
448 depends on USB_ATMEL
449
450config USB_ATMEL_CLK_SEL_PLLB
451 bool "PLLB"
452
453config USB_ATMEL_CLK_SEL_UPLL
454 bool "UPLL"
455
456endchoice
457
458config USB_OHCI_LPC32XX
459 bool "LPC32xx USB OHCI support"
460 depends on ARCH_LPC32XX
461 select SYS_USB_OHCI_CPU_INIT
462 select USB_OHCI_NEW
463
Tom Rinibde21702022-06-12 20:02:04 -0400[diff] [blame]464config USB_MAX_CONTROLLER_COUNT
465 int "Maximum number of USB host controllers"
466 depends on USB_EHCI_FSL || USB_XHCI_FSL || \
467 (SPL_USB_HOST && !DM_SPL_USB) || (USB_HOST && !DM_USB)
468 default 1