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Masahiro Yamada1b0a06b2014-11-07 18:48:31 +09001#
2# USB Host Controller Drivers
3#
4comment "USB Host Controller Drivers"
5
Masahiro Yamada59cfdc02016-08-01 00:16:34 +09006config USB_HOST
7 bool
8
Masahiro Yamada1b0a06b2014-11-07 18:48:31 +09009config USB_XHCI_HCD
10 bool "xHCI HCD (USB 3.0) support"
Masahiro Yamada59cfdc02016-08-01 00:16:34 +090011 select USB_HOST
Masahiro Yamada1b0a06b2014-11-07 18:48:31 +090012 ---help---
13 The eXtensible Host Controller Interface (xHCI) is standard for USB 3.0
14 "SuperSpeed" host controller hardware.
15
Masahiro Yamada1b0a06b2014-11-07 18:48:31 +090016if USB_XHCI_HCD
17
Masahiro Yamadad3b72ca2016-06-04 07:35:04 +090018config USB_XHCI_DWC3
19 bool "DesignWare USB3 DRD Core Support"
20 help
21 Say Y or if your system has a Dual Role SuperSpeed
22 USB controller based on the DesignWare USB3 IP Core.
23
Stefan Roese07faf112016-07-14 11:39:20 +020024config USB_XHCI_MVEBU
25 bool "MVEBU USB 3.0 support"
26 default y
27 depends on ARCH_MVEBU
Konstantin Porotchkin1b5ed4d2017-02-12 11:10:30 +020028 select DM_REGULATOR
Stefan Roese07faf112016-07-14 11:39:20 +020029 help
30 Choose this option to add support for USB 3.0 driver on mvebu
31 SoCs, which includes Armada8K, Armada3700 and other Armada
32 family SoCs.
33
Bin Mengd34d6fc2017-07-19 21:50:08 +080034config USB_XHCI_PCI
35 bool "Support for PCI-based xHCI USB controller"
Bin Meng7e8644d2017-07-19 21:51:07 +080036 depends on DM_USB
Bin Mengd34d6fc2017-07-19 21:50:08 +080037 default y if X86
38 help
39 Enables support for the PCI-based xHCI controller.
40
Kever Yang84e841b2016-09-21 11:35:42 +080041config USB_XHCI_ROCKCHIP
42 bool "Support for Rockchip on-chip xHCI USB controller"
43 depends on ARCH_ROCKCHIP
Meng Dongyangc1a15502017-06-28 19:22:39 +080044 depends on DM_REGULATOR
45 depends on DM_USB
Kever Yang84e841b2016-09-21 11:35:42 +080046 default y
47 help
48 Enables support for the on-chip xHCI controller on Rockchip SoCs.
49
Marek Vasut24257272017-10-15 15:01:29 +020050config USB_XHCI_RCAR
51 bool "Renesas RCar USB 3.0 support"
52 default y
53 depends on ARCH_RMOBILE
54 help
55 Choose this option to add support for USB 3.0 driver on Renesas
56 RCar Gen3 SoCs.
57
Patrice Chotardf2505b12017-09-05 11:04:24 +020058config USB_XHCI_STI
59 bool "Support for STMicroelectronics STiH407 family on-chip xHCI USB controller"
60 depends on ARCH_STI
61 default y
62 help
63 Enables support for the on-chip xHCI controller on STMicroelectronics
64 STiH407 family SoCs. This is a driver for the dwc3 to provide the glue logic
65 to configure the controller.
66
Michal Simek4e2465d2016-12-21 14:18:31 +010067config USB_XHCI_ZYNQMP
68 bool "Support for Xilinx ZynqMP on-chip xHCI USB controller"
69 depends on ARCH_ZYNQMP
70 help
71 Enables support for the on-chip xHCI controller on Xilinx ZynqMP SoCs.
72
Uri Mashiachf6ff74e2017-02-23 15:39:36 +020073config USB_XHCI_DRA7XX_INDEX
74 int "DRA7XX xHCI USB index"
75 range 0 1
76 default 0
77 depends on DRA7XX
78 help
79 Select the DRA7XX xHCI USB index.
80 Current supported values: 0, 1.
81
Ran Wanga5a97352017-10-23 10:09:22 +080082config USB_XHCI_FSL
83 bool "Support for NXP Layerscape on-chip xHCI USB controller"
84 default y if ARCH_LS1021A || FSL_LSCH3 || FSL_LSCH2
85 depends on !SPL_NO_USB
86 help
87 Enables support for the on-chip xHCI controller on NXP Layerscape SoCs.
Masahiro Yamada78a9c792016-08-01 00:16:32 +090088endif # USB_XHCI_HCD
Alexey Brodkin83fd3122015-12-14 17:18:50 +030089
Masahiro Yamada1b0a06b2014-11-07 18:48:31 +090090config USB_EHCI_HCD
91 bool "EHCI HCD (USB 2.0) support"
Tom Rini7716cd62017-05-12 22:33:28 -040092 default y if ARCH_MX5 || ARCH_MX6
Masahiro Yamada59cfdc02016-08-01 00:16:34 +090093 select USB_HOST
Masahiro Yamada1b0a06b2014-11-07 18:48:31 +090094 ---help---
95 The Enhanced Host Controller Interface (EHCI) is standard for USB 2.0
96 "high speed" (480 Mbit/sec, 60 Mbyte/sec) host controller hardware.
97 If your USB host controller supports USB 2.0, you will likely want to
98 configure this Host Controller Driver.
99
100 EHCI controllers are packaged with "companion" host controllers (OHCI
101 or UHCI) to handle USB 1.1 devices connected to root hub ports. Ports
102 will connect to EHCI if the device is high speed, otherwise they
103 connect to a companion controller. If you configure EHCI, you should
104 probably configure the OHCI (for NEC and some other vendors) USB Host
105 Controller Driver or UHCI (for Via motherboards) Host Controller
106 Driver too.
107
108 You may want to read <file:Documentation/usb/ehci.txt>.
109
Masahiro Yamada1b0a06b2014-11-07 18:48:31 +0900110if USB_EHCI_HCD
111
Wenyou Yang11e26652016-08-05 08:57:35 +0800112config USB_EHCI_ATMEL
113 bool "Support for Atmel on-chip EHCI USB controller"
114 depends on ARCH_AT91
115 default y
116 ---help---
117 Enables support for the on-chip EHCI controller on Atmel chips.
118
Stefan Roese03901022015-09-01 11:39:44 +0200119config USB_EHCI_MARVELL
Tom Rini496a4172017-05-12 22:33:29 -0400120 bool "Support for Marvell on-chip EHCI USB controller"
121 depends on ARCH_MVEBU || KIRKWOOD || ORION5X
Stefan Roese03901022015-09-01 11:39:44 +0200122 default y
123 ---help---
124 Enables support for the on-chip EHCI controller on MVEBU SoCs.
125
Nikita Kiryanov99241032015-07-23 17:19:35 +0300126config USB_EHCI_MX6
127 bool "Support for i.MX6 on-chip EHCI USB controller"
128 depends on ARCH_MX6
129 default y
130 ---help---
131 Enables support for the on-chip EHCI controller on i.MX6 SoCs.
132
Stefan Agner100fe072016-07-13 00:25:36 -0700133config USB_EHCI_MX7
134 bool "Support for i.MX7 on-chip EHCI USB controller"
135 depends on ARCH_MX7
136 default y
137 ---help---
138 Enables support for the on-chip EHCI controller on i.MX7 SoCs.
139
Tom Rini639a8402017-05-12 22:33:30 -0400140config USB_EHCI_OMAP
141 bool "Support for OMAP3+ on-chip EHCI USB controller"
142 depends on ARCH_OMAP2PLUS
143 default y
144 ---help---
145 Enables support for the on-chip EHCI controller on OMAP3 and later
146 SoCs.
147
Stefan Agner8652ce92016-07-13 00:25:38 -0700148if USB_EHCI_MX7
149
150config MXC_USB_OTG_HACTIVE
151 bool "USB Power pin high active"
152 ---help---
153 Set the USB Power pin polarity to be high active (PWR_POL)
154
155endif
156
Mateusz Kulikowskidc381172016-03-31 23:12:26 +0200157config USB_EHCI_MSM
158 bool "Support for Qualcomm on-chip EHCI USB controller"
159 depends on DM_USB
160 select USB_ULPI_VIEWPORT
161 default n
162 ---help---
163 Enables support for the on-chip EHCI controller on Qualcomm
164 Snapdragon SoCs.
165 This driver supports combination of Chipidea USB controller
166 and Synapsys USB PHY in host mode only.
167
Bin Mengec4b5732017-08-09 00:21:54 -0700168config USB_EHCI_PCI
169 bool "Support for PCI-based EHCI USB controller"
170 default y if X86
171 help
172 Enables support for the PCI-based EHCI controller.
173
Siva Durga Prasad Paladugu42fcc182016-07-22 14:51:51 +0530174config USB_EHCI_ZYNQ
175 bool "Support for Xilinx Zynq on-chip EHCI USB controller"
176 depends on ARCH_ZYNQ
177 default y
178 ---help---
179 Enable support for Zynq on-chip EHCI USB controller
180
Alexey Brodkina6aff432015-12-02 12:32:02 +0300181config USB_EHCI_GENERIC
182 bool "Support for generic EHCI USB controller"
183 depends on OF_CONTROL
184 depends on DM_USB
185 default n
186 ---help---
187 Enables support for generic EHCI controller.
188
Ran Wang9798b662017-12-20 10:34:20 +0800189config USB_EHCI_FSL
190 bool "Support for FSL on-chip EHCI USB controller"
191 default n
192 select CONFIG_EHCI_HCD_INIT_AFTER_RESET
193 ---help---
194 Enables support for the on-chip EHCI controller on FSL chips.
Masahiro Yamada78a9c792016-08-01 00:16:32 +0900195endif # USB_EHCI_HCD
196
197config USB_OHCI_HCD
198 bool "OHCI HCD (USB 1.1) support"
199 ---help---
200 The Open Host Controller Interface (OHCI) is a standard for accessing
201 USB 1.1 host controller hardware. It does more in hardware than Intel's
202 UHCI specification. If your USB host controller follows the OHCI spec,
203 say Y. On most non-x86 systems, and on x86 hardware that's not using a
204 USB controller from Intel or VIA, this is appropriate. If your host
205 controller doesn't use PCI, this is probably appropriate. For a PCI
206 based system where you're not sure, the "lspci -v" entry will list the
207 right "prog-if" for your USB controller(s): EHCI, OHCI, or UHCI.
208
209if USB_OHCI_HCD
210
211config USB_OHCI_GENERIC
212 bool "Support for generic OHCI USB controller"
213 depends on OF_CONTROL
214 depends on DM_USB
Masahiro Yamada59cfdc02016-08-01 00:16:34 +0900215 select USB_HOST
Masahiro Yamada78a9c792016-08-01 00:16:32 +0900216 ---help---
217 Enables support for generic OHCI controller.
218
219endif # USB_OHCI_HCD
Masahiro Yamada718ba3c2016-08-01 00:16:33 +0900220
221config USB_UHCI_HCD
222 bool "UHCI HCD (most Intel and VIA) support"
Masahiro Yamada59cfdc02016-08-01 00:16:34 +0900223 select USB_HOST
Masahiro Yamada718ba3c2016-08-01 00:16:33 +0900224 ---help---
225 The Universal Host Controller Interface is a standard by Intel for
226 accessing the USB hardware in the PC (which is also called the USB
227 host controller). If your USB host controller conforms to this
228 standard, you may want to say Y, but see below. All recent boards
229 with Intel PCI chipsets (like intel 430TX, 440FX, 440LX, 440BX,
230 i810, i820) conform to this standard. Also all VIA PCI chipsets
231 (like VIA VP2, VP3, MVP3, Apollo Pro, Apollo Pro II or Apollo Pro
232 133) and LEON/GRLIB SoCs with the GRUSBHC controller.
233 If unsure, say Y.
234
235if USB_UHCI_HCD
236
237endif # USB_UHCI_HCD
Philipp Tomsich54983812017-07-03 18:30:06 +0200238
239config USB_DWC2
240 bool "DesignWare USB2 Core support"
241 select USB_HOST
242 ---help---
243 The DesignWare USB 2.0 controller is compliant with the
244 USB-Implementers Forum (USB-IF) USB 2.0 specifications.
245 Hi-Speed (480 Mbps), Full-Speed (12 Mbps), and Low-Speed (1.5 Mbps)
246 operation is compliant to the controller Supplement. If you want to
247 enable this controller in host mode, say Y.
Alexey Brodkinf19414b2018-02-28 16:16:58 +0300248
249if USB_DWC2
250config USB_DWC2_BUFFER_SIZE
251 int "Data buffer size in kB"
252 default 64
253 ---help---
254 By default 64 kB buffer is used but if amount of RAM avaialble on
255 the target is not enough to accommodate allocation of buffer of
256 that size it is possible to shrink it. Smaller sizes should be fine
257 because larger transactions could be split in smaller ones.
258
259endif # USB_DWC2