blob: ff28236a21d68b8db1624f9c6caed7da29d33306 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Andy Yan2d982da2017-06-01 18:00:55 +08002/*
3 * (C) Copyright 2016 Rockchip Electronics Co., Ltd
Andy Yan2d982da2017-06-01 18:00:55 +08004 */
5#ifndef __CONFIG_RV1108_COMMON_H
6#define __CONFIG_RV1108_COMMON_H
7
Andy Yan2d982da2017-06-01 18:00:55 +08008#include "rockchip-common.h"
9
Tom Rini3088b312022-12-04 10:04:13 -050010#define CFG_IRAM_BASE 0x10080000
Kever Yangaf376322019-07-22 19:59:09 +080011
Tom Rini6a5dccc2022-11-16 13:10:41 -050012#define CFG_SYS_TIMER_RATE (24 * 1000 * 1000)
Andy Yan2d982da2017-06-01 18:00:55 +080013/* TIMER1,initialized by ddr initialize code */
Tom Rini6a5dccc2022-11-16 13:10:41 -050014#define CFG_SYS_TIMER_BASE 0x10350020
15#define CFG_SYS_TIMER_COUNTER (CFG_SYS_TIMER_BASE + 8)
Andy Yan2d982da2017-06-01 18:00:55 +080016
Tom Rinibb4dd962022-11-16 13:10:37 -050017#define CFG_SYS_SDRAM_BASE 0x60000000
Andy Yan2d982da2017-06-01 18:00:55 +080018
Otavio Salvadord49cf012018-11-30 11:34:17 -020019#define ENV_MEM_LAYOUT_SETTINGS \
20 "scriptaddr=0x60000000\0" \
21 "fdt_addr_r=0x61f00000\0" \
22 "kernel_addr_r=0x62000000\0" \
23 "ramdisk_addr_r=0x64000000\0"
24
25#include <config_distro_bootcmd.h>
Tom Rinic9edebe2022-12-04 10:03:50 -050026#define CFG_EXTRA_ENV_SETTINGS \
Otavio Salvadord49cf012018-11-30 11:34:17 -020027 ENV_MEM_LAYOUT_SETTINGS \
28 "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
29 "partitions=" PARTS_DEFAULT \
Simon Glassf27e9d52023-04-24 13:49:51 +120030 "boot_targets=" BOOT_TARGETS "\0"
Tom Rini1e57cbb2022-06-10 22:59:38 -040031
Otavio Salvadord49cf012018-11-30 11:34:17 -020032#endif