blob: 26dace10859babff8d874abb61ae5226674bbed8 [file] [log] [blame]
Patrick Delaunay85b53972018-03-12 10:46:10 +01001if ARCH_STM32MP
2
3config SPL
4 select SPL_BOARD_INIT
5 select SPL_CLK
6 select SPL_DM
7 select SPL_DM_SEQ_ALIAS
Patrick Delaunay636279a2018-07-09 15:17:21 +02008 select SPL_DRIVERS_MISC_SUPPORT
Patrick Delaunay85b53972018-03-12 10:46:10 +01009 select SPL_FRAMEWORK
10 select SPL_GPIO_SUPPORT
11 select SPL_LIBCOMMON_SUPPORT
12 select SPL_LIBGENERIC_SUPPORT
13 select SPL_OF_CONTROL
14 select SPL_OF_TRANSLATE
15 select SPL_PINCTRL
16 select SPL_REGMAP
Ley Foon Tan9caf7122018-06-14 18:45:19 +080017 select SPL_DM_RESET
Patrick Delaunay85b53972018-03-12 10:46:10 +010018 select SPL_SERIAL_SUPPORT
19 select SPL_SYSCON
Patrick Delaunayaa4e6852019-02-27 17:01:14 +010020 imply SPL_DISPLAY_PRINT
Patrick Delaunay85b53972018-03-12 10:46:10 +010021 imply SPL_LIBDISK_SUPPORT
22
23config SYS_SOC
24 default "stm32mp"
25
Patrick Delaunay7e517c62019-04-18 17:32:36 +020026config SYS_MALLOC_LEN
27 default 0x2000000
28
Patrick Delaunay088b6762019-04-18 17:32:37 +020029config ENV_SIZE
30 default 0x1000
31
Patrick Delaunay85b53972018-03-12 10:46:10 +010032config TARGET_STM32MP1
33 bool "Support stm32mp1xx"
Patrick Delaunay5d061412019-02-12 11:44:39 +010034 select ARCH_SUPPORT_PSCI if !STM32MP1_TRUSTED
Lokesh Vutla81b1a672018-04-26 18:21:26 +053035 select CPU_V7A
Patrick Delaunay5d061412019-02-12 11:44:39 +010036 select CPU_V7_HAS_NONSEC if !STM32MP1_TRUSTED
Patrick Delaunaye0207372018-04-16 10:13:24 +020037 select CPU_V7_HAS_VIRT
Patrick Delaunay85b53972018-03-12 10:46:10 +010038 select PINCTRL_STM32
Patrick Delaunayb139a5b2018-07-09 15:17:20 +020039 select STM32_RCC
Patrick Delaunay85b53972018-03-12 10:46:10 +010040 select STM32_RESET
Andre Przywara7b169252018-04-12 04:24:46 +030041 select SYS_ARCH_TIMER
Patrick Delaunay5d061412019-02-12 11:44:39 +010042 imply SYSRESET_PSCI if STM32MP1_TRUSTED
43 imply SYSRESET_SYSCON if !STM32MP1_TRUSTED
Patrick Delaunay85b53972018-03-12 10:46:10 +010044 help
45 target STMicroelectronics SOC STM32MP1 family
Patrick Delaunay6d3cbf32019-02-27 17:01:15 +010046 STM32MP157, STM32MP153 or STM32MP151
Patrick Delaunay85b53972018-03-12 10:46:10 +010047 STMicroelectronics MPU with core ARMv7
Patrick Delaunay6d3cbf32019-02-27 17:01:15 +010048 dual core A7 for STM32MP157/3, monocore for STM32MP151
Patrick Delaunay85b53972018-03-12 10:46:10 +010049
Patrick Delaunay5d061412019-02-12 11:44:39 +010050config STM32MP1_TRUSTED
51 bool "Support trusted boot with TF-A"
52 default y if !SPL
53 select ARM_SMCCC
54 help
55 Say Y here to enable boot with TF-A
56 Trusted boot chain is :
57 BootRom => TF-A.stm32 (clock & DDR) => U-Boot.stm32
58 TF-A monitor provides proprietary smc to manage secure devices
59
Patrick Delaunay85b53972018-03-12 10:46:10 +010060config SYS_TEXT_BASE
61 prompt "U-Boot base address"
62 default 0xC0100000
63 help
64 configure the U-Boot base address
65 when DDR driver is used:
66 DDR + 1MB (0xC0100000)
67
Patrick Delaunay6d3cbf32019-02-27 17:01:15 +010068config NR_DRAM_BANKS
69 default 1
70
Patrick Delaunayfc69c682018-03-20 10:54:54 +010071config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2
72 hex "Partition on MMC2 to use to load U-Boot from"
73 depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
74 default 1
75 help
76 Partition on the second MMC to load U-Boot from when the MMC is being
77 used in raw mode
78
Patrick Delaunay82168e82018-05-17 14:50:46 +020079if DEBUG_UART
80
81config DEBUG_UART_BOARD_INIT
82 default y
83
84# debug on UART4 by default
85config DEBUG_UART_BASE
86 default 0x40010000
87
88# clock source is HSI on reset
89config DEBUG_UART_CLOCK
90 default 64000000
91endif
92
Patrick Delaunay6d3cbf32019-02-27 17:01:15 +010093source "board/st/stm32mp1/Kconfig"
94
Patrick Delaunay85b53972018-03-12 10:46:10 +010095endif