blob: 054a75b052b16099c02a7055641e37d65d6d277d [file] [log] [blame]
Stefan Roesebf5ed2e2015-11-18 11:06:09 +01001CONFIG_ARM=y
2CONFIG_ARCH_SOCFPGA=y
Tom Rini07edfae2018-02-03 12:10:38 -05003CONFIG_SYS_TEXT_BASE=0x01000040
Masahiro Yamada75794f92016-09-19 21:40:26 +09004CONFIG_SYS_MALLOC_F_LEN=0x2000
Stefan Roesebf5ed2e2015-11-18 11:06:09 +01005CONFIG_TARGET_SOCFPGA_SR1500=y
Tom Rini9bd09622018-04-07 20:27:54 -04006CONFIG_SPL=y
Simon Glassc08ebf62016-02-22 22:55:40 -07007CONFIG_SPL_STACK_R_ADDR=0x00800000
Stefan Roesebf5ed2e2015-11-18 11:06:09 +01008CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500"
Tom Rini732aa4a2018-02-10 16:54:38 -05009CONFIG_DISTRO_DEFAULTS=y
Simon Glassffe19762016-09-12 23:18:22 -060010CONFIG_FIT=y
Tom Rini732aa4a2018-02-10 16:54:38 -050011# CONFIG_USE_BOOTCOMMAND is not set
Simon Glass9fd2a022016-10-17 20:12:37 -060012CONFIG_SYS_CONSOLE_IS_IN_ENV=y
Simon Glassac3ee422016-10-17 20:12:59 -060013CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
Simon Glass217652f2016-10-17 20:12:58 -060014CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
Simon Glassbd5618d2016-10-17 20:13:00 -060015CONFIG_SYS_CONSOLE_INFO_QUIET=y
Tom Rini79f4eea2017-05-01 11:41:11 -040016CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_sr1500.dtb"
Simon Glassffe19762016-09-12 23:18:22 -060017CONFIG_VERSION_VARIABLE=y
Lokesh Vutla94d95e42016-10-11 21:33:46 -040018# CONFIG_DISPLAY_BOARDINFO is not set
Simon Glass7a99a872017-01-23 13:31:20 -070019CONFIG_BOARD_EARLY_INIT_F=y
Tom Riniafea41d2016-09-08 16:11:59 -040020CONFIG_SPL_SYS_MALLOC_SIMPLE=y
Stefan Roesebf5ed2e2015-11-18 11:06:09 +010021CONFIG_SPL_STACK_R=y
Tom Rini1d9ac832016-04-24 17:29:26 -040022CONFIG_CMD_ASKENV=y
23CONFIG_CMD_GREPENV=y
Tom Rini0f2dcb92016-04-22 16:41:25 -040024CONFIG_CMD_MEMTEST=y
Stefan Roesebf5ed2e2015-11-18 11:06:09 +010025# CONFIG_CMD_FLASH is not set
Tom Rini78873cd2017-08-14 19:58:53 -040026CONFIG_CMD_GPIO=y
27CONFIG_CMD_I2C=y
Tom Rini1d9ac832016-04-24 17:29:26 -040028CONFIG_CMD_MMC=y
Tom Rini0f2dcb92016-04-22 16:41:25 -040029CONFIG_CMD_SF=y
30CONFIG_CMD_SPI=y
Tom Rini1d9ac832016-04-24 17:29:26 -040031CONFIG_CMD_CACHE=y
Tom Rini0f2dcb92016-04-22 16:41:25 -040032CONFIG_CMD_TIME=y
Tom Rini1d9ac832016-04-24 17:29:26 -040033CONFIG_CMD_EXT4_WRITE=y
Tom Rini5ad8e112017-10-22 17:55:07 -040034CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
35CONFIG_MTDPARTS_DEFAULT="mtdparts=ff705000.spi.0:1m(u-boot),256k(env1),256k(env2),14848k(boot),16m(rootfs),-@1536k(UBI)0"
Heiko Schocher09dbb852016-09-21 07:58:19 +020036CONFIG_CMD_UBI=y
Tom Rini5b0b0402017-08-28 07:16:32 -040037CONFIG_ENV_IS_IN_SPI_FLASH=y
Tom Riniafea41d2016-09-08 16:11:59 -040038CONFIG_SPL_DM=y
Simon Glassc08ebf62016-02-22 22:55:40 -070039CONFIG_SPL_DM_SEQ_ALIAS=y
Lukasz Majewski6dd8c902018-02-09 23:50:57 +010040CONFIG_BOOTCOUNT_LIMIT=y
Tom Rinic98ed5f2018-02-24 16:50:41 -050041CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8
Tien Fong Cheecde42192017-07-26 13:05:40 +080042CONFIG_FPGA_SOCFPGA=y
Tom Riniafea41d2016-09-08 16:11:59 -040043CONFIG_DM_GPIO=y
Stefan Roesebf5ed2e2015-11-18 11:06:09 +010044CONFIG_DWAPB_GPIO=y
Stefan Roese78077b62016-04-28 09:47:18 +020045CONFIG_SYS_I2C_DW=y
Simon Glassc08ebf62016-02-22 22:55:40 -070046CONFIG_DM_MMC=y
Masahiro Yamada7942e912017-01-10 13:32:04 +090047CONFIG_MMC_DW=y
Stefan Roesebf5ed2e2015-11-18 11:06:09 +010048CONFIG_SPI_FLASH=y
Tom Rinif852e732016-04-21 21:37:19 -040049CONFIG_SPI_FLASH_BAR=y
Stefan Roese85e84392016-03-03 16:57:39 +010050CONFIG_SPI_FLASH_STMICRO=y
Simon Glassc08ebf62016-02-22 22:55:40 -070051# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
Stefan Roesebf5ed2e2015-11-18 11:06:09 +010052CONFIG_DM_ETH=y
Tom Rinica22e962017-08-07 22:00:34 -040053CONFIG_PHY_GIGE=y
Stefan Roesebf5ed2e2015-11-18 11:06:09 +010054CONFIG_ETH_DESIGNWARE=y
55CONFIG_SYS_NS16550=y
Stefan Roese85e84392016-03-03 16:57:39 +010056CONFIG_CADENCE_QSPI=y
Heiko Schocher0b368b12016-06-07 08:31:14 +020057CONFIG_USE_TINY_PRINTF=y