| Stefan Roese | bf5ed2e | 2015-11-18 11:06:09 +0100 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_SOCFPGA=y | ||||
| Masahiro Yamada | 75794f9 | 2016-09-19 21:40:26 +0900 | [diff] [blame] | 3 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
| Stefan Roese | bf5ed2e | 2015-11-18 11:06:09 +0100 | [diff] [blame] | 4 | CONFIG_TARGET_SOCFPGA_SR1500=y |
| Simon Glass | c08ebf6 | 2016-02-22 22:55:40 -0700 | [diff] [blame] | 5 | CONFIG_SPL_STACK_R_ADDR=0x00800000 |
| Stefan Roese | bf5ed2e | 2015-11-18 11:06:09 +0100 | [diff] [blame] | 6 | CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500" |
| Simon Glass | ffe1976 | 2016-09-12 23:18:22 -0600 | [diff] [blame] | 7 | CONFIG_FIT=y |
| Simon Glass | 3b21fdd | 2017-07-23 21:19:45 -0600 | [diff] [blame] | 8 | CONFIG_ENV_IS_IN_SPI_FLASH=y |
| Simon Glass | 9fd2a02 | 2016-10-17 20:12:37 -0600 | [diff] [blame] | 9 | CONFIG_SYS_CONSOLE_IS_IN_ENV=y |
| Simon Glass | ac3ee42 | 2016-10-17 20:12:59 -0600 | [diff] [blame] | 10 | CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y |
| Simon Glass | 217652f | 2016-10-17 20:12:58 -0600 | [diff] [blame] | 11 | CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y |
| Simon Glass | bd5618d | 2016-10-17 20:13:00 -0600 | [diff] [blame] | 12 | CONFIG_SYS_CONSOLE_INFO_QUIET=y |
| Tom Rini | 79f4eea | 2017-05-01 11:41:11 -0400 | [diff] [blame] | 13 | CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_sr1500.dtb" |
| Simon Glass | ffe1976 | 2016-09-12 23:18:22 -0600 | [diff] [blame] | 14 | CONFIG_VERSION_VARIABLE=y |
| Lokesh Vutla | 94d95e4 | 2016-10-11 21:33:46 -0400 | [diff] [blame] | 15 | # CONFIG_DISPLAY_BOARDINFO is not set |
| Simon Glass | 7a99a87 | 2017-01-23 13:31:20 -0700 | [diff] [blame] | 16 | CONFIG_BOARD_EARLY_INIT_F=y |
| Stefan Roese | bf5ed2e | 2015-11-18 11:06:09 +0100 | [diff] [blame] | 17 | CONFIG_SPL=y |
| Tom Rini | afea41d | 2016-09-08 16:11:59 -0400 | [diff] [blame] | 18 | CONFIG_SPL_SYS_MALLOC_SIMPLE=y |
| Stefan Roese | bf5ed2e | 2015-11-18 11:06:09 +0100 | [diff] [blame] | 19 | CONFIG_SPL_STACK_R=y |
| Tom Rini | f852e73 | 2016-04-21 21:37:19 -0400 | [diff] [blame] | 20 | CONFIG_HUSH_PARSER=y |
| Tom Rini | 1d9ac83 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 21 | CONFIG_CMD_BOOTZ=y |
| Stefan Roese | bf5ed2e | 2015-11-18 11:06:09 +0100 | [diff] [blame] | 22 | # CONFIG_CMD_IMLS is not set |
| Tom Rini | 1d9ac83 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 23 | CONFIG_CMD_ASKENV=y |
| 24 | CONFIG_CMD_GREPENV=y | ||||
| Tom Rini | 0f2dcb9 | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 25 | CONFIG_CMD_MEMTEST=y |
| Stefan Roese | bf5ed2e | 2015-11-18 11:06:09 +0100 | [diff] [blame] | 26 | # CONFIG_CMD_FLASH is not set |
| Tom Rini | 78873cd | 2017-08-14 19:58:53 -0400 | [diff] [blame^] | 27 | CONFIG_CMD_GPIO=y |
| 28 | CONFIG_CMD_I2C=y | ||||
| Tom Rini | 1d9ac83 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 29 | CONFIG_CMD_MMC=y |
| Tom Rini | 0f2dcb9 | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 30 | CONFIG_CMD_SF=y |
| 31 | CONFIG_CMD_SPI=y | ||||
| Tom Rini | 0f2dcb9 | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 32 | CONFIG_CMD_DHCP=y |
| Tom Rini | 1d9ac83 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 33 | CONFIG_CMD_MII=y |
| Tom Rini | 0f2dcb9 | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 34 | CONFIG_CMD_PING=y |
| Tom Rini | 1d9ac83 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 35 | CONFIG_CMD_CACHE=y |
| Tom Rini | 0f2dcb9 | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 36 | CONFIG_CMD_TIME=y |
| Tom Rini | 1d9ac83 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 37 | CONFIG_CMD_EXT4=y |
| 38 | CONFIG_CMD_EXT4_WRITE=y | ||||
| 39 | CONFIG_CMD_FAT=y | ||||
| 40 | CONFIG_CMD_FS_GENERIC=y | ||||
| Heiko Schocher | 09dbb85 | 2016-09-21 07:58:19 +0200 | [diff] [blame] | 41 | CONFIG_CMD_UBI=y |
| Tom Rini | afea41d | 2016-09-08 16:11:59 -0400 | [diff] [blame] | 42 | CONFIG_SPL_DM=y |
| Simon Glass | c08ebf6 | 2016-02-22 22:55:40 -0700 | [diff] [blame] | 43 | CONFIG_SPL_DM_SEQ_ALIAS=y |
| Tien Fong Chee | cde4219 | 2017-07-26 13:05:40 +0800 | [diff] [blame] | 44 | CONFIG_FPGA_SOCFPGA=y |
| Tom Rini | afea41d | 2016-09-08 16:11:59 -0400 | [diff] [blame] | 45 | CONFIG_DM_GPIO=y |
| Stefan Roese | bf5ed2e | 2015-11-18 11:06:09 +0100 | [diff] [blame] | 46 | CONFIG_DWAPB_GPIO=y |
| Stefan Roese | 78077b6 | 2016-04-28 09:47:18 +0200 | [diff] [blame] | 47 | CONFIG_SYS_I2C_DW=y |
| Simon Glass | c08ebf6 | 2016-02-22 22:55:40 -0700 | [diff] [blame] | 48 | CONFIG_DM_MMC=y |
| Masahiro Yamada | 7942e91 | 2017-01-10 13:32:04 +0900 | [diff] [blame] | 49 | CONFIG_MMC_DW=y |
| Stefan Roese | bf5ed2e | 2015-11-18 11:06:09 +0100 | [diff] [blame] | 50 | CONFIG_SPI_FLASH=y |
| Tom Rini | f852e73 | 2016-04-21 21:37:19 -0400 | [diff] [blame] | 51 | CONFIG_SPI_FLASH_BAR=y |
| Stefan Roese | 85e8439 | 2016-03-03 16:57:39 +0100 | [diff] [blame] | 52 | CONFIG_SPI_FLASH_STMICRO=y |
| Simon Glass | c08ebf6 | 2016-02-22 22:55:40 -0700 | [diff] [blame] | 53 | # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set |
| Stefan Roese | bf5ed2e | 2015-11-18 11:06:09 +0100 | [diff] [blame] | 54 | CONFIG_DM_ETH=y |
| Tom Rini | ca22e96 | 2017-08-07 22:00:34 -0400 | [diff] [blame] | 55 | CONFIG_PHY_GIGE=y |
| Stefan Roese | bf5ed2e | 2015-11-18 11:06:09 +0100 | [diff] [blame] | 56 | CONFIG_ETH_DESIGNWARE=y |
| 57 | CONFIG_SYS_NS16550=y | ||||
| Stefan Roese | 85e8439 | 2016-03-03 16:57:39 +0100 | [diff] [blame] | 58 | CONFIG_CADENCE_QSPI=y |
| Heiko Schocher | 0b368b1 | 2016-06-07 08:31:14 +0200 | [diff] [blame] | 59 | CONFIG_USE_TINY_PRINTF=y |