Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2000, 2001 |
| 4 | * Rich Ireland, Enterasys Networks, rireland@enterasys.com. |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | /* |
| 8 | * FPGA support |
| 9 | */ |
| 10 | #include <common.h> |
| 11 | #include <command.h> |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 12 | #include <fpga.h> |
Siva Durga Prasad Paladugu | 9112b4c | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 13 | #include <fs.h> |
wdenk | 525d7b6 | 2005-01-22 18:13:04 +0000 | [diff] [blame] | 14 | #include <malloc.h> |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 15 | |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 16 | /* Local defines */ |
Michal Simek | 20d6b95 | 2017-01-06 11:20:54 +0100 | [diff] [blame] | 17 | enum { |
| 18 | FPGA_NONE = -1, |
| 19 | FPGA_INFO, |
| 20 | FPGA_LOAD, |
| 21 | FPGA_LOADB, |
| 22 | FPGA_DUMP, |
| 23 | FPGA_LOADMK, |
| 24 | FPGA_LOADP, |
| 25 | FPGA_LOADBP, |
| 26 | FPGA_LOADFS, |
Siva Durga Prasad Paladugu | cce0cb0 | 2018-05-31 15:10:22 +0530 | [diff] [blame] | 27 | FPGA_LOADS, |
Michal Simek | 20d6b95 | 2017-01-06 11:20:54 +0100 | [diff] [blame] | 28 | }; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 29 | |
Michal Simek | a255597 | 2018-05-30 10:00:40 +0200 | [diff] [blame] | 30 | /* |
| 31 | * Map op to supported operations. We don't use a table since we |
| 32 | * would just have to relocate it from flash anyway. |
| 33 | */ |
| 34 | static int fpga_get_op(char *opstr) |
| 35 | { |
| 36 | int op = FPGA_NONE; |
| 37 | |
| 38 | if (!strcmp("info", opstr)) |
| 39 | op = FPGA_INFO; |
| 40 | else if (!strcmp("loadb", opstr)) |
| 41 | op = FPGA_LOADB; |
| 42 | else if (!strcmp("load", opstr)) |
| 43 | op = FPGA_LOAD; |
| 44 | #if defined(CONFIG_CMD_FPGA_LOADP) |
| 45 | else if (!strcmp("loadp", opstr)) |
| 46 | op = FPGA_LOADP; |
| 47 | #endif |
| 48 | #if defined(CONFIG_CMD_FPGA_LOADBP) |
| 49 | else if (!strcmp("loadbp", opstr)) |
| 50 | op = FPGA_LOADBP; |
| 51 | #endif |
| 52 | #if defined(CONFIG_CMD_FPGA_LOADFS) |
| 53 | else if (!strcmp("loadfs", opstr)) |
| 54 | op = FPGA_LOADFS; |
| 55 | #endif |
| 56 | #if defined(CONFIG_CMD_FPGA_LOADMK) |
| 57 | else if (!strcmp("loadmk", opstr)) |
| 58 | op = FPGA_LOADMK; |
| 59 | #endif |
| 60 | else if (!strcmp("dump", opstr)) |
| 61 | op = FPGA_DUMP; |
| 62 | #if defined(CONFIG_CMD_FPGA_LOAD_SECURE) |
| 63 | else if (!strcmp("loads", opstr)) |
| 64 | op = FPGA_LOADS; |
| 65 | #endif |
| 66 | |
| 67 | return op; |
| 68 | } |
| 69 | |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 70 | /* ------------------------------------------------------------------------- */ |
| 71 | /* command form: |
| 72 | * fpga <op> <device number> <data addr> <datasize> |
| 73 | * where op is 'load', 'dump', or 'info' |
| 74 | * If there is no device number field, the fpga environment variable is used. |
| 75 | * If there is no data addr field, the fpgadata environment variable is used. |
| 76 | * The info command requires no data address field. |
| 77 | */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 78 | int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 79 | { |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 80 | int op, dev = FPGA_INVALID_DEVICE; |
| 81 | size_t data_size = 0; |
| 82 | void *fpga_data = NULL; |
Simon Glass | 64b723f | 2017-08-03 12:22:12 -0600 | [diff] [blame] | 83 | char *devstr = env_get("fpga"); |
| 84 | char *datastr = env_get("fpgadata"); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 85 | int rc = FPGA_FAIL; |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 86 | #if defined(CONFIG_FIT) |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 87 | const char *fit_uname = NULL; |
| 88 | ulong fit_addr; |
| 89 | #endif |
Siva Durga Prasad Paladugu | 9112b4c | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 90 | #if defined(CONFIG_CMD_FPGA_LOADFS) |
| 91 | fpga_fs_info fpga_fsinfo; |
| 92 | fpga_fsinfo.fstype = FS_TYPE_ANY; |
| 93 | #endif |
Siva Durga Prasad Paladugu | cce0cb0 | 2018-05-31 15:10:22 +0530 | [diff] [blame] | 94 | #if defined(CONFIG_CMD_FPGA_LOAD_SECURE) |
| 95 | struct fpga_secure_info fpga_sec_info; |
| 96 | |
| 97 | memset(&fpga_sec_info, 0, sizeof(fpga_sec_info)); |
| 98 | #endif |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 99 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 100 | if (devstr) |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 101 | dev = (int) simple_strtoul(devstr, NULL, 16); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 102 | if (datastr) |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 103 | fpga_data = (void *)simple_strtoul(datastr, NULL, 16); |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 104 | |
Siva Durga Prasad Paladugu | 8f039b1 | 2018-05-31 15:10:21 +0530 | [diff] [blame] | 105 | if (argc > 9 || argc < 2) { |
| 106 | debug("%s: Too many or too few args (%d)\n", __func__, argc); |
| 107 | return CMD_RET_USAGE; |
| 108 | } |
| 109 | |
Michal Simek | a255597 | 2018-05-30 10:00:40 +0200 | [diff] [blame] | 110 | op = fpga_get_op(argv[1]); |
Siva Durga Prasad Paladugu | 8f039b1 | 2018-05-31 15:10:21 +0530 | [diff] [blame] | 111 | |
| 112 | switch (op) { |
Michal Simek | 2c66019 | 2018-05-30 09:57:42 +0200 | [diff] [blame] | 113 | case FPGA_NONE: |
| 114 | printf("Unknown fpga operation \"%s\"\n", argv[1]); |
| 115 | return CMD_RET_USAGE; |
Siva Durga Prasad Paladugu | 9112b4c | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 116 | #if defined(CONFIG_CMD_FPGA_LOADFS) |
Siva Durga Prasad Paladugu | 8f039b1 | 2018-05-31 15:10:21 +0530 | [diff] [blame] | 117 | case FPGA_LOADFS: |
| 118 | if (argc < 9) |
| 119 | return CMD_RET_USAGE; |
Siva Durga Prasad Paladugu | 9112b4c | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 120 | fpga_fsinfo.blocksize = (unsigned int) |
Siva Durga Prasad Paladugu | 8f039b1 | 2018-05-31 15:10:21 +0530 | [diff] [blame] | 121 | simple_strtoul(argv[5], NULL, 16); |
Siva Durga Prasad Paladugu | 9112b4c | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 122 | fpga_fsinfo.interface = argv[6]; |
| 123 | fpga_fsinfo.dev_part = argv[7]; |
| 124 | fpga_fsinfo.filename = argv[8]; |
Michal Simek | 2af6746 | 2018-05-30 11:18:38 +0200 | [diff] [blame] | 125 | |
Siva Durga Prasad Paladugu | 8f039b1 | 2018-05-31 15:10:21 +0530 | [diff] [blame] | 126 | argc = 5; |
| 127 | break; |
Siva Durga Prasad Paladugu | 9112b4c | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 128 | #endif |
Siva Durga Prasad Paladugu | cce0cb0 | 2018-05-31 15:10:22 +0530 | [diff] [blame] | 129 | #if defined(CONFIG_CMD_FPGA_LOAD_SECURE) |
| 130 | case FPGA_LOADS: |
| 131 | if (argc < 7) |
| 132 | return CMD_RET_USAGE; |
| 133 | if (argc == 8) |
| 134 | fpga_sec_info.userkey_addr = (u8 *)(uintptr_t) |
| 135 | simple_strtoull(argv[7], |
| 136 | NULL, 16); |
| 137 | fpga_sec_info.encflag = (u8)simple_strtoul(argv[6], NULL, 16); |
| 138 | fpga_sec_info.authflag = (u8)simple_strtoul(argv[5], NULL, 16); |
Michal Simek | 2af6746 | 2018-05-30 11:18:38 +0200 | [diff] [blame] | 139 | |
| 140 | if (fpga_sec_info.authflag >= FPGA_NO_ENC_OR_NO_AUTH && |
| 141 | fpga_sec_info.encflag >= FPGA_NO_ENC_OR_NO_AUTH) { |
| 142 | puts("ERR: Use <fpga load> for NonSecure bitstream\n"); |
| 143 | return CMD_RET_USAGE; |
| 144 | } |
| 145 | |
| 146 | if (fpga_sec_info.encflag == FPGA_ENC_USR_KEY && |
| 147 | !fpga_sec_info.userkey_addr) { |
| 148 | puts("ERR: User key not provided\n"); |
| 149 | return CMD_RET_USAGE; |
| 150 | } |
| 151 | |
Siva Durga Prasad Paladugu | cce0cb0 | 2018-05-31 15:10:22 +0530 | [diff] [blame] | 152 | argc = 5; |
| 153 | break; |
| 154 | #endif |
Siva Durga Prasad Paladugu | 8f039b1 | 2018-05-31 15:10:21 +0530 | [diff] [blame] | 155 | default: |
| 156 | break; |
| 157 | } |
| 158 | |
| 159 | switch (argc) { |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 160 | case 5: /* fpga <op> <dev> <data> <datasize> */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 161 | data_size = simple_strtoul(argv[4], NULL, 16); |
Michal Simek | 76956a8 | 2018-05-30 11:28:57 +0200 | [diff] [blame] | 162 | if (!data_size) { |
| 163 | puts("Zero data_size\n"); |
| 164 | return CMD_RET_USAGE; |
| 165 | } |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 166 | case 4: /* fpga <op> <dev> <data> */ |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 167 | #if defined(CONFIG_FIT) |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 168 | if (fit_parse_subimage(argv[3], (ulong)fpga_data, |
| 169 | &fit_addr, &fit_uname)) { |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 170 | fpga_data = (void *)fit_addr; |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 171 | debug("* fpga: subimage '%s' from FIT image ", |
| 172 | fit_uname); |
| 173 | debug("at 0x%08lx\n", fit_addr); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 174 | } else |
| 175 | #endif |
| 176 | { |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 177 | fpga_data = (void *)simple_strtoul(argv[3], NULL, 16); |
Stefano Babic | b69b9a5 | 2011-12-28 06:47:01 +0000 | [diff] [blame] | 178 | debug("* fpga: cmdline image address = 0x%08lx\n", |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 179 | (ulong)fpga_data); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 180 | } |
Michal Simek | 77bb86d | 2016-01-05 13:51:48 +0100 | [diff] [blame] | 181 | debug("%s: fpga_data = 0x%lx\n", __func__, (ulong)fpga_data); |
Michal Simek | 76956a8 | 2018-05-30 11:28:57 +0200 | [diff] [blame] | 182 | if (!fpga_data) { |
| 183 | puts("Zero fpga_data address\n"); |
| 184 | return CMD_RET_USAGE; |
| 185 | } |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 186 | case 3: /* fpga <op> <dev | data addr> */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 187 | dev = (int)simple_strtoul(argv[2], NULL, 16); |
Stefano Babic | b69b9a5 | 2011-12-28 06:47:01 +0000 | [diff] [blame] | 188 | debug("%s: device = %d\n", __func__, dev); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 189 | } |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 190 | |
Stefano Babic | 67d7f56 | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 191 | if (dev == FPGA_INVALID_DEVICE) { |
| 192 | puts("FPGA device not specified\n"); |
Michal Simek | f4337f3 | 2018-05-30 10:04:34 +0200 | [diff] [blame] | 193 | return CMD_RET_USAGE; |
Stefano Babic | 67d7f56 | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 194 | } |
| 195 | |
| 196 | switch (op) { |
Stefano Babic | 67d7f56 | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 197 | case FPGA_INFO: |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 198 | rc = fpga_info(dev); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 199 | break; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 200 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 201 | case FPGA_LOAD: |
Michal Simek | 1466365 | 2014-05-02 14:09:30 +0200 | [diff] [blame] | 202 | rc = fpga_load(dev, fpga_data, data_size, BIT_FULL); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 203 | break; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 204 | |
Michal Simek | 64c7098 | 2014-05-02 13:43:39 +0200 | [diff] [blame] | 205 | #if defined(CONFIG_CMD_FPGA_LOADP) |
| 206 | case FPGA_LOADP: |
| 207 | rc = fpga_load(dev, fpga_data, data_size, BIT_PARTIAL); |
| 208 | break; |
| 209 | #endif |
| 210 | |
wdenk | 310b4fc | 2005-01-09 18:12:51 +0000 | [diff] [blame] | 211 | case FPGA_LOADB: |
Michal Simek | 1466365 | 2014-05-02 14:09:30 +0200 | [diff] [blame] | 212 | rc = fpga_loadbitstream(dev, fpga_data, data_size, BIT_FULL); |
wdenk | 310b4fc | 2005-01-09 18:12:51 +0000 | [diff] [blame] | 213 | break; |
Michal Simek | 64c7098 | 2014-05-02 13:43:39 +0200 | [diff] [blame] | 214 | |
| 215 | #if defined(CONFIG_CMD_FPGA_LOADBP) |
| 216 | case FPGA_LOADBP: |
| 217 | rc = fpga_loadbitstream(dev, fpga_data, data_size, BIT_PARTIAL); |
| 218 | break; |
| 219 | #endif |
wdenk | 310b4fc | 2005-01-09 18:12:51 +0000 | [diff] [blame] | 220 | |
Siva Durga Prasad Paladugu | 9112b4c | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 221 | #if defined(CONFIG_CMD_FPGA_LOADFS) |
| 222 | case FPGA_LOADFS: |
| 223 | rc = fpga_fsload(dev, fpga_data, data_size, &fpga_fsinfo); |
| 224 | break; |
| 225 | #endif |
| 226 | |
Siva Durga Prasad Paladugu | cce0cb0 | 2018-05-31 15:10:22 +0530 | [diff] [blame] | 227 | #if defined(CONFIG_CMD_FPGA_LOAD_SECURE) |
| 228 | case FPGA_LOADS: |
| 229 | rc = fpga_loads(dev, fpga_data, data_size, &fpga_sec_info); |
| 230 | break; |
| 231 | #endif |
| 232 | |
Siva Durga Prasad Paladugu | adc11de | 2014-03-14 16:35:38 +0530 | [diff] [blame] | 233 | #if defined(CONFIG_CMD_FPGA_LOADMK) |
Stefan Roese | 5f1cf2d | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 234 | case FPGA_LOADMK: |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 235 | switch (genimg_get_format(fpga_data)) { |
Heiko Schocher | 515eb12 | 2014-05-28 11:33:33 +0200 | [diff] [blame] | 236 | #if defined(CONFIG_IMAGE_FORMAT_LEGACY) |
Marian Balakowicz | dbdd16a | 2008-02-04 08:28:09 +0100 | [diff] [blame] | 237 | case IMAGE_FORMAT_LEGACY: |
| 238 | { |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 239 | image_header_t *hdr = |
| 240 | (image_header_t *)fpga_data; |
| 241 | ulong data; |
Michal Simek | ead2d42 | 2013-10-04 10:51:01 +0200 | [diff] [blame] | 242 | uint8_t comp; |
| 243 | |
| 244 | comp = image_get_comp(hdr); |
| 245 | if (comp == IH_COMP_GZIP) { |
Michal Simek | be09b94 | 2014-07-16 10:30:50 +0200 | [diff] [blame] | 246 | #if defined(CONFIG_GZIP) |
Michal Simek | ead2d42 | 2013-10-04 10:51:01 +0200 | [diff] [blame] | 247 | ulong image_buf = image_get_data(hdr); |
| 248 | data = image_get_load(hdr); |
| 249 | ulong image_size = ~0UL; |
Stefan Roese | 5f1cf2d | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 250 | |
Michal Simek | ead2d42 | 2013-10-04 10:51:01 +0200 | [diff] [blame] | 251 | if (gunzip((void *)data, ~0UL, |
| 252 | (void *)image_buf, |
| 253 | &image_size) != 0) { |
| 254 | puts("GUNZIP: error\n"); |
| 255 | return 1; |
| 256 | } |
| 257 | data_size = image_size; |
Michal Simek | be09b94 | 2014-07-16 10:30:50 +0200 | [diff] [blame] | 258 | #else |
| 259 | puts("Gunzip image is not supported\n"); |
| 260 | return 1; |
| 261 | #endif |
Michal Simek | ead2d42 | 2013-10-04 10:51:01 +0200 | [diff] [blame] | 262 | } else { |
| 263 | data = (ulong)image_get_data(hdr); |
| 264 | data_size = image_get_data_size(hdr); |
| 265 | } |
Michal Simek | 1466365 | 2014-05-02 14:09:30 +0200 | [diff] [blame] | 266 | rc = fpga_load(dev, (void *)data, data_size, |
| 267 | BIT_FULL); |
Stefan Roese | 5f1cf2d | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 268 | } |
Marian Balakowicz | dbdd16a | 2008-02-04 08:28:09 +0100 | [diff] [blame] | 269 | break; |
Heiko Schocher | 515eb12 | 2014-05-28 11:33:33 +0200 | [diff] [blame] | 270 | #endif |
Marian Balakowicz | dbdd16a | 2008-02-04 08:28:09 +0100 | [diff] [blame] | 271 | #if defined(CONFIG_FIT) |
| 272 | case IMAGE_FORMAT_FIT: |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 273 | { |
| 274 | const void *fit_hdr = (const void *)fpga_data; |
| 275 | int noffset; |
Wolfgang Denk | 74f9b38 | 2011-07-30 13:33:49 +0000 | [diff] [blame] | 276 | const void *fit_data; |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 277 | |
| 278 | if (fit_uname == NULL) { |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 279 | puts("No FIT subimage unit name\n"); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 280 | return 1; |
| 281 | } |
| 282 | |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 283 | if (!fit_check_format(fit_hdr)) { |
| 284 | puts("Bad FIT image format\n"); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 285 | return 1; |
| 286 | } |
| 287 | |
| 288 | /* get fpga component image node offset */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 289 | noffset = fit_image_get_node(fit_hdr, |
| 290 | fit_uname); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 291 | if (noffset < 0) { |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 292 | printf("Can't find '%s' FIT subimage\n", |
| 293 | fit_uname); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 294 | return 1; |
| 295 | } |
| 296 | |
| 297 | /* verify integrity */ |
Simon Glass | 7428ad1 | 2013-05-07 06:11:57 +0000 | [diff] [blame] | 298 | if (!fit_image_verify(fit_hdr, noffset)) { |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 299 | puts ("Bad Data Hash\n"); |
| 300 | return 1; |
| 301 | } |
| 302 | |
| 303 | /* get fpga subimage data address and length */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 304 | if (fit_image_get_data(fit_hdr, noffset, |
| 305 | &fit_data, &data_size)) { |
| 306 | puts("Fpga subimage data not found\n"); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 307 | return 1; |
| 308 | } |
| 309 | |
Michal Simek | 1466365 | 2014-05-02 14:09:30 +0200 | [diff] [blame] | 310 | rc = fpga_load(dev, fit_data, data_size, |
| 311 | BIT_FULL); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 312 | } |
Marian Balakowicz | dbdd16a | 2008-02-04 08:28:09 +0100 | [diff] [blame] | 313 | break; |
| 314 | #endif |
| 315 | default: |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 316 | puts("** Unknown image type\n"); |
Marian Balakowicz | dbdd16a | 2008-02-04 08:28:09 +0100 | [diff] [blame] | 317 | rc = FPGA_FAIL; |
| 318 | break; |
Stefan Roese | 5f1cf2d | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 319 | } |
| 320 | break; |
Siva Durga Prasad Paladugu | adc11de | 2014-03-14 16:35:38 +0530 | [diff] [blame] | 321 | #endif |
Stefan Roese | 5f1cf2d | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 322 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 323 | case FPGA_DUMP: |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 324 | rc = fpga_dump(dev, fpga_data, data_size); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 325 | break; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 326 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 327 | default: |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 328 | printf("Unknown operation\n"); |
Simon Glass | a06dfc7 | 2011-12-10 08:44:01 +0000 | [diff] [blame] | 329 | return CMD_RET_USAGE; |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 330 | } |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 331 | return rc; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 332 | } |
| 333 | |
Michal Simek | 9933c36 | 2018-06-04 14:55:20 +0200 | [diff] [blame^] | 334 | static cmd_tbl_t fpga_commands[] = { |
| 335 | }; |
| 336 | |
| 337 | static int do_fpga_wrapper(cmd_tbl_t *cmdtp, int flag, int argc, |
| 338 | char *const argv[]) |
| 339 | { |
| 340 | cmd_tbl_t *fpga_cmd; |
| 341 | int ret; |
| 342 | |
| 343 | if (argc < 2) |
| 344 | return CMD_RET_USAGE; |
| 345 | |
| 346 | fpga_cmd = find_cmd_tbl(argv[1], fpga_commands, |
| 347 | ARRAY_SIZE(fpga_commands)); |
| 348 | |
| 349 | /* This should be removed when all functions are converted */ |
| 350 | if (!fpga_cmd) |
| 351 | return do_fpga(cmdtp, flag, argc, argv); |
| 352 | |
| 353 | /* FIXME This can't be reached till all functions are converted */ |
| 354 | if (!fpga_cmd) { |
| 355 | debug("fpga: non existing command\n"); |
| 356 | return CMD_RET_USAGE; |
| 357 | } |
| 358 | |
| 359 | argc -= 2; |
| 360 | argv += 2; |
| 361 | |
| 362 | if (argc > fpga_cmd->maxargs) { |
| 363 | debug("fpga: more parameters passed\n"); |
| 364 | return CMD_RET_USAGE; |
| 365 | } |
| 366 | |
| 367 | ret = fpga_cmd->cmd(fpga_cmd, flag, argc, argv); |
| 368 | |
| 369 | return cmd_process_error(fpga_cmd, ret); |
| 370 | } |
| 371 | |
Siva Durga Prasad Paladugu | cce0cb0 | 2018-05-31 15:10:22 +0530 | [diff] [blame] | 372 | #if defined(CONFIG_CMD_FPGA_LOADFS) || defined(CONFIG_CMD_FPGA_LOAD_SECURE) |
Michal Simek | 9933c36 | 2018-06-04 14:55:20 +0200 | [diff] [blame^] | 373 | U_BOOT_CMD(fpga, 9, 1, do_fpga_wrapper, |
Siva Durga Prasad Paladugu | 9112b4c | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 374 | #else |
Michal Simek | 9933c36 | 2018-06-04 14:55:20 +0200 | [diff] [blame^] | 375 | U_BOOT_CMD(fpga, 6, 1, do_fpga_wrapper, |
Siva Durga Prasad Paladugu | 9112b4c | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 376 | #endif |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 377 | "loadable FPGA image support", |
| 378 | "[operation type] [device number] [image address] [image size]\n" |
| 379 | "fpga operations:\n" |
Michal Simek | 70da592 | 2015-01-26 08:52:27 +0100 | [diff] [blame] | 380 | " dump\t[dev] [address] [size]\tLoad device to memory buffer\n" |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 381 | " info\t[dev]\t\t\tlist known device information\n" |
| 382 | " load\t[dev] [address] [size]\tLoad device from memory buffer\n" |
Michal Simek | 64c7098 | 2014-05-02 13:43:39 +0200 | [diff] [blame] | 383 | #if defined(CONFIG_CMD_FPGA_LOADP) |
| 384 | " loadp\t[dev] [address] [size]\t" |
| 385 | "Load device from memory buffer with partial bitstream\n" |
| 386 | #endif |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 387 | " loadb\t[dev] [address] [size]\t" |
| 388 | "Load device from bitstream buffer (Xilinx only)\n" |
Michal Simek | 64c7098 | 2014-05-02 13:43:39 +0200 | [diff] [blame] | 389 | #if defined(CONFIG_CMD_FPGA_LOADBP) |
| 390 | " loadbp\t[dev] [address] [size]\t" |
| 391 | "Load device from bitstream buffer with partial bitstream" |
| 392 | "(Xilinx only)\n" |
| 393 | #endif |
Siva Durga Prasad Paladugu | 9112b4c | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 394 | #if defined(CONFIG_CMD_FPGA_LOADFS) |
| 395 | "Load device from filesystem (FAT by default) (Xilinx only)\n" |
| 396 | " loadfs [dev] [address] [image size] [blocksize] <interface>\n" |
| 397 | " [<dev[:part]>] <filename>\n" |
| 398 | #endif |
Siva Durga Prasad Paladugu | adc11de | 2014-03-14 16:35:38 +0530 | [diff] [blame] | 399 | #if defined(CONFIG_CMD_FPGA_LOADMK) |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 400 | " loadmk [dev] [address]\tLoad device generated with mkimage" |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 401 | #if defined(CONFIG_FIT) |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 402 | "\n" |
| 403 | "\tFor loadmk operating on FIT format uImage address must include\n" |
| 404 | "\tsubimage unit name in the form of addr:<subimg_uname>" |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 405 | #endif |
Siva Durga Prasad Paladugu | adc11de | 2014-03-14 16:35:38 +0530 | [diff] [blame] | 406 | #endif |
Siva Durga Prasad Paladugu | cce0cb0 | 2018-05-31 15:10:22 +0530 | [diff] [blame] | 407 | #if defined(CONFIG_CMD_FPGA_LOAD_SECURE) |
| 408 | "Load encrypted bitstream (Xilinx only)\n" |
| 409 | " loads [dev] [address] [size] [auth-OCM-0/DDR-1/noauth-2]\n" |
| 410 | " [enc-devkey(0)/userkey(1)/nenc(2) [Userkey address]\n" |
| 411 | "Loads the secure bistreams(authenticated/encrypted/both\n" |
| 412 | "authenticated and encrypted) of [size] from [address].\n" |
| 413 | "The auth-OCM/DDR flag specifies to perform authentication\n" |
| 414 | "in OCM or in DDR. 0 for OCM, 1 for DDR, 2 for no authentication.\n" |
| 415 | "The enc flag specifies which key to be used for decryption\n" |
| 416 | "0-device key, 1-user key, 2-no encryption.\n" |
| 417 | "The optional Userkey address specifies from which address key\n" |
| 418 | "has to be used for decryption if user key is selected.\n" |
| 419 | "NOTE: the sceure bitstream has to be created using xilinx\n" |
| 420 | "bootgen tool only.\n" |
| 421 | #endif |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 422 | ); |