wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2000, 2001 |
| 3 | * Rich Ireland, Enterasys Networks, rireland@enterasys.com. |
| 4 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | /* |
| 9 | * FPGA support |
| 10 | */ |
| 11 | #include <common.h> |
| 12 | #include <command.h> |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 13 | #include <fpga.h> |
wdenk | 525d7b6 | 2005-01-22 18:13:04 +0000 | [diff] [blame] | 14 | #include <malloc.h> |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 15 | |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 16 | /* Local functions */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 17 | static int fpga_get_op(char *opstr); |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 18 | |
| 19 | /* Local defines */ |
| 20 | #define FPGA_NONE -1 |
| 21 | #define FPGA_INFO 0 |
| 22 | #define FPGA_LOAD 1 |
wdenk | 310b4fc | 2005-01-09 18:12:51 +0000 | [diff] [blame] | 23 | #define FPGA_LOADB 2 |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 24 | #define FPGA_DUMP 3 |
Stefan Roese | 5f1cf2d | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 25 | #define FPGA_LOADMK 4 |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 26 | |
| 27 | /* ------------------------------------------------------------------------- */ |
| 28 | /* command form: |
| 29 | * fpga <op> <device number> <data addr> <datasize> |
| 30 | * where op is 'load', 'dump', or 'info' |
| 31 | * If there is no device number field, the fpga environment variable is used. |
| 32 | * If there is no data addr field, the fpgadata environment variable is used. |
| 33 | * The info command requires no data address field. |
| 34 | */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 35 | int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 36 | { |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 37 | int op, dev = FPGA_INVALID_DEVICE; |
| 38 | size_t data_size = 0; |
| 39 | void *fpga_data = NULL; |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 40 | char *devstr = getenv("fpga"); |
| 41 | char *datastr = getenv("fpgadata"); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 42 | int rc = FPGA_FAIL; |
Stefano Babic | 67d7f56 | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 43 | int wrong_parms = 0; |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 44 | #if defined(CONFIG_FIT) |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 45 | const char *fit_uname = NULL; |
| 46 | ulong fit_addr; |
| 47 | #endif |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 48 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 49 | if (devstr) |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 50 | dev = (int) simple_strtoul(devstr, NULL, 16); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 51 | if (datastr) |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 52 | fpga_data = (void *)simple_strtoul(datastr, NULL, 16); |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 53 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 54 | switch (argc) { |
| 55 | case 5: /* fpga <op> <dev> <data> <datasize> */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 56 | data_size = simple_strtoul(argv[4], NULL, 16); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 57 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 58 | case 4: /* fpga <op> <dev> <data> */ |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 59 | #if defined(CONFIG_FIT) |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 60 | if (fit_parse_subimage(argv[3], (ulong)fpga_data, |
| 61 | &fit_addr, &fit_uname)) { |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 62 | fpga_data = (void *)fit_addr; |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 63 | debug("* fpga: subimage '%s' from FIT image ", |
| 64 | fit_uname); |
| 65 | debug("at 0x%08lx\n", fit_addr); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 66 | } else |
| 67 | #endif |
| 68 | { |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 69 | fpga_data = (void *)simple_strtoul(argv[3], NULL, 16); |
Stefano Babic | b69b9a5 | 2011-12-28 06:47:01 +0000 | [diff] [blame] | 70 | debug("* fpga: cmdline image address = 0x%08lx\n", |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 71 | (ulong)fpga_data); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 72 | } |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 73 | debug("%s: fpga_data = 0x%x\n", __func__, (uint)fpga_data); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 74 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 75 | case 3: /* fpga <op> <dev | data addr> */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 76 | dev = (int)simple_strtoul(argv[2], NULL, 16); |
Stefano Babic | b69b9a5 | 2011-12-28 06:47:01 +0000 | [diff] [blame] | 77 | debug("%s: device = %d\n", __func__, dev); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 78 | /* FIXME - this is a really weak test */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 79 | if ((argc == 3) && (dev > fpga_count())) { |
| 80 | /* must be buffer ptr */ |
Stefano Babic | b69b9a5 | 2011-12-28 06:47:01 +0000 | [diff] [blame] | 81 | debug("%s: Assuming buffer pointer in arg 3\n", |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 82 | __func__); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 83 | |
| 84 | #if defined(CONFIG_FIT) |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 85 | if (fit_parse_subimage(argv[2], (ulong)fpga_data, |
| 86 | &fit_addr, &fit_uname)) { |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 87 | fpga_data = (void *)fit_addr; |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 88 | debug("* fpga: subimage '%s' from FIT image ", |
| 89 | fit_uname); |
| 90 | debug("at 0x%08lx\n", fit_addr); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 91 | } else |
| 92 | #endif |
| 93 | { |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 94 | fpga_data = (void *)dev; |
| 95 | debug("* fpga: cmdline image addr = 0x%08lx\n", |
| 96 | (ulong)fpga_data); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 97 | } |
| 98 | |
Stefano Babic | b69b9a5 | 2011-12-28 06:47:01 +0000 | [diff] [blame] | 99 | debug("%s: fpga_data = 0x%x\n", |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 100 | __func__, (uint)fpga_data); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 101 | dev = FPGA_INVALID_DEVICE; /* reset device num */ |
| 102 | } |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 103 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 104 | case 2: /* fpga <op> */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 105 | op = (int)fpga_get_op(argv[1]); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 106 | break; |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 107 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 108 | default: |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 109 | debug("%s: Too many or too few args (%d)\n", __func__, argc); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 110 | op = FPGA_NONE; /* force usage display */ |
| 111 | break; |
| 112 | } |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 113 | |
Stefano Babic | 67d7f56 | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 114 | if (dev == FPGA_INVALID_DEVICE) { |
| 115 | puts("FPGA device not specified\n"); |
| 116 | op = FPGA_NONE; |
| 117 | } |
| 118 | |
| 119 | switch (op) { |
| 120 | case FPGA_NONE: |
| 121 | case FPGA_INFO: |
| 122 | break; |
| 123 | case FPGA_LOAD: |
| 124 | case FPGA_LOADB: |
| 125 | case FPGA_DUMP: |
| 126 | if (!fpga_data || !data_size) |
| 127 | wrong_parms = 1; |
| 128 | break; |
Siva Durga Prasad Paladugu | adc11de | 2014-03-14 16:35:38 +0530 | [diff] [blame^] | 129 | #if defined(CONFIG_CMD_FPGA_LOADMK) |
Stefano Babic | 67d7f56 | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 130 | case FPGA_LOADMK: |
| 131 | if (!fpga_data) |
| 132 | wrong_parms = 1; |
| 133 | break; |
Siva Durga Prasad Paladugu | adc11de | 2014-03-14 16:35:38 +0530 | [diff] [blame^] | 134 | #endif |
Stefano Babic | 67d7f56 | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 135 | } |
| 136 | |
| 137 | if (wrong_parms) { |
| 138 | puts("Wrong parameters for FPGA request\n"); |
| 139 | op = FPGA_NONE; |
| 140 | } |
| 141 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 142 | switch (op) { |
| 143 | case FPGA_NONE: |
Simon Glass | a06dfc7 | 2011-12-10 08:44:01 +0000 | [diff] [blame] | 144 | return CMD_RET_USAGE; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 145 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 146 | case FPGA_INFO: |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 147 | rc = fpga_info(dev); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 148 | break; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 149 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 150 | case FPGA_LOAD: |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 151 | rc = fpga_load(dev, fpga_data, data_size); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 152 | break; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 153 | |
wdenk | 310b4fc | 2005-01-09 18:12:51 +0000 | [diff] [blame] | 154 | case FPGA_LOADB: |
| 155 | rc = fpga_loadbitstream(dev, fpga_data, data_size); |
| 156 | break; |
| 157 | |
Siva Durga Prasad Paladugu | adc11de | 2014-03-14 16:35:38 +0530 | [diff] [blame^] | 158 | #if defined(CONFIG_CMD_FPGA_LOADMK) |
Stefan Roese | 5f1cf2d | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 159 | case FPGA_LOADMK: |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 160 | switch (genimg_get_format(fpga_data)) { |
Marian Balakowicz | dbdd16a | 2008-02-04 08:28:09 +0100 | [diff] [blame] | 161 | case IMAGE_FORMAT_LEGACY: |
| 162 | { |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 163 | image_header_t *hdr = |
| 164 | (image_header_t *)fpga_data; |
| 165 | ulong data; |
Michal Simek | ead2d42 | 2013-10-04 10:51:01 +0200 | [diff] [blame] | 166 | uint8_t comp; |
| 167 | |
| 168 | comp = image_get_comp(hdr); |
| 169 | if (comp == IH_COMP_GZIP) { |
| 170 | ulong image_buf = image_get_data(hdr); |
| 171 | data = image_get_load(hdr); |
| 172 | ulong image_size = ~0UL; |
Stefan Roese | 5f1cf2d | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 173 | |
Michal Simek | ead2d42 | 2013-10-04 10:51:01 +0200 | [diff] [blame] | 174 | if (gunzip((void *)data, ~0UL, |
| 175 | (void *)image_buf, |
| 176 | &image_size) != 0) { |
| 177 | puts("GUNZIP: error\n"); |
| 178 | return 1; |
| 179 | } |
| 180 | data_size = image_size; |
| 181 | } else { |
| 182 | data = (ulong)image_get_data(hdr); |
| 183 | data_size = image_get_data_size(hdr); |
| 184 | } |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 185 | rc = fpga_load(dev, (void *)data, data_size); |
Stefan Roese | 5f1cf2d | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 186 | } |
Marian Balakowicz | dbdd16a | 2008-02-04 08:28:09 +0100 | [diff] [blame] | 187 | break; |
| 188 | #if defined(CONFIG_FIT) |
| 189 | case IMAGE_FORMAT_FIT: |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 190 | { |
| 191 | const void *fit_hdr = (const void *)fpga_data; |
| 192 | int noffset; |
Wolfgang Denk | 74f9b38 | 2011-07-30 13:33:49 +0000 | [diff] [blame] | 193 | const void *fit_data; |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 194 | |
| 195 | if (fit_uname == NULL) { |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 196 | puts("No FIT subimage unit name\n"); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 197 | return 1; |
| 198 | } |
| 199 | |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 200 | if (!fit_check_format(fit_hdr)) { |
| 201 | puts("Bad FIT image format\n"); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 202 | return 1; |
| 203 | } |
| 204 | |
| 205 | /* get fpga component image node offset */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 206 | noffset = fit_image_get_node(fit_hdr, |
| 207 | fit_uname); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 208 | if (noffset < 0) { |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 209 | printf("Can't find '%s' FIT subimage\n", |
| 210 | fit_uname); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 211 | return 1; |
| 212 | } |
| 213 | |
| 214 | /* verify integrity */ |
Simon Glass | 7428ad1 | 2013-05-07 06:11:57 +0000 | [diff] [blame] | 215 | if (!fit_image_verify(fit_hdr, noffset)) { |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 216 | puts ("Bad Data Hash\n"); |
| 217 | return 1; |
| 218 | } |
| 219 | |
| 220 | /* get fpga subimage data address and length */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 221 | if (fit_image_get_data(fit_hdr, noffset, |
| 222 | &fit_data, &data_size)) { |
| 223 | puts("Fpga subimage data not found\n"); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 224 | return 1; |
| 225 | } |
| 226 | |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 227 | rc = fpga_load(dev, fit_data, data_size); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 228 | } |
Marian Balakowicz | dbdd16a | 2008-02-04 08:28:09 +0100 | [diff] [blame] | 229 | break; |
| 230 | #endif |
| 231 | default: |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 232 | puts("** Unknown image type\n"); |
Marian Balakowicz | dbdd16a | 2008-02-04 08:28:09 +0100 | [diff] [blame] | 233 | rc = FPGA_FAIL; |
| 234 | break; |
Stefan Roese | 5f1cf2d | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 235 | } |
| 236 | break; |
Siva Durga Prasad Paladugu | adc11de | 2014-03-14 16:35:38 +0530 | [diff] [blame^] | 237 | #endif |
Stefan Roese | 5f1cf2d | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 238 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 239 | case FPGA_DUMP: |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 240 | rc = fpga_dump(dev, fpga_data, data_size); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 241 | break; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 242 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 243 | default: |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 244 | printf("Unknown operation\n"); |
Simon Glass | a06dfc7 | 2011-12-10 08:44:01 +0000 | [diff] [blame] | 245 | return CMD_RET_USAGE; |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 246 | } |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 247 | return rc; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 248 | } |
| 249 | |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 250 | /* |
| 251 | * Map op to supported operations. We don't use a table since we |
| 252 | * would just have to relocate it from flash anyway. |
| 253 | */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 254 | static int fpga_get_op(char *opstr) |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 255 | { |
| 256 | int op = FPGA_NONE; |
| 257 | |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 258 | if (!strcmp("info", opstr)) |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 259 | op = FPGA_INFO; |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 260 | else if (!strcmp("loadb", opstr)) |
wdenk | 310b4fc | 2005-01-09 18:12:51 +0000 | [diff] [blame] | 261 | op = FPGA_LOADB; |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 262 | else if (!strcmp("load", opstr)) |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 263 | op = FPGA_LOAD; |
Siva Durga Prasad Paladugu | adc11de | 2014-03-14 16:35:38 +0530 | [diff] [blame^] | 264 | #if defined(CONFIG_CMD_FPGA_LOADMK) |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 265 | else if (!strcmp("loadmk", opstr)) |
Stefan Roese | 5f1cf2d | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 266 | op = FPGA_LOADMK; |
Siva Durga Prasad Paladugu | adc11de | 2014-03-14 16:35:38 +0530 | [diff] [blame^] | 267 | #endif |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 268 | else if (!strcmp("dump", opstr)) |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 269 | op = FPGA_DUMP; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 270 | |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 271 | if (op == FPGA_NONE) |
| 272 | printf("Unknown fpga operation \"%s\"\n", opstr); |
| 273 | |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 274 | return op; |
| 275 | } |
| 276 | |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 277 | U_BOOT_CMD(fpga, 6, 1, do_fpga, |
| 278 | "loadable FPGA image support", |
| 279 | "[operation type] [device number] [image address] [image size]\n" |
| 280 | "fpga operations:\n" |
| 281 | " dump\t[dev]\t\t\tLoad device to memory buffer\n" |
| 282 | " info\t[dev]\t\t\tlist known device information\n" |
| 283 | " load\t[dev] [address] [size]\tLoad device from memory buffer\n" |
| 284 | " loadb\t[dev] [address] [size]\t" |
| 285 | "Load device from bitstream buffer (Xilinx only)\n" |
Siva Durga Prasad Paladugu | adc11de | 2014-03-14 16:35:38 +0530 | [diff] [blame^] | 286 | #if defined(CONFIG_CMD_FPGA_LOADMK) |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 287 | " loadmk [dev] [address]\tLoad device generated with mkimage" |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 288 | #if defined(CONFIG_FIT) |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 289 | "\n" |
| 290 | "\tFor loadmk operating on FIT format uImage address must include\n" |
| 291 | "\tsubimage unit name in the form of addr:<subimg_uname>" |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 292 | #endif |
Siva Durga Prasad Paladugu | adc11de | 2014-03-14 16:35:38 +0530 | [diff] [blame^] | 293 | #endif |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 294 | ); |