Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2011 The Chromium OS Authors. |
| 4 | * (C) Copyright 2002-2006 |
| 5 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 6 | * |
| 7 | * (C) Copyright 2002 |
| 8 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| 9 | * Marius Groeger <mgroeger@sysgo.de> |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 10 | */ |
| 11 | |
| 12 | #include <common.h> |
Simon Glass | a815dab | 2018-11-15 18:43:52 -0700 | [diff] [blame] | 13 | #include <bloblist.h> |
Simon Glass | 1ea9789 | 2020-05-10 11:40:00 -0600 | [diff] [blame] | 14 | #include <bootstage.h> |
Simon Glass | 85d6531 | 2019-12-28 10:44:58 -0700 | [diff] [blame] | 15 | #include <clock_legacy.h> |
Simon Glass | a73bda4 | 2015-11-08 23:47:45 -0700 | [diff] [blame] | 16 | #include <console.h> |
Mario Six | 97bbb60 | 2018-08-06 10:23:41 +0200 | [diff] [blame] | 17 | #include <cpu.h> |
Simon Glass | 1fa70f8 | 2019-11-14 12:57:34 -0700 | [diff] [blame] | 18 | #include <cpu_func.h> |
Simon Glass | a730c5d | 2014-07-23 06:55:04 -0600 | [diff] [blame] | 19 | #include <dm.h> |
Simon Glass | 79fd214 | 2019-08-01 09:46:43 -0600 | [diff] [blame] | 20 | #include <env.h> |
Simon Glass | 9d1f619 | 2019-08-02 09:44:25 -0600 | [diff] [blame] | 21 | #include <env_internal.h> |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 22 | #include <fdtdec.h> |
Simon Glass | 1539343 | 2013-04-20 08:42:41 +0000 | [diff] [blame] | 23 | #include <fs.h> |
Simon Glass | f11478f | 2019-12-28 10:45:07 -0700 | [diff] [blame] | 24 | #include <hang.h> |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 25 | #include <i2c.h> |
Simon Glass | 6980b6b | 2019-11-14 12:57:45 -0700 | [diff] [blame] | 26 | #include <init.h> |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 27 | #include <initcall.h> |
Simon Glass | 42cf22f | 2019-08-01 09:46:38 -0600 | [diff] [blame] | 28 | #include <lcd.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 29 | #include <log.h> |
Simon Glass | d1d087d | 2015-02-27 22:06:36 -0700 | [diff] [blame] | 30 | #include <malloc.h> |
Joe Hershberger | 65b905b | 2015-03-22 17:08:59 -0500 | [diff] [blame] | 31 | #include <mapmem.h> |
Simon Glass | 62cf912 | 2013-04-26 02:53:43 +0000 | [diff] [blame] | 32 | #include <os.h> |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 33 | #include <post.h> |
Simon Glass | 6ab9107 | 2017-03-31 08:40:38 -0600 | [diff] [blame] | 34 | #include <relocate.h> |
Simon Glass | 3673618 | 2019-11-14 12:57:24 -0700 | [diff] [blame] | 35 | #include <serial.h> |
Simon Glass | e14f1a2 | 2018-11-15 18:44:09 -0700 | [diff] [blame] | 36 | #ifdef CONFIG_SPL |
| 37 | #include <spl.h> |
| 38 | #endif |
Jeroen Hofstee | a802b98 | 2014-06-23 23:20:19 +0200 | [diff] [blame] | 39 | #include <status_led.h> |
Mario Six | 4481a5d | 2018-08-06 10:23:34 +0200 | [diff] [blame] | 40 | #include <sysreset.h> |
Simon Glass | 8e4f80f | 2016-02-24 09:14:50 -0700 | [diff] [blame] | 41 | #include <timer.h> |
Simon Glass | 209a1a6 | 2013-06-11 11:14:42 -0700 | [diff] [blame] | 42 | #include <trace.h> |
Simon Glass | fce58f5 | 2016-01-18 19:52:21 -0700 | [diff] [blame] | 43 | #include <video.h> |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 44 | #include <watchdog.h> |
Simon Glass | 274e0b0 | 2020-05-10 11:39:56 -0600 | [diff] [blame] | 45 | #include <asm/cache.h> |
Simon Glass | f004e8a | 2017-05-17 08:23:01 -0600 | [diff] [blame] | 46 | #ifdef CONFIG_MACH_TYPE |
| 47 | #include <asm/mach-types.h> |
| 48 | #endif |
Simon Glass | e770603 | 2017-03-31 08:40:39 -0600 | [diff] [blame] | 49 | #if defined(CONFIG_MP) && defined(CONFIG_PPC) |
| 50 | #include <asm/mp.h> |
| 51 | #endif |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 52 | #include <asm/io.h> |
| 53 | #include <asm/sections.h> |
Simon Glass | a730c5d | 2014-07-23 06:55:04 -0600 | [diff] [blame] | 54 | #include <dm/root.h> |
Simon Glass | b3c1256 | 2017-03-31 08:40:35 -0600 | [diff] [blame] | 55 | #include <linux/errno.h> |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 56 | |
| 57 | /* |
| 58 | * Pointer to initial global data area |
| 59 | * |
| 60 | * Here we initialize it if needed. |
| 61 | */ |
| 62 | #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR |
| 63 | #undef XTRN_DECLARE_GLOBAL_DATA_PTR |
| 64 | #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ |
Mario Six | 80b66dd | 2018-01-15 11:10:02 +0100 | [diff] [blame] | 65 | DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR); |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 66 | #else |
| 67 | DECLARE_GLOBAL_DATA_PTR; |
| 68 | #endif |
| 69 | |
| 70 | /* |
Simon Glass | 839855c | 2015-04-28 20:25:03 -0600 | [diff] [blame] | 71 | * TODO(sjg@chromium.org): IMO this code should be |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 72 | * refactored to a single function, something like: |
| 73 | * |
| 74 | * void led_set_state(enum led_colour_t colour, int on); |
| 75 | */ |
| 76 | /************************************************************************ |
| 77 | * Coloured LED functionality |
| 78 | ************************************************************************ |
| 79 | * May be supplied by boards if desired |
| 80 | */ |
Jeroen Hofstee | a802b98 | 2014-06-23 23:20:19 +0200 | [diff] [blame] | 81 | __weak void coloured_LED_init(void) {} |
| 82 | __weak void red_led_on(void) {} |
| 83 | __weak void red_led_off(void) {} |
| 84 | __weak void green_led_on(void) {} |
| 85 | __weak void green_led_off(void) {} |
| 86 | __weak void yellow_led_on(void) {} |
| 87 | __weak void yellow_led_off(void) {} |
| 88 | __weak void blue_led_on(void) {} |
| 89 | __weak void blue_led_off(void) {} |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 90 | |
| 91 | /* |
| 92 | * Why is gd allocated a register? Prior to reloc it might be better to |
| 93 | * just pass it around to each function in this file? |
| 94 | * |
| 95 | * After reloc one could argue that it is hardly used and doesn't need |
| 96 | * to be in a register. Or if it is it should perhaps hold pointers to all |
| 97 | * global data for all modules, so that post-reloc we can avoid the massive |
| 98 | * literal pool we get on ARM. Or perhaps just encourage each module to use |
| 99 | * a structure... |
| 100 | */ |
| 101 | |
Sonic Zhang | f503a52 | 2014-07-17 19:01:34 +0800 | [diff] [blame] | 102 | #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 103 | static int init_func_watchdog_init(void) |
| 104 | { |
Tom Rini | 210ebce | 2017-03-14 11:08:10 -0400 | [diff] [blame] | 105 | # if defined(CONFIG_HW_WATCHDOG) && \ |
| 106 | (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ |
Prasanthi Chellakumar | 0509c4e | 2018-10-09 11:46:40 -0700 | [diff] [blame] | 107 | defined(CONFIG_SH) || \ |
Anatolij Gustschin | 87db294 | 2016-06-13 14:24:23 +0200 | [diff] [blame] | 108 | defined(CONFIG_DESIGNWARE_WATCHDOG) || \ |
Stefan Roese | ee86af2 | 2015-03-10 08:04:36 +0100 | [diff] [blame] | 109 | defined(CONFIG_IMX_WATCHDOG)) |
Sonic Zhang | f503a52 | 2014-07-17 19:01:34 +0800 | [diff] [blame] | 110 | hw_watchdog_init(); |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 111 | puts(" Watchdog enabled\n"); |
Anatolij Gustschin | d3aa98a | 2016-06-13 14:24:24 +0200 | [diff] [blame] | 112 | # endif |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 113 | WATCHDOG_RESET(); |
| 114 | |
| 115 | return 0; |
| 116 | } |
| 117 | |
| 118 | int init_func_watchdog_reset(void) |
| 119 | { |
| 120 | WATCHDOG_RESET(); |
| 121 | |
| 122 | return 0; |
| 123 | } |
| 124 | #endif /* CONFIG_WATCHDOG */ |
| 125 | |
Jeroen Hofstee | 4584605 | 2014-10-08 22:57:22 +0200 | [diff] [blame] | 126 | __weak void board_add_ram_info(int use_default) |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 127 | { |
| 128 | /* please define platform specific board_add_ram_info() */ |
| 129 | } |
| 130 | |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 131 | static int init_baud_rate(void) |
| 132 | { |
Simon Glass | 22c34c2 | 2017-08-03 12:22:13 -0600 | [diff] [blame] | 133 | gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE); |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 134 | return 0; |
| 135 | } |
| 136 | |
| 137 | static int display_text_info(void) |
| 138 | { |
Ben Stoltz | 1930e8d | 2015-07-31 09:31:37 -0600 | [diff] [blame] | 139 | #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP) |
Daniel Schwierzeck | 17c2af6 | 2014-11-15 23:46:53 +0100 | [diff] [blame] | 140 | ulong bss_start, bss_end, text_base; |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 141 | |
Simon Glass | 9c9f44a | 2013-03-11 07:06:48 +0000 | [diff] [blame] | 142 | bss_start = (ulong)&__bss_start; |
| 143 | bss_end = (ulong)&__bss_end; |
Albert ARIBAUD | 6e29472 | 2014-02-22 17:53:43 +0100 | [diff] [blame] | 144 | |
Sonic Zhang | f503a52 | 2014-07-17 19:01:34 +0800 | [diff] [blame] | 145 | #ifdef CONFIG_SYS_TEXT_BASE |
Daniel Schwierzeck | 17c2af6 | 2014-11-15 23:46:53 +0100 | [diff] [blame] | 146 | text_base = CONFIG_SYS_TEXT_BASE; |
Sonic Zhang | f503a52 | 2014-07-17 19:01:34 +0800 | [diff] [blame] | 147 | #else |
Daniel Schwierzeck | 17c2af6 | 2014-11-15 23:46:53 +0100 | [diff] [blame] | 148 | text_base = CONFIG_SYS_MONITOR_BASE; |
Sonic Zhang | f503a52 | 2014-07-17 19:01:34 +0800 | [diff] [blame] | 149 | #endif |
Daniel Schwierzeck | 17c2af6 | 2014-11-15 23:46:53 +0100 | [diff] [blame] | 150 | |
| 151 | debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", |
Mario Six | 80b66dd | 2018-01-15 11:10:02 +0100 | [diff] [blame] | 152 | text_base, bss_start, bss_end); |
Simon Glass | 62cf912 | 2013-04-26 02:53:43 +0000 | [diff] [blame] | 153 | #endif |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 154 | |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 155 | return 0; |
| 156 | } |
| 157 | |
Mario Six | 4481a5d | 2018-08-06 10:23:34 +0200 | [diff] [blame] | 158 | #ifdef CONFIG_SYSRESET |
| 159 | static int print_resetinfo(void) |
| 160 | { |
| 161 | struct udevice *dev; |
| 162 | char status[256]; |
| 163 | int ret; |
| 164 | |
| 165 | ret = uclass_first_device_err(UCLASS_SYSRESET, &dev); |
| 166 | if (ret) { |
| 167 | debug("%s: No sysreset device found (error: %d)\n", |
| 168 | __func__, ret); |
| 169 | /* Not all boards have sysreset drivers available during early |
| 170 | * boot, so don't fail if one can't be found. |
| 171 | */ |
| 172 | return 0; |
| 173 | } |
| 174 | |
| 175 | if (!sysreset_get_status(dev, status, sizeof(status))) |
| 176 | printf("%s", status); |
| 177 | |
| 178 | return 0; |
| 179 | } |
| 180 | #endif |
| 181 | |
Mario Six | 97bbb60 | 2018-08-06 10:23:41 +0200 | [diff] [blame] | 182 | #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU) |
| 183 | static int print_cpuinfo(void) |
| 184 | { |
| 185 | struct udevice *dev; |
| 186 | char desc[512]; |
| 187 | int ret; |
| 188 | |
Ye Li | 28abafd | 2020-05-03 21:58:50 +0800 | [diff] [blame] | 189 | dev = cpu_get_current_dev(); |
| 190 | if (!dev) { |
| 191 | debug("%s: Could not get CPU device\n", |
| 192 | __func__); |
| 193 | return -ENODEV; |
Mario Six | 97bbb60 | 2018-08-06 10:23:41 +0200 | [diff] [blame] | 194 | } |
| 195 | |
| 196 | ret = cpu_get_desc(dev, desc, sizeof(desc)); |
| 197 | if (ret) { |
| 198 | debug("%s: Could not get CPU description (err = %d)\n", |
| 199 | dev->name, ret); |
| 200 | return ret; |
| 201 | } |
| 202 | |
Bin Meng | be2269f | 2018-10-10 22:06:55 -0700 | [diff] [blame] | 203 | printf("CPU: %s\n", desc); |
Mario Six | 97bbb60 | 2018-08-06 10:23:41 +0200 | [diff] [blame] | 204 | |
| 205 | return 0; |
| 206 | } |
| 207 | #endif |
| 208 | |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 209 | static int announce_dram_init(void) |
| 210 | { |
| 211 | puts("DRAM: "); |
| 212 | return 0; |
| 213 | } |
| 214 | |
| 215 | static int show_dram_config(void) |
| 216 | { |
York Sun | 60ac15a | 2014-05-02 17:28:05 -0700 | [diff] [blame] | 217 | unsigned long long size; |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 218 | |
| 219 | #ifdef CONFIG_NR_DRAM_BANKS |
| 220 | int i; |
| 221 | |
| 222 | debug("\nRAM Configuration:\n"); |
| 223 | for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { |
| 224 | size += gd->bd->bi_dram[i].size; |
Bin Meng | c896448 | 2015-08-06 01:31:20 -0700 | [diff] [blame] | 225 | debug("Bank #%d: %llx ", i, |
| 226 | (unsigned long long)(gd->bd->bi_dram[i].start)); |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 227 | #ifdef DEBUG |
| 228 | print_size(gd->bd->bi_dram[i].size, "\n"); |
| 229 | #endif |
| 230 | } |
| 231 | debug("\nDRAM: "); |
| 232 | #else |
| 233 | size = gd->ram_size; |
| 234 | #endif |
| 235 | |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 236 | print_size(size, ""); |
| 237 | board_add_ram_info(0); |
| 238 | putc('\n'); |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 239 | |
| 240 | return 0; |
| 241 | } |
| 242 | |
Simon Glass | 2f949c3 | 2017-03-31 08:40:32 -0600 | [diff] [blame] | 243 | __weak int dram_init_banksize(void) |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 244 | { |
| 245 | #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) |
| 246 | gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; |
| 247 | gd->bd->bi_dram[0].size = get_effective_memsize(); |
| 248 | #endif |
Simon Glass | 2f949c3 | 2017-03-31 08:40:32 -0600 | [diff] [blame] | 249 | |
| 250 | return 0; |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 251 | } |
| 252 | |
Simon Glass | 1a46a72 | 2017-05-12 21:09:56 -0600 | [diff] [blame] | 253 | #if defined(CONFIG_SYS_I2C) |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 254 | static int init_func_i2c(void) |
| 255 | { |
| 256 | puts("I2C: "); |
trem | a661290 | 2013-09-21 18:13:34 +0200 | [diff] [blame] | 257 | #ifdef CONFIG_SYS_I2C |
| 258 | i2c_init_all(); |
| 259 | #else |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 260 | i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); |
trem | a661290 | 2013-09-21 18:13:34 +0200 | [diff] [blame] | 261 | #endif |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 262 | puts("ready\n"); |
| 263 | return 0; |
| 264 | } |
| 265 | #endif |
| 266 | |
Rajesh Bhagat | f771678 | 2018-01-17 16:13:08 +0530 | [diff] [blame] | 267 | #if defined(CONFIG_VID) |
| 268 | __weak int init_func_vid(void) |
| 269 | { |
| 270 | return 0; |
| 271 | } |
| 272 | #endif |
| 273 | |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 274 | static int setup_mon_len(void) |
| 275 | { |
Michal Simek | 65e915c | 2014-05-08 16:08:44 +0200 | [diff] [blame] | 276 | #if defined(__ARM__) || defined(__MICROBLAZE__) |
Albert ARIBAUD | 6e29472 | 2014-02-22 17:53:43 +0100 | [diff] [blame] | 277 | gd->mon_len = (ulong)&__bss_end - (ulong)_start; |
Ben Stoltz | 1930e8d | 2015-07-31 09:31:37 -0600 | [diff] [blame] | 278 | #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP) |
Simon Glass | 62cf912 | 2013-04-26 02:53:43 +0000 | [diff] [blame] | 279 | gd->mon_len = (ulong)&_end - (ulong)_init; |
Tom Rini | 210ebce | 2017-03-14 11:08:10 -0400 | [diff] [blame] | 280 | #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA) |
Sonic Zhang | f503a52 | 2014-07-17 19:01:34 +0800 | [diff] [blame] | 281 | gd->mon_len = CONFIG_SYS_MONITOR_LEN; |
Rick Chen | 3301bfc | 2017-12-26 13:55:58 +0800 | [diff] [blame] | 282 | #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV) |
Kun-Hua Huang | 89299e2 | 2015-08-24 14:52:35 +0800 | [diff] [blame] | 283 | gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start); |
Simon Glass | 90632bd | 2016-05-14 18:49:28 -0600 | [diff] [blame] | 284 | #elif defined(CONFIG_SYS_MONITOR_BASE) |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 285 | /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ |
| 286 | gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; |
Simon Glass | 9c9f44a | 2013-03-11 07:06:48 +0000 | [diff] [blame] | 287 | #endif |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 288 | return 0; |
| 289 | } |
| 290 | |
Simon Glass | e14f1a2 | 2018-11-15 18:44:09 -0700 | [diff] [blame] | 291 | static int setup_spl_handoff(void) |
| 292 | { |
| 293 | #if CONFIG_IS_ENABLED(HANDOFF) |
| 294 | gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF, |
| 295 | sizeof(struct spl_handoff)); |
| 296 | debug("Found SPL hand-off info %p\n", gd->spl_handoff); |
| 297 | #endif |
| 298 | |
| 299 | return 0; |
| 300 | } |
| 301 | |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 302 | __weak int arch_cpu_init(void) |
| 303 | { |
| 304 | return 0; |
| 305 | } |
| 306 | |
Paul Burton | 1f508dd | 2016-09-21 11:18:46 +0100 | [diff] [blame] | 307 | __weak int mach_cpu_init(void) |
| 308 | { |
| 309 | return 0; |
| 310 | } |
| 311 | |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 312 | /* Get the top of usable RAM */ |
| 313 | __weak ulong board_get_usable_ram_top(ulong total_size) |
| 314 | { |
Heinrich Schuchardt | f6a18be | 2020-05-09 21:21:14 +0200 | [diff] [blame] | 315 | #if defined(CONFIG_SYS_SDRAM_BASE) && CONFIG_SYS_SDRAM_BASE > 0 |
Stephen Warren | 0ba4a8a | 2014-12-23 10:34:49 -0700 | [diff] [blame] | 316 | /* |
Simon Glass | 839855c | 2015-04-28 20:25:03 -0600 | [diff] [blame] | 317 | * Detect whether we have so much RAM that it goes past the end of our |
Stephen Warren | 0ba4a8a | 2014-12-23 10:34:49 -0700 | [diff] [blame] | 318 | * 32-bit address space. If so, clip the usable RAM so it doesn't. |
| 319 | */ |
| 320 | if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) |
| 321 | /* |
| 322 | * Will wrap back to top of 32-bit space when reservations |
| 323 | * are made. |
| 324 | */ |
| 325 | return 0; |
| 326 | #endif |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 327 | return gd->ram_top; |
| 328 | } |
| 329 | |
| 330 | static int setup_dest_addr(void) |
| 331 | { |
| 332 | debug("Monitor len: %08lX\n", gd->mon_len); |
| 333 | /* |
| 334 | * Ram is setup, size stored in gd !! |
| 335 | */ |
| 336 | debug("Ram size: %08lX\n", (ulong)gd->ram_size); |
York Sun | 4de24ef | 2017-03-06 09:02:28 -0800 | [diff] [blame] | 337 | #if defined(CONFIG_SYS_MEM_TOP_HIDE) |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 338 | /* |
| 339 | * Subtract specified amount of memory to hide so that it won't |
| 340 | * get "touched" at all by U-Boot. By fixing up gd->ram_size |
| 341 | * the Linux kernel should now get passed the now "corrected" |
York Sun | 4de24ef | 2017-03-06 09:02:28 -0800 | [diff] [blame] | 342 | * memory size and won't touch it either. This should work |
| 343 | * for arch/ppc and arch/powerpc. Only Linux board ports in |
| 344 | * arch/powerpc with bootwrapper support, that recalculate the |
| 345 | * memory size from the SDRAM controller setup will have to |
| 346 | * get fixed. |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 347 | */ |
York Sun | 4de24ef | 2017-03-06 09:02:28 -0800 | [diff] [blame] | 348 | gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; |
| 349 | #endif |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 350 | #ifdef CONFIG_SYS_SDRAM_BASE |
Siva Durga Prasad Paladugu | 94a1d52 | 2018-07-16 15:56:10 +0530 | [diff] [blame] | 351 | gd->ram_base = CONFIG_SYS_SDRAM_BASE; |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 352 | #endif |
Siva Durga Prasad Paladugu | 94a1d52 | 2018-07-16 15:56:10 +0530 | [diff] [blame] | 353 | gd->ram_top = gd->ram_base + get_effective_memsize(); |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 354 | gd->ram_top = board_get_usable_ram_top(gd->mon_len); |
Masahiro Yamada | d158924 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 355 | gd->relocaddr = gd->ram_top; |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 356 | debug("Ram top: %08lX\n", (ulong)gd->ram_top); |
Gabriel Huau | da0afc2 | 2014-09-03 13:57:54 -0700 | [diff] [blame] | 357 | #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 358 | /* |
| 359 | * We need to make sure the location we intend to put secondary core |
| 360 | * boot code is reserved and not used by any part of u-boot |
| 361 | */ |
Masahiro Yamada | d158924 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 362 | if (gd->relocaddr > determine_mp_bootpg(NULL)) { |
| 363 | gd->relocaddr = determine_mp_bootpg(NULL); |
| 364 | debug("Reserving MP boot page to %08lx\n", gd->relocaddr); |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 365 | } |
| 366 | #endif |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 367 | return 0; |
| 368 | } |
| 369 | |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 370 | #ifdef CONFIG_PRAM |
| 371 | /* reserve protected RAM */ |
| 372 | static int reserve_pram(void) |
| 373 | { |
| 374 | ulong reg; |
| 375 | |
Simon Glass | 22c34c2 | 2017-08-03 12:22:13 -0600 | [diff] [blame] | 376 | reg = env_get_ulong("pram", 10, CONFIG_PRAM); |
Masahiro Yamada | d158924 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 377 | gd->relocaddr -= (reg << 10); /* size is in kB */ |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 378 | debug("Reserving %ldk for protected RAM at %08lx\n", reg, |
Masahiro Yamada | d158924 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 379 | gd->relocaddr); |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 380 | return 0; |
| 381 | } |
| 382 | #endif /* CONFIG_PRAM */ |
| 383 | |
| 384 | /* Round memory pointer down to next 4 kB limit */ |
| 385 | static int reserve_round_4k(void) |
| 386 | { |
Masahiro Yamada | d158924 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 387 | gd->relocaddr &= ~(4096 - 1); |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 388 | return 0; |
| 389 | } |
| 390 | |
Ovidiu Panait | 2a2941b | 2020-03-29 20:57:41 +0300 | [diff] [blame] | 391 | __weak int arch_reserve_mmu(void) |
| 392 | { |
| 393 | return 0; |
| 394 | } |
| 395 | |
Simon Glass | fce58f5 | 2016-01-18 19:52:21 -0700 | [diff] [blame] | 396 | static int reserve_video(void) |
| 397 | { |
Simon Glass | 70ac86c | 2017-03-31 08:40:30 -0600 | [diff] [blame] | 398 | #ifdef CONFIG_DM_VIDEO |
Simon Glass | fce58f5 | 2016-01-18 19:52:21 -0700 | [diff] [blame] | 399 | ulong addr; |
| 400 | int ret; |
| 401 | |
| 402 | addr = gd->relocaddr; |
| 403 | ret = video_reserve(&addr); |
| 404 | if (ret) |
| 405 | return ret; |
| 406 | gd->relocaddr = addr; |
Simon Glass | 70ac86c | 2017-03-31 08:40:30 -0600 | [diff] [blame] | 407 | #elif defined(CONFIG_LCD) |
Simon Glass | fce58f5 | 2016-01-18 19:52:21 -0700 | [diff] [blame] | 408 | # ifdef CONFIG_FB_ADDR |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 409 | gd->fb_base = CONFIG_FB_ADDR; |
Simon Glass | fce58f5 | 2016-01-18 19:52:21 -0700 | [diff] [blame] | 410 | # else |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 411 | /* reserve memory for LCD display (always full pages) */ |
Masahiro Yamada | d158924 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 412 | gd->relocaddr = lcd_setmem(gd->relocaddr); |
| 413 | gd->fb_base = gd->relocaddr; |
Simon Glass | fce58f5 | 2016-01-18 19:52:21 -0700 | [diff] [blame] | 414 | # endif /* CONFIG_FB_ADDR */ |
Simon Glass | 70ac86c | 2017-03-31 08:40:30 -0600 | [diff] [blame] | 415 | #endif |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 416 | |
| 417 | return 0; |
| 418 | } |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 419 | |
Simon Glass | 1008da0 | 2016-01-18 19:52:20 -0700 | [diff] [blame] | 420 | static int reserve_trace(void) |
| 421 | { |
| 422 | #ifdef CONFIG_TRACE |
| 423 | gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; |
| 424 | gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); |
Heinrich Schuchardt | c960b14 | 2019-06-14 21:52:22 +0200 | [diff] [blame] | 425 | debug("Reserving %luk for trace data at: %08lx\n", |
| 426 | (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); |
Simon Glass | 1008da0 | 2016-01-18 19:52:20 -0700 | [diff] [blame] | 427 | #endif |
| 428 | |
| 429 | return 0; |
| 430 | } |
| 431 | |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 432 | static int reserve_uboot(void) |
| 433 | { |
Alexey Brodkin | c76af2a | 2018-05-25 16:08:14 +0300 | [diff] [blame] | 434 | if (!(gd->flags & GD_FLG_SKIP_RELOC)) { |
| 435 | /* |
| 436 | * reserve memory for U-Boot code, data & bss |
| 437 | * round down to next 4 kB limit |
| 438 | */ |
| 439 | gd->relocaddr -= gd->mon_len; |
| 440 | gd->relocaddr &= ~(4096 - 1); |
| 441 | #if defined(CONFIG_E500) || defined(CONFIG_MIPS) |
| 442 | /* round down to next 64 kB limit so that IVPR stays aligned */ |
| 443 | gd->relocaddr &= ~(65536 - 1); |
| 444 | #endif |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 445 | |
Alexey Brodkin | c76af2a | 2018-05-25 16:08:14 +0300 | [diff] [blame] | 446 | debug("Reserving %ldk for U-Boot at: %08lx\n", |
| 447 | gd->mon_len >> 10, gd->relocaddr); |
| 448 | } |
Masahiro Yamada | d158924 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 449 | |
| 450 | gd->start_addr_sp = gd->relocaddr; |
| 451 | |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 452 | return 0; |
| 453 | } |
| 454 | |
Patrick Delaunay | e177cbc | 2020-03-10 10:15:05 +0100 | [diff] [blame] | 455 | /* |
| 456 | * reserve after start_addr_sp the requested size and make the stack pointer |
| 457 | * 16-byte aligned, this alignment is needed for cast on the reserved memory |
| 458 | * ref = x86_64 ABI: https://reviews.llvm.org/D30049: 16 bytes |
| 459 | * = ARMv8 Instruction Set Overview: quad word, 16 bytes |
| 460 | */ |
| 461 | static unsigned long reserve_stack_aligned(size_t size) |
| 462 | { |
| 463 | return ALIGN_DOWN(gd->start_addr_sp - size, 16); |
| 464 | } |
| 465 | |
Vikas Manocha | 4d49e10 | 2019-08-16 09:57:44 -0700 | [diff] [blame] | 466 | #ifdef CONFIG_SYS_NONCACHED_MEMORY |
| 467 | static int reserve_noncached(void) |
| 468 | { |
Stephen Warren | 9b49643 | 2019-08-27 11:54:31 -0600 | [diff] [blame] | 469 | /* |
| 470 | * The value of gd->start_addr_sp must match the value of malloc_start |
| 471 | * calculated in boatrd_f.c:initr_malloc(), which is passed to |
| 472 | * board_r.c:mem_malloc_init() and then used by |
| 473 | * cache.c:noncached_init() |
| 474 | * |
| 475 | * These calculations must match the code in cache.c:noncached_init() |
| 476 | */ |
| 477 | gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) - |
| 478 | MMU_SECTION_SIZE; |
| 479 | gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY, |
| 480 | MMU_SECTION_SIZE); |
Vikas Manocha | 4d49e10 | 2019-08-16 09:57:44 -0700 | [diff] [blame] | 481 | debug("Reserving %dM for noncached_alloc() at: %08lx\n", |
| 482 | CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp); |
| 483 | |
| 484 | return 0; |
| 485 | } |
| 486 | #endif |
| 487 | |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 488 | /* reserve memory for malloc() area */ |
| 489 | static int reserve_malloc(void) |
| 490 | { |
Patrick Delaunay | e177cbc | 2020-03-10 10:15:05 +0100 | [diff] [blame] | 491 | gd->start_addr_sp = reserve_stack_aligned(TOTAL_MALLOC_LEN); |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 492 | debug("Reserving %dk for malloc() at: %08lx\n", |
Mario Six | 80b66dd | 2018-01-15 11:10:02 +0100 | [diff] [blame] | 493 | TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); |
Vikas Manocha | 4d49e10 | 2019-08-16 09:57:44 -0700 | [diff] [blame] | 494 | #ifdef CONFIG_SYS_NONCACHED_MEMORY |
| 495 | reserve_noncached(); |
| 496 | #endif |
| 497 | |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 498 | return 0; |
| 499 | } |
| 500 | |
| 501 | /* (permanently) allocate a Board Info struct */ |
| 502 | static int reserve_board(void) |
| 503 | { |
Sonic Zhang | f503a52 | 2014-07-17 19:01:34 +0800 | [diff] [blame] | 504 | if (!gd->bd) { |
Patrick Delaunay | e177cbc | 2020-03-10 10:15:05 +0100 | [diff] [blame] | 505 | gd->start_addr_sp = reserve_stack_aligned(sizeof(bd_t)); |
Sonic Zhang | f503a52 | 2014-07-17 19:01:34 +0800 | [diff] [blame] | 506 | gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); |
| 507 | memset(gd->bd, '\0', sizeof(bd_t)); |
| 508 | debug("Reserving %zu Bytes for Board Info at: %08lx\n", |
| 509 | sizeof(bd_t), gd->start_addr_sp); |
| 510 | } |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 511 | return 0; |
| 512 | } |
| 513 | |
| 514 | static int setup_machine(void) |
| 515 | { |
| 516 | #ifdef CONFIG_MACH_TYPE |
| 517 | gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ |
| 518 | #endif |
| 519 | return 0; |
| 520 | } |
| 521 | |
| 522 | static int reserve_global_data(void) |
| 523 | { |
Patrick Delaunay | e177cbc | 2020-03-10 10:15:05 +0100 | [diff] [blame] | 524 | gd->start_addr_sp = reserve_stack_aligned(sizeof(gd_t)); |
Masahiro Yamada | d158924 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 525 | gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 526 | debug("Reserving %zu Bytes for Global Data at: %08lx\n", |
Mario Six | 80b66dd | 2018-01-15 11:10:02 +0100 | [diff] [blame] | 527 | sizeof(gd_t), gd->start_addr_sp); |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 528 | return 0; |
| 529 | } |
| 530 | |
| 531 | static int reserve_fdt(void) |
| 532 | { |
Siva Durga Prasad Paladugu | abffd31 | 2015-12-03 15:46:03 +0100 | [diff] [blame] | 533 | #ifndef CONFIG_OF_EMBED |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 534 | /* |
Simon Glass | 839855c | 2015-04-28 20:25:03 -0600 | [diff] [blame] | 535 | * If the device tree is sitting immediately above our image then we |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 536 | * must relocate it. If it is embedded in the data section, then it |
| 537 | * will be relocated with other data. |
| 538 | */ |
| 539 | if (gd->fdt_blob) { |
Ashok Reddy Soma | 585ac8d | 2020-04-06 07:58:30 -0600 | [diff] [blame] | 540 | gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob), 32); |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 541 | |
Patrick Delaunay | e177cbc | 2020-03-10 10:15:05 +0100 | [diff] [blame] | 542 | gd->start_addr_sp = reserve_stack_aligned(gd->fdt_size); |
Masahiro Yamada | d158924 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 543 | gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); |
Simon Glass | 62cf912 | 2013-04-26 02:53:43 +0000 | [diff] [blame] | 544 | debug("Reserving %lu Bytes for FDT at: %08lx\n", |
Masahiro Yamada | d158924 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 545 | gd->fdt_size, gd->start_addr_sp); |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 546 | } |
Siva Durga Prasad Paladugu | abffd31 | 2015-12-03 15:46:03 +0100 | [diff] [blame] | 547 | #endif |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 548 | |
| 549 | return 0; |
| 550 | } |
| 551 | |
Simon Glass | b9aff92 | 2017-05-22 05:05:30 -0600 | [diff] [blame] | 552 | static int reserve_bootstage(void) |
| 553 | { |
| 554 | #ifdef CONFIG_BOOTSTAGE |
| 555 | int size = bootstage_get_size(); |
| 556 | |
Patrick Delaunay | e177cbc | 2020-03-10 10:15:05 +0100 | [diff] [blame] | 557 | gd->start_addr_sp = reserve_stack_aligned(size); |
Simon Glass | b9aff92 | 2017-05-22 05:05:30 -0600 | [diff] [blame] | 558 | gd->new_bootstage = map_sysmem(gd->start_addr_sp, size); |
| 559 | debug("Reserving %#x Bytes for bootstage at: %08lx\n", size, |
| 560 | gd->start_addr_sp); |
| 561 | #endif |
| 562 | |
| 563 | return 0; |
| 564 | } |
| 565 | |
Patrick Delaunay | a0a2b21 | 2018-03-13 13:57:00 +0100 | [diff] [blame] | 566 | __weak int arch_reserve_stacks(void) |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 567 | { |
Andreas Bießmann | 2542986 | 2015-02-06 23:06:45 +0100 | [diff] [blame] | 568 | return 0; |
| 569 | } |
Simon Glass | 4d2aee8 | 2013-03-05 14:39:45 +0000 | [diff] [blame] | 570 | |
Andreas Bießmann | 2542986 | 2015-02-06 23:06:45 +0100 | [diff] [blame] | 571 | static int reserve_stacks(void) |
| 572 | { |
| 573 | /* make stack pointer 16-byte aligned */ |
Patrick Delaunay | e177cbc | 2020-03-10 10:15:05 +0100 | [diff] [blame] | 574 | gd->start_addr_sp = reserve_stack_aligned(16); |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 575 | |
| 576 | /* |
Simon Glass | 839855c | 2015-04-28 20:25:03 -0600 | [diff] [blame] | 577 | * let the architecture-specific code tailor gd->start_addr_sp and |
Andreas Bießmann | 2542986 | 2015-02-06 23:06:45 +0100 | [diff] [blame] | 578 | * gd->irq_sp |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 579 | */ |
Andreas Bießmann | 2542986 | 2015-02-06 23:06:45 +0100 | [diff] [blame] | 580 | return arch_reserve_stacks(); |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 581 | } |
| 582 | |
Simon Glass | a815dab | 2018-11-15 18:43:52 -0700 | [diff] [blame] | 583 | static int reserve_bloblist(void) |
| 584 | { |
| 585 | #ifdef CONFIG_BLOBLIST |
Patrick Delaunay | e177cbc | 2020-03-10 10:15:05 +0100 | [diff] [blame] | 586 | gd->start_addr_sp = reserve_stack_aligned(CONFIG_BLOBLIST_SIZE); |
Simon Glass | a815dab | 2018-11-15 18:43:52 -0700 | [diff] [blame] | 587 | gd->new_bloblist = map_sysmem(gd->start_addr_sp, CONFIG_BLOBLIST_SIZE); |
| 588 | #endif |
| 589 | |
| 590 | return 0; |
| 591 | } |
| 592 | |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 593 | static int display_new_sp(void) |
| 594 | { |
Masahiro Yamada | d158924 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 595 | debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 596 | |
| 597 | return 0; |
| 598 | } |
| 599 | |
Vladimir Zapolskiy | 67fa10d | 2016-11-28 00:15:24 +0200 | [diff] [blame] | 600 | #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ |
| 601 | defined(CONFIG_SH) |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 602 | static int setup_board_part1(void) |
| 603 | { |
| 604 | bd_t *bd = gd->bd; |
| 605 | |
| 606 | /* |
| 607 | * Save local variables to board info struct |
| 608 | */ |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 609 | bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ |
| 610 | bd->bi_memsize = gd->ram_size; /* size in bytes */ |
| 611 | |
| 612 | #ifdef CONFIG_SYS_SRAM_BASE |
| 613 | bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ |
| 614 | bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ |
| 615 | #endif |
| 616 | |
Heiko Schocher | d4def9b | 2017-06-07 17:33:11 +0200 | [diff] [blame] | 617 | #if defined(CONFIG_E500) || defined(CONFIG_MPC86xx) |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 618 | bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ |
| 619 | #endif |
Heiko Schocher | 6f90e58 | 2017-06-14 05:49:40 +0200 | [diff] [blame] | 620 | #if defined(CONFIG_M68K) |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 621 | bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ |
| 622 | #endif |
| 623 | #if defined(CONFIG_MPC83xx) |
| 624 | bd->bi_immrbar = CONFIG_SYS_IMMR; |
| 625 | #endif |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 626 | |
| 627 | return 0; |
| 628 | } |
Daniel Schwierzeck | bb08b0b | 2015-11-01 17:36:13 +0100 | [diff] [blame] | 629 | #endif |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 630 | |
Daniel Schwierzeck | bb08b0b | 2015-11-01 17:36:13 +0100 | [diff] [blame] | 631 | #if defined(CONFIG_PPC) || defined(CONFIG_M68K) |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 632 | static int setup_board_part2(void) |
| 633 | { |
| 634 | bd_t *bd = gd->bd; |
| 635 | |
| 636 | bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ |
| 637 | bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ |
| 638 | #if defined(CONFIG_CPM2) |
| 639 | bd->bi_cpmfreq = gd->arch.cpm_clk; |
| 640 | bd->bi_brgfreq = gd->arch.brg_clk; |
| 641 | bd->bi_sccfreq = gd->arch.scc_clk; |
| 642 | bd->bi_vco = gd->arch.vco_out; |
| 643 | #endif /* CONFIG_CPM2 */ |
Alison Wang | 8f6d8f3 | 2015-02-12 18:33:15 +0800 | [diff] [blame] | 644 | #if defined(CONFIG_M68K) && defined(CONFIG_PCI) |
| 645 | bd->bi_pcifreq = gd->pci_clk; |
| 646 | #endif |
| 647 | #if defined(CONFIG_EXTRA_CLOCK) |
| 648 | bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */ |
| 649 | bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */ |
| 650 | bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */ |
| 651 | #endif |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 652 | |
| 653 | return 0; |
| 654 | } |
| 655 | #endif |
| 656 | |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 657 | #ifdef CONFIG_POST |
| 658 | static int init_post(void) |
| 659 | { |
| 660 | post_bootmode_init(); |
| 661 | post_run(NULL, POST_ROM | post_bootmode_get(0)); |
| 662 | |
| 663 | return 0; |
| 664 | } |
| 665 | #endif |
| 666 | |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 667 | static int reloc_fdt(void) |
| 668 | { |
Siva Durga Prasad Paladugu | abffd31 | 2015-12-03 15:46:03 +0100 | [diff] [blame] | 669 | #ifndef CONFIG_OF_EMBED |
Simon Glass | 00dd17a | 2015-08-04 12:33:39 -0600 | [diff] [blame] | 670 | if (gd->flags & GD_FLG_SKIP_RELOC) |
| 671 | return 0; |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 672 | if (gd->new_fdt) { |
Oleksandr Andrushchenko | 86dde17 | 2020-06-19 11:22:18 +0300 | [diff] [blame] | 673 | memcpy(gd->new_fdt, gd->fdt_blob, fdt_totalsize(gd->fdt_blob)); |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 674 | gd->fdt_blob = gd->new_fdt; |
| 675 | } |
Siva Durga Prasad Paladugu | abffd31 | 2015-12-03 15:46:03 +0100 | [diff] [blame] | 676 | #endif |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 677 | |
| 678 | return 0; |
| 679 | } |
| 680 | |
Simon Glass | b9aff92 | 2017-05-22 05:05:30 -0600 | [diff] [blame] | 681 | static int reloc_bootstage(void) |
| 682 | { |
| 683 | #ifdef CONFIG_BOOTSTAGE |
| 684 | if (gd->flags & GD_FLG_SKIP_RELOC) |
| 685 | return 0; |
| 686 | if (gd->new_bootstage) { |
| 687 | int size = bootstage_get_size(); |
| 688 | |
| 689 | debug("Copying bootstage from %p to %p, size %x\n", |
| 690 | gd->bootstage, gd->new_bootstage, size); |
| 691 | memcpy(gd->new_bootstage, gd->bootstage, size); |
| 692 | gd->bootstage = gd->new_bootstage; |
Simon Glass | 39d5852 | 2019-10-21 17:26:50 -0600 | [diff] [blame] | 693 | bootstage_relocate(); |
Simon Glass | b9aff92 | 2017-05-22 05:05:30 -0600 | [diff] [blame] | 694 | } |
| 695 | #endif |
| 696 | |
| 697 | return 0; |
| 698 | } |
| 699 | |
Simon Glass | a815dab | 2018-11-15 18:43:52 -0700 | [diff] [blame] | 700 | static int reloc_bloblist(void) |
| 701 | { |
| 702 | #ifdef CONFIG_BLOBLIST |
| 703 | if (gd->flags & GD_FLG_SKIP_RELOC) |
| 704 | return 0; |
| 705 | if (gd->new_bloblist) { |
| 706 | int size = CONFIG_BLOBLIST_SIZE; |
| 707 | |
| 708 | debug("Copying bloblist from %p to %p, size %x\n", |
| 709 | gd->bloblist, gd->new_bloblist, size); |
| 710 | memcpy(gd->new_bloblist, gd->bloblist, size); |
| 711 | gd->bloblist = gd->new_bloblist; |
| 712 | } |
| 713 | #endif |
| 714 | |
| 715 | return 0; |
| 716 | } |
| 717 | |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 718 | static int setup_reloc(void) |
| 719 | { |
Simon Glass | 00dd17a | 2015-08-04 12:33:39 -0600 | [diff] [blame] | 720 | if (gd->flags & GD_FLG_SKIP_RELOC) { |
| 721 | debug("Skipping relocation due to flag\n"); |
| 722 | return 0; |
| 723 | } |
| 724 | |
Sonic Zhang | f503a52 | 2014-07-17 19:01:34 +0800 | [diff] [blame] | 725 | #ifdef CONFIG_SYS_TEXT_BASE |
Lothar Waßmann | 160583b | 2017-06-08 10:18:25 +0200 | [diff] [blame] | 726 | #ifdef ARM |
| 727 | gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start; |
| 728 | #elif defined(CONFIG_M68K) |
angelo@sysam.it | f245ae9 | 2015-02-12 01:40:17 +0100 | [diff] [blame] | 729 | /* |
| 730 | * On all ColdFire arch cpu, monitor code starts always |
| 731 | * just after the default vector table location, so at 0x400 |
| 732 | */ |
| 733 | gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400); |
Simon Glass | 752707a | 2019-04-08 13:20:41 -0600 | [diff] [blame] | 734 | #elif !defined(CONFIG_SANDBOX) |
Lothar Waßmann | 160583b | 2017-06-08 10:18:25 +0200 | [diff] [blame] | 735 | gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; |
angelo@sysam.it | f245ae9 | 2015-02-12 01:40:17 +0100 | [diff] [blame] | 736 | #endif |
Sonic Zhang | f503a52 | 2014-07-17 19:01:34 +0800 | [diff] [blame] | 737 | #endif |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 738 | memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); |
| 739 | |
| 740 | debug("Relocation Offset is: %08lx\n", gd->reloc_off); |
Simon Glass | 62cf912 | 2013-04-26 02:53:43 +0000 | [diff] [blame] | 741 | debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", |
Masahiro Yamada | d158924 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 742 | gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), |
| 743 | gd->start_addr_sp); |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 744 | |
| 745 | return 0; |
| 746 | } |
| 747 | |
mario.six@gdsys.cc | 7e9b9d6 | 2017-02-22 16:07:22 +0100 | [diff] [blame] | 748 | #ifdef CONFIG_OF_BOARD_FIXUP |
| 749 | static int fix_fdt(void) |
| 750 | { |
| 751 | return board_fix_fdt((void *)gd->fdt_blob); |
| 752 | } |
| 753 | #endif |
| 754 | |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 755 | /* ARM calls relocate_code from its crt0.S */ |
Simon Glass | 6e1a81a | 2017-01-16 07:03:49 -0700 | [diff] [blame] | 756 | #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ |
| 757 | !CONFIG_IS_ENABLED(X86_64) |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 758 | |
| 759 | static int jump_to_copy(void) |
| 760 | { |
Simon Glass | 00dd17a | 2015-08-04 12:33:39 -0600 | [diff] [blame] | 761 | if (gd->flags & GD_FLG_SKIP_RELOC) |
| 762 | return 0; |
Simon Glass | 6d17987 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 763 | /* |
| 764 | * x86 is special, but in a nice way. It uses a trampoline which |
| 765 | * enables the dcache if possible. |
| 766 | * |
| 767 | * For now, other archs use relocate_code(), which is implemented |
| 768 | * similarly for all archs. When we do generic relocation, hopefully |
| 769 | * we can make all archs enable the dcache prior to relocation. |
| 770 | */ |
Alexey Brodkin | 913e9f0 | 2015-02-24 19:40:36 +0300 | [diff] [blame] | 771 | #if defined(CONFIG_X86) || defined(CONFIG_ARC) |
Simon Glass | 6d17987 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 772 | /* |
| 773 | * SDRAM and console are now initialised. The final stack can now |
| 774 | * be setup in SDRAM. Code execution will continue in Flash, but |
| 775 | * with the stack in SDRAM and Global Data in temporary memory |
| 776 | * (CPU cache) |
| 777 | */ |
Simon Glass | 0e27b87 | 2015-08-10 20:44:32 -0600 | [diff] [blame] | 778 | arch_setup_gd(gd->new_gd); |
Simon Glass | 6d17987 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 779 | board_init_f_r_trampoline(gd->start_addr_sp); |
| 780 | #else |
Masahiro Yamada | d158924 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 781 | relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); |
Simon Glass | 6d17987 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 782 | #endif |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 783 | |
| 784 | return 0; |
| 785 | } |
| 786 | #endif |
| 787 | |
| 788 | /* Record the board_init_f() bootstage (after arch_cpu_init()) */ |
Simon Glass | 8820033 | 2017-05-22 05:05:25 -0600 | [diff] [blame] | 789 | static int initf_bootstage(void) |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 790 | { |
Simon Glass | c55d5c3 | 2017-06-07 10:28:46 -0600 | [diff] [blame] | 791 | bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) && |
| 792 | IS_ENABLED(CONFIG_BOOTSTAGE_STASH); |
Simon Glass | 8820033 | 2017-05-22 05:05:25 -0600 | [diff] [blame] | 793 | int ret; |
| 794 | |
Simon Glass | 01154cb | 2017-05-22 05:05:35 -0600 | [diff] [blame] | 795 | ret = bootstage_init(!from_spl); |
Simon Glass | 8820033 | 2017-05-22 05:05:25 -0600 | [diff] [blame] | 796 | if (ret) |
| 797 | return ret; |
Simon Glass | 01154cb | 2017-05-22 05:05:35 -0600 | [diff] [blame] | 798 | if (from_spl) { |
| 799 | const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR, |
| 800 | CONFIG_BOOTSTAGE_STASH_SIZE); |
| 801 | |
| 802 | ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE); |
| 803 | if (ret && ret != -ENOENT) { |
| 804 | debug("Failed to unstash bootstage: err=%d\n", ret); |
| 805 | return ret; |
| 806 | } |
| 807 | } |
Simon Glass | 8820033 | 2017-05-22 05:05:25 -0600 | [diff] [blame] | 808 | |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 809 | bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); |
| 810 | |
| 811 | return 0; |
| 812 | } |
| 813 | |
Simon Glass | 1bb4923 | 2015-11-08 23:47:48 -0700 | [diff] [blame] | 814 | static int initf_console_record(void) |
| 815 | { |
Andy Yan | 1fa20e4d | 2017-07-24 17:43:34 +0800 | [diff] [blame] | 816 | #if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN) |
Simon Glass | 1bb4923 | 2015-11-08 23:47:48 -0700 | [diff] [blame] | 817 | return console_record_init(); |
| 818 | #else |
| 819 | return 0; |
| 820 | #endif |
| 821 | } |
| 822 | |
Simon Glass | a730c5d | 2014-07-23 06:55:04 -0600 | [diff] [blame] | 823 | static int initf_dm(void) |
| 824 | { |
Andy Yan | 1fa20e4d | 2017-07-24 17:43:34 +0800 | [diff] [blame] | 825 | #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN) |
Simon Glass | a730c5d | 2014-07-23 06:55:04 -0600 | [diff] [blame] | 826 | int ret; |
| 827 | |
Simon Glass | ea6a609 | 2020-05-10 11:39:59 -0600 | [diff] [blame] | 828 | bootstage_start(BOOTSTAGE_ID_ACCUM_DM_F, "dm_f"); |
Simon Glass | a730c5d | 2014-07-23 06:55:04 -0600 | [diff] [blame] | 829 | ret = dm_init_and_scan(true); |
Simon Glass | ea6a609 | 2020-05-10 11:39:59 -0600 | [diff] [blame] | 830 | bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F); |
Simon Glass | a730c5d | 2014-07-23 06:55:04 -0600 | [diff] [blame] | 831 | if (ret) |
| 832 | return ret; |
| 833 | #endif |
Simon Glass | 8e4f80f | 2016-02-24 09:14:50 -0700 | [diff] [blame] | 834 | #ifdef CONFIG_TIMER_EARLY |
| 835 | ret = dm_timer_init(); |
| 836 | if (ret) |
| 837 | return ret; |
| 838 | #endif |
Simon Glass | a730c5d | 2014-07-23 06:55:04 -0600 | [diff] [blame] | 839 | |
| 840 | return 0; |
| 841 | } |
| 842 | |
Simon Glass | 5ded7e5 | 2015-01-19 22:16:12 -0700 | [diff] [blame] | 843 | /* Architecture-specific memory reservation */ |
| 844 | __weak int reserve_arch(void) |
| 845 | { |
| 846 | return 0; |
| 847 | } |
| 848 | |
Simon Glass | 7af8d05 | 2015-03-05 12:25:16 -0700 | [diff] [blame] | 849 | __weak int arch_cpu_init_dm(void) |
| 850 | { |
| 851 | return 0; |
| 852 | } |
| 853 | |
Ovidiu Panait | 8e0319f | 2020-01-22 22:28:25 +0200 | [diff] [blame] | 854 | __weak int checkcpu(void) |
| 855 | { |
| 856 | return 0; |
| 857 | } |
| 858 | |
Ovidiu Panait | c508b27 | 2020-02-05 08:54:42 +0200 | [diff] [blame] | 859 | __weak int clear_bss(void) |
| 860 | { |
| 861 | return 0; |
| 862 | } |
| 863 | |
Simon Glass | 2031fad | 2017-01-16 07:03:50 -0700 | [diff] [blame] | 864 | static const init_fnc_t init_sequence_f[] = { |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 865 | setup_mon_len, |
Simon Glass | 26b78b2 | 2015-02-27 22:06:34 -0700 | [diff] [blame] | 866 | #ifdef CONFIG_OF_CONTROL |
Simon Glass | a087767 | 2015-02-27 22:06:35 -0700 | [diff] [blame] | 867 | fdtdec_setup, |
Simon Glass | 26b78b2 | 2015-02-27 22:06:34 -0700 | [diff] [blame] | 868 | #endif |
Heinrich Schuchardt | 2aecfc5 | 2019-06-02 00:53:24 +0200 | [diff] [blame] | 869 | #ifdef CONFIG_TRACE_EARLY |
Simon Glass | 209a1a6 | 2013-06-11 11:14:42 -0700 | [diff] [blame] | 870 | trace_early_init, |
Kevin Hilman | 676f019 | 2014-12-09 15:03:58 -0800 | [diff] [blame] | 871 | #endif |
Simon Glass | cfcb886 | 2014-11-10 18:00:18 -0700 | [diff] [blame] | 872 | initf_malloc, |
Simon Glass | 55e32ba | 2017-12-04 13:48:28 -0700 | [diff] [blame] | 873 | log_init, |
Simon Glass | e635af1 | 2017-05-22 05:05:31 -0600 | [diff] [blame] | 874 | initf_bootstage, /* uses its own timer, so does not need DM */ |
Simon Glass | a815dab | 2018-11-15 18:43:52 -0700 | [diff] [blame] | 875 | #ifdef CONFIG_BLOBLIST |
| 876 | bloblist_init, |
| 877 | #endif |
Simon Glass | e14f1a2 | 2018-11-15 18:44:09 -0700 | [diff] [blame] | 878 | setup_spl_handoff, |
Simon Glass | 1bb4923 | 2015-11-08 23:47:48 -0700 | [diff] [blame] | 879 | initf_console_record, |
Simon Glass | 295c423 | 2017-03-28 10:27:18 -0600 | [diff] [blame] | 880 | #if defined(CONFIG_HAVE_FSP) |
| 881 | arch_fsp_init, |
Bin Meng | 178f897 | 2015-08-20 06:40:18 -0700 | [diff] [blame] | 882 | #endif |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 883 | arch_cpu_init, /* basic arch cpu dependent setup */ |
Paul Burton | 1f508dd | 2016-09-21 11:18:46 +0100 | [diff] [blame] | 884 | mach_cpu_init, /* SoC/machine dependent CPU setup */ |
Simon Glass | 6df5de2 | 2014-09-03 17:36:59 -0600 | [diff] [blame] | 885 | initf_dm, |
Simon Glass | 7af8d05 | 2015-03-05 12:25:16 -0700 | [diff] [blame] | 886 | arch_cpu_init_dm, |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 887 | #if defined(CONFIG_BOARD_EARLY_INIT_F) |
| 888 | board_early_init_f, |
| 889 | #endif |
Simon Glass | 6829d8c | 2017-03-28 10:27:26 -0600 | [diff] [blame] | 890 | #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K) |
Simon Glass | 70064a7 | 2017-03-28 10:27:19 -0600 | [diff] [blame] | 891 | /* get CPU and bus clocks according to the environment variable */ |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 892 | get_clocks, /* get CPU and bus clocks (etc.) */ |
Simon Glass | e8d20d4 | 2017-03-28 10:27:23 -0600 | [diff] [blame] | 893 | #endif |
Angelo Dureghello | cd22685 | 2017-05-10 23:58:06 +0200 | [diff] [blame] | 894 | #if !defined(CONFIG_M68K) |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 895 | timer_init, /* initialize timer */ |
Angelo Dureghello | cd22685 | 2017-05-10 23:58:06 +0200 | [diff] [blame] | 896 | #endif |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 897 | #if defined(CONFIG_BOARD_POSTCLK_INIT) |
| 898 | board_postclk_init, |
| 899 | #endif |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 900 | env_init, /* initialize environment */ |
| 901 | init_baud_rate, /* initialze baudrate settings */ |
| 902 | serial_init, /* serial communications setup */ |
| 903 | console_init_f, /* stage 1 init of console */ |
| 904 | display_options, /* say that we are here */ |
| 905 | display_text_info, /* show debugging info if required */ |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 906 | checkcpu, |
Mario Six | 4481a5d | 2018-08-06 10:23:34 +0200 | [diff] [blame] | 907 | #if defined(CONFIG_SYSRESET) |
| 908 | print_resetinfo, |
| 909 | #endif |
Simon Glass | 68c1d01 | 2017-01-23 13:31:25 -0700 | [diff] [blame] | 910 | #if defined(CONFIG_DISPLAY_CPUINFO) |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 911 | print_cpuinfo, /* display cpu info (and speed) */ |
Simon Glass | 68c1d01 | 2017-01-23 13:31:25 -0700 | [diff] [blame] | 912 | #endif |
Cooper Jr., Franklin | d8b354a | 2017-06-16 17:25:12 -0500 | [diff] [blame] | 913 | #if defined(CONFIG_DTB_RESELECT) |
| 914 | embedded_dtb_select, |
| 915 | #endif |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 916 | #if defined(CONFIG_DISPLAY_BOARDINFO) |
Masahiro Yamada | 9607f7a | 2015-01-14 17:07:05 +0900 | [diff] [blame] | 917 | show_board_info, |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 918 | #endif |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 919 | INIT_FUNC_WATCHDOG_INIT |
| 920 | #if defined(CONFIG_MISC_INIT_F) |
| 921 | misc_init_f, |
| 922 | #endif |
| 923 | INIT_FUNC_WATCHDOG_RESET |
Simon Glass | 1a46a72 | 2017-05-12 21:09:56 -0600 | [diff] [blame] | 924 | #if defined(CONFIG_SYS_I2C) |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 925 | init_func_i2c, |
| 926 | #endif |
Rajesh Bhagat | f771678 | 2018-01-17 16:13:08 +0530 | [diff] [blame] | 927 | #if defined(CONFIG_VID) && !defined(CONFIG_SPL) |
| 928 | init_func_vid, |
| 929 | #endif |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 930 | announce_dram_init, |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 931 | dram_init, /* configure available RAM banks */ |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 932 | #ifdef CONFIG_POST |
| 933 | post_init_f, |
| 934 | #endif |
| 935 | INIT_FUNC_WATCHDOG_RESET |
| 936 | #if defined(CONFIG_SYS_DRAM_TEST) |
| 937 | testdram, |
| 938 | #endif /* CONFIG_SYS_DRAM_TEST */ |
| 939 | INIT_FUNC_WATCHDOG_RESET |
| 940 | |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 941 | #ifdef CONFIG_POST |
| 942 | init_post, |
| 943 | #endif |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 944 | INIT_FUNC_WATCHDOG_RESET |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 945 | /* |
| 946 | * Now that we have DRAM mapped and working, we can |
| 947 | * relocate the code and continue running from DRAM. |
| 948 | * |
| 949 | * Reserve memory at end of RAM for (top down in that order): |
| 950 | * - area that won't get touched by U-Boot and Linux (optional) |
| 951 | * - kernel log buffer |
| 952 | * - protected RAM |
| 953 | * - LCD framebuffer |
| 954 | * - monitor code |
| 955 | * - board info struct |
| 956 | */ |
| 957 | setup_dest_addr, |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 958 | #ifdef CONFIG_PRAM |
| 959 | reserve_pram, |
| 960 | #endif |
| 961 | reserve_round_4k, |
Ovidiu Panait | 2a2941b | 2020-03-29 20:57:41 +0300 | [diff] [blame] | 962 | arch_reserve_mmu, |
Simon Glass | fce58f5 | 2016-01-18 19:52:21 -0700 | [diff] [blame] | 963 | reserve_video, |
Simon Glass | 1008da0 | 2016-01-18 19:52:20 -0700 | [diff] [blame] | 964 | reserve_trace, |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 965 | reserve_uboot, |
| 966 | reserve_malloc, |
| 967 | reserve_board, |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 968 | setup_machine, |
| 969 | reserve_global_data, |
| 970 | reserve_fdt, |
Simon Glass | b9aff92 | 2017-05-22 05:05:30 -0600 | [diff] [blame] | 971 | reserve_bootstage, |
Simon Glass | a815dab | 2018-11-15 18:43:52 -0700 | [diff] [blame] | 972 | reserve_bloblist, |
Simon Glass | 5ded7e5 | 2015-01-19 22:16:12 -0700 | [diff] [blame] | 973 | reserve_arch, |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 974 | reserve_stacks, |
Simon Glass | 2f949c3 | 2017-03-31 08:40:32 -0600 | [diff] [blame] | 975 | dram_init_banksize, |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 976 | show_dram_config, |
Vladimir Zapolskiy | 67fa10d | 2016-11-28 00:15:24 +0200 | [diff] [blame] | 977 | #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ |
| 978 | defined(CONFIG_SH) |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 979 | setup_board_part1, |
Daniel Schwierzeck | bb08b0b | 2015-11-01 17:36:13 +0100 | [diff] [blame] | 980 | #endif |
| 981 | #if defined(CONFIG_PPC) || defined(CONFIG_M68K) |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 982 | INIT_FUNC_WATCHDOG_RESET |
| 983 | setup_board_part2, |
| 984 | #endif |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 985 | display_new_sp, |
mario.six@gdsys.cc | 7e9b9d6 | 2017-02-22 16:07:22 +0100 | [diff] [blame] | 986 | #ifdef CONFIG_OF_BOARD_FIXUP |
| 987 | fix_fdt, |
| 988 | #endif |
Simon Glass | 50250b5 | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 989 | INIT_FUNC_WATCHDOG_RESET |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 990 | reloc_fdt, |
Simon Glass | b9aff92 | 2017-05-22 05:05:30 -0600 | [diff] [blame] | 991 | reloc_bootstage, |
Simon Glass | a815dab | 2018-11-15 18:43:52 -0700 | [diff] [blame] | 992 | reloc_bloblist, |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 993 | setup_reloc, |
Alexey Brodkin | 913e9f0 | 2015-02-24 19:40:36 +0300 | [diff] [blame] | 994 | #if defined(CONFIG_X86) || defined(CONFIG_ARC) |
Simon Glass | d50b2f4 | 2015-01-01 16:18:09 -0700 | [diff] [blame] | 995 | copy_uboot_to_ram, |
Simon Glass | d50b2f4 | 2015-01-01 16:18:09 -0700 | [diff] [blame] | 996 | do_elf_reloc_fixups, |
| 997 | #endif |
Chris Zankel | 41e3737 | 2016-08-10 18:36:43 +0300 | [diff] [blame] | 998 | clear_bss, |
Simon Glass | 6e1a81a | 2017-01-16 07:03:49 -0700 | [diff] [blame] | 999 | #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ |
| 1000 | !CONFIG_IS_ENABLED(X86_64) |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 1001 | jump_to_copy, |
| 1002 | #endif |
| 1003 | NULL, |
| 1004 | }; |
| 1005 | |
| 1006 | void board_init_f(ulong boot_flags) |
| 1007 | { |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 1008 | gd->flags = boot_flags; |
Alexey Brodkin | 0723691 | 2013-11-27 22:32:40 +0400 | [diff] [blame] | 1009 | gd->have_console = 0; |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 1010 | |
| 1011 | if (initcall_run_list(init_sequence_f)) |
| 1012 | hang(); |
| 1013 | |
Ben Stoltz | 1930e8d | 2015-07-31 09:31:37 -0600 | [diff] [blame] | 1014 | #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ |
Alexey Brodkin | c157ab9 | 2015-12-16 19:24:10 +0300 | [diff] [blame] | 1015 | !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \ |
| 1016 | !defined(CONFIG_ARC) |
Simon Glass | c45e359 | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 1017 | /* NOTREACHED - jump_to_copy() does not return */ |
| 1018 | hang(); |
| 1019 | #endif |
| 1020 | } |
Simon Glass | 6d17987 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 1021 | |
Alexey Brodkin | 913e9f0 | 2015-02-24 19:40:36 +0300 | [diff] [blame] | 1022 | #if defined(CONFIG_X86) || defined(CONFIG_ARC) |
Simon Glass | 6d17987 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 1023 | /* |
| 1024 | * For now this code is only used on x86. |
| 1025 | * |
| 1026 | * init_sequence_f_r is the list of init functions which are run when |
| 1027 | * U-Boot is executing from Flash with a semi-limited 'C' environment. |
| 1028 | * The following limitations must be considered when implementing an |
| 1029 | * '_f_r' function: |
| 1030 | * - 'static' variables are read-only |
| 1031 | * - Global Data (gd->xxx) is read/write |
| 1032 | * |
| 1033 | * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if |
| 1034 | * supported). It _should_, if possible, copy global data to RAM and |
| 1035 | * initialise the CPU caches (to speed up the relocation process) |
| 1036 | * |
| 1037 | * NOTE: At present only x86 uses this route, but it is intended that |
| 1038 | * all archs will move to this when generic relocation is implemented. |
| 1039 | */ |
Simon Glass | 2031fad | 2017-01-16 07:03:50 -0700 | [diff] [blame] | 1040 | static const init_fnc_t init_sequence_f_r[] = { |
Simon Glass | 6e1a81a | 2017-01-16 07:03:49 -0700 | [diff] [blame] | 1041 | #if !CONFIG_IS_ENABLED(X86_64) |
Simon Glass | 6d17987 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 1042 | init_cache_f_r, |
Simon Glass | 6e1a81a | 2017-01-16 07:03:49 -0700 | [diff] [blame] | 1043 | #endif |
Simon Glass | 6d17987 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 1044 | |
| 1045 | NULL, |
| 1046 | }; |
| 1047 | |
| 1048 | void board_init_f_r(void) |
| 1049 | { |
| 1050 | if (initcall_run_list(init_sequence_f_r)) |
| 1051 | hang(); |
| 1052 | |
| 1053 | /* |
Simon Glass | 51f73f1 | 2016-03-11 22:06:51 -0700 | [diff] [blame] | 1054 | * The pre-relocation drivers may be using memory that has now gone |
| 1055 | * away. Mark serial as unavailable - this will fall back to the debug |
| 1056 | * UART if available. |
Simon Glass | 55e32ba | 2017-12-04 13:48:28 -0700 | [diff] [blame] | 1057 | * |
| 1058 | * Do the same with log drivers since the memory may not be available. |
Simon Glass | 51f73f1 | 2016-03-11 22:06:51 -0700 | [diff] [blame] | 1059 | */ |
Simon Glass | 55e32ba | 2017-12-04 13:48:28 -0700 | [diff] [blame] | 1060 | gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY); |
Simon Glass | b77fe1f | 2017-09-05 19:49:45 -0600 | [diff] [blame] | 1061 | #ifdef CONFIG_TIMER |
| 1062 | gd->timer = NULL; |
| 1063 | #endif |
Simon Glass | 51f73f1 | 2016-03-11 22:06:51 -0700 | [diff] [blame] | 1064 | |
| 1065 | /* |
Simon Glass | 6d17987 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 1066 | * U-Boot has been copied into SDRAM, the BSS has been cleared etc. |
| 1067 | * Transfer execution from Flash to RAM by calculating the address |
| 1068 | * of the in-RAM copy of board_init_r() and calling it |
| 1069 | */ |
Alexey Brodkin | 9c832f1 | 2015-02-25 17:59:02 +0300 | [diff] [blame] | 1070 | (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr); |
Simon Glass | 6d17987 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 1071 | |
| 1072 | /* NOTREACHED - board_init_r() does not return */ |
| 1073 | hang(); |
| 1074 | } |
Alexey Brodkin | 7350318 | 2015-03-24 11:12:47 +0300 | [diff] [blame] | 1075 | #endif /* CONFIG_X86 */ |