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Masahiro Yamada73a5b1a2014-08-31 07:10:56 +09001if TEGRA
2
Simon Glass0bdfc3e2016-09-12 23:18:39 -06003config SPL_GPIO_SUPPORT
4 default y
5
Simon Glassf2a89462016-09-12 23:18:41 -06006config SPL_LIBCOMMON_SUPPORT
7 default y
8
Simon Glassb16c92c2016-09-12 23:18:43 -06009config SPL_LIBGENERIC_SUPPORT
10 default y
11
Simon Glasse076d6f2016-09-12 23:18:56 -060012config SPL_SERIAL_SUPPORT
13 default y
14
Stephen Warrenadf3abd2016-07-18 12:17:11 -060015config TEGRA_IVC
16 bool "Tegra IVC protocol"
17 help
18 IVC (Inter-VM Communication) protocol is a Tegra-specific IPC
19 (Inter Processor Communication) framework. Within the context of
20 U-Boot, it is typically used for communication between the main CPU
21 and various auxiliary processors.
22
Stephen Warren8c29e652015-11-23 10:32:01 -070023config TEGRA_COMMON
24 bool "Tegra common options"
Tom Warren7b5002e2015-07-17 08:12:51 -070025 select DM
Simon Glassa403c9f2015-11-29 13:18:01 -070026 select DM_ETH
Tom Warren7b5002e2015-07-17 08:12:51 -070027 select DM_GPIO
Stephen Warren8c29e652015-11-23 10:32:01 -070028 select DM_I2C
Simon Glass01e99402015-10-18 21:17:16 -060029 select DM_KEYBOARD
Tom Warrena66f7722016-09-13 10:45:48 -060030 select DM_MMC
Simon Glass46fcfc12015-11-19 20:27:02 -070031 select DM_PCI
Simon Glasseca7b0d2015-11-26 19:51:30 -070032 select DM_PCI_COMPAT
Simon Glassd8af3c92016-01-30 16:38:01 -070033 select DM_PWM
Stephen Warren8c29e652015-11-23 10:32:01 -070034 select DM_SERIAL
35 select DM_SPI
36 select DM_SPI_FLASH
37 select OF_CONTROL
Simon Glassfe4ee972016-02-16 18:09:19 -070038 select VIDCONSOLE_AS_LCD if DM_VIDEO
Stephen Warren8c29e652015-11-23 10:32:01 -070039
40config TEGRA_ARMV7_COMMON
41 bool "Tegra 32-bit common options"
42 select CPU_V7
43 select SPL
44 select SUPPORT_SPL
45 select TEGRA_COMMON
Stephen Warrenaf974be2016-05-12 12:07:41 -060046 select TEGRA_GPIO
Stephen Warren8c29e652015-11-23 10:32:01 -070047
48config TEGRA_ARMV8_COMMON
49 bool "Tegra 64-bit common options"
50 select ARM64
51 select TEGRA_COMMON
Tom Warren7b5002e2015-07-17 08:12:51 -070052
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090053choice
54 prompt "Tegra SoC select"
Joe Hershbergerf0699602015-05-12 14:46:23 -050055 optional
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090056
57config TEGRA20
58 bool "Tegra20 family"
Tom Warren7b5002e2015-07-17 08:12:51 -070059 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090060
61config TEGRA30
62 bool "Tegra30 family"
Tom Warren7b5002e2015-07-17 08:12:51 -070063 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090064
65config TEGRA114
66 bool "Tegra114 family"
Tom Warren7b5002e2015-07-17 08:12:51 -070067 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090068
69config TEGRA124
70 bool "Tegra124 family"
Tom Warren7b5002e2015-07-17 08:12:51 -070071 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090072
Tom Warrenab0cc6b2015-03-04 16:36:00 -070073config TEGRA210
74 bool "Tegra210 family"
Stephen Warrenaf974be2016-05-12 12:07:41 -060075 select TEGRA_GPIO
Stephen Warren8c29e652015-11-23 10:32:01 -070076 select TEGRA_ARMV8_COMMON
Tom Warrenab0cc6b2015-03-04 16:36:00 -070077
Stephen Warren03667eb2016-05-12 13:32:55 -060078config TEGRA186
79 bool "Tegra186 family"
Stephen Warrene8e3f202016-08-08 11:28:24 -060080 select CLK
Stephen Warrene0e2b262016-06-17 09:43:57 -060081 select DM_MAILBOX
Stephen Warrenfccc9c52016-08-08 11:28:25 -060082 select DM_RESET
Stephen Warrena2148922016-08-08 09:41:34 -060083 select MISC
84 select TEGRA186_BPMP
Stephen Warrene8e3f202016-08-08 11:28:24 -060085 select TEGRA186_CLOCK
Stephen Warren03667eb2016-05-12 13:32:55 -060086 select TEGRA186_GPIO
Stephen Warrenfccc9c52016-08-08 11:28:25 -060087 select TEGRA186_RESET
Stephen Warren03667eb2016-05-12 13:32:55 -060088 select TEGRA_ARMV8_COMMON
Stephen Warrene0e2b262016-06-17 09:43:57 -060089 select TEGRA_HSP
Stephen Warrenadf3abd2016-07-18 12:17:11 -060090 select TEGRA_IVC
Stephen Warren03667eb2016-05-12 13:32:55 -060091
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090092endchoice
93
Stephen Warren5a44ab42016-01-26 10:59:42 -070094config TEGRA_DISCONNECT_UDC_ON_BOOT
95 bool "Disconnect USB device mode controller on boot"
96 default y
97 help
98 When loading U-Boot into RAM over USB protocols using tools such as
99 tegrarcm or L4T's exec-uboot.sh/tegraflash.py, Tegra's USB device
100 mode controller is initialized and enumerated by the host PC running
101 the tool. Unfortunately, these tools do not shut down the USB
102 controller before executing the downloaded code, and so the host PC
103 does not "de-enumerate" the USB device. This option shuts down the
104 USB controller when U-Boot boots to avoid leaving a stale USB device
105 present.
106
Simon Glass838723b2015-02-11 16:32:59 -0700107config SYS_MALLOC_F_LEN
108 default 0x1800
109
Masahiro Yamadaed1632a2015-02-20 17:04:04 +0900110source "arch/arm/mach-tegra/tegra20/Kconfig"
111source "arch/arm/mach-tegra/tegra30/Kconfig"
112source "arch/arm/mach-tegra/tegra114/Kconfig"
113source "arch/arm/mach-tegra/tegra124/Kconfig"
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700114source "arch/arm/mach-tegra/tegra210/Kconfig"
Stephen Warren03667eb2016-05-12 13:32:55 -0600115source "arch/arm/mach-tegra/tegra186/Kconfig"
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900116
117endif