Marcel Ziswiler | 315deb3 | 2023-08-04 12:08:08 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
| 2 | /* |
| 3 | * Board specific initialization for Verdin AM62 SoM |
| 4 | * |
| 5 | * Copyright 2023 Toradex - https://www.toradex.com/ |
| 6 | * |
| 7 | */ |
| 8 | |
Tom Rini | b7f7046 | 2023-12-14 13:16:45 -0500 | [diff] [blame] | 9 | #include <config.h> |
Marcel Ziswiler | 315deb3 | 2023-08-04 12:08:08 +0200 | [diff] [blame] | 10 | #include <asm/arch/hardware.h> |
| 11 | #include <asm/io.h> |
| 12 | #include <dm/uclass.h> |
| 13 | #include <env.h> |
| 14 | #include <fdt_support.h> |
| 15 | #include <init.h> |
| 16 | #include <k3-ddrss.h> |
| 17 | #include <spl.h> |
| 18 | |
| 19 | #include "../common/tdx-cfg-block.h" |
| 20 | |
| 21 | DECLARE_GLOBAL_DATA_PTR; |
| 22 | |
| 23 | int board_init(void) |
| 24 | { |
| 25 | return 0; |
| 26 | } |
| 27 | |
| 28 | int dram_init(void) |
| 29 | { |
| 30 | gd->ram_size = get_ram_size((long *)CFG_SYS_SDRAM_BASE, CFG_SYS_SDRAM_SIZE); |
| 31 | |
Emanuele Ghidoli | 478eaf2 | 2023-08-24 10:08:50 +0200 | [diff] [blame] | 32 | if (gd->ram_size < SZ_512M) |
| 33 | puts("## WARNING: Less than 512MB RAM detected\n"); |
Marcel Ziswiler | 315deb3 | 2023-08-04 12:08:08 +0200 | [diff] [blame] | 34 | |
| 35 | return 0; |
| 36 | } |
| 37 | |
| 38 | /* |
| 39 | * Avoid relocated U-Boot clash with Linux reserved-memory on 512 MB SoM |
| 40 | */ |
Heinrich Schuchardt | 51a9aac | 2023-08-12 20:16:58 +0200 | [diff] [blame] | 41 | phys_addr_t board_get_usable_ram_top(phys_size_t total_size) |
Marcel Ziswiler | 315deb3 | 2023-08-04 12:08:08 +0200 | [diff] [blame] | 42 | { |
| 43 | return 0x9C000000; |
| 44 | } |
| 45 | |
| 46 | #if defined(CONFIG_SPL_LOAD_FIT) |
| 47 | int board_fit_config_name_match(const char *name) |
| 48 | { |
| 49 | return 0; |
| 50 | } |
| 51 | #endif |
| 52 | |
| 53 | #if IS_ENABLED(CONFIG_OF_LIBFDT) && IS_ENABLED(CONFIG_OF_BOARD_SETUP) |
| 54 | int ft_board_setup(void *blob, struct bd_info *bd) |
| 55 | { |
| 56 | return ft_common_board_setup(blob, bd); |
| 57 | } |
| 58 | #endif |
| 59 | |
| 60 | static void select_dt_from_module_version(void) |
| 61 | { |
| 62 | char variant[32]; |
| 63 | char *env_variant = env_get("variant"); |
| 64 | int is_wifi = 0; |
| 65 | |
| 66 | if (IS_ENABLED(CONFIG_TDX_CFG_BLOCK)) { |
| 67 | /* |
| 68 | * If we have a valid config block and it says we are a module with |
| 69 | * Wi-Fi/Bluetooth make sure we use the -wifi device tree. |
| 70 | */ |
| 71 | is_wifi = (tdx_hw_tag.prodid == VERDIN_AM62Q_WIFI_BT_IT) || |
| 72 | (tdx_hw_tag.prodid == VERDIN_AM62S_512MB_WIFI_BT_IT) || |
| 73 | (tdx_hw_tag.prodid == VERDIN_AM62D_1G_WIFI_BT_IT) || |
| 74 | (tdx_hw_tag.prodid == VERDIN_AM62Q_2G_WIFI_BT_IT); |
| 75 | } |
| 76 | |
| 77 | if (is_wifi) |
| 78 | strlcpy(&variant[0], "wifi", sizeof(variant)); |
| 79 | else |
| 80 | strlcpy(&variant[0], "nonwifi", sizeof(variant)); |
| 81 | |
| 82 | if (strcmp(variant, env_variant)) { |
| 83 | printf("Setting variant to %s\n", variant); |
| 84 | env_set("variant", variant); |
| 85 | } |
| 86 | } |
| 87 | |
| 88 | int board_late_init(void) |
| 89 | { |
| 90 | select_dt_from_module_version(); |
| 91 | |
| 92 | return 0; |
| 93 | } |
| 94 | |
| 95 | #define CTRLMMR_USB0_PHY_CTRL 0x43004008 |
| 96 | #define CTRLMMR_USB1_PHY_CTRL 0x43004018 |
| 97 | #define CORE_VOLTAGE 0x80000000 |
| 98 | #define MCU_CTRL_LFXOSC_32K_BYPASS_VAL BIT(4) |
| 99 | |
| 100 | #ifdef CONFIG_SPL_BOARD_INIT |
| 101 | void spl_board_init(void) |
| 102 | { |
| 103 | u32 val; |
| 104 | |
Max Krummenacher | 88f9862 | 2024-01-17 11:16:46 +0100 | [diff] [blame] | 105 | /* Clear USB0_PHY_CTRL_CORE_VOLTAGE */ |
| 106 | /* TI recommends to clear the bit independent of VDDA_CORE_USB */ |
Marcel Ziswiler | 315deb3 | 2023-08-04 12:08:08 +0200 | [diff] [blame] | 107 | val = readl(CTRLMMR_USB0_PHY_CTRL); |
| 108 | val &= ~(CORE_VOLTAGE); |
| 109 | writel(val, CTRLMMR_USB0_PHY_CTRL); |
| 110 | |
Max Krummenacher | 88f9862 | 2024-01-17 11:16:46 +0100 | [diff] [blame] | 111 | /* Clear USB1_PHY_CTRL_CORE_VOLTAGE */ |
Marcel Ziswiler | 315deb3 | 2023-08-04 12:08:08 +0200 | [diff] [blame] | 112 | val = readl(CTRLMMR_USB1_PHY_CTRL); |
| 113 | val &= ~(CORE_VOLTAGE); |
| 114 | writel(val, CTRLMMR_USB1_PHY_CTRL); |
| 115 | |
| 116 | /* We use the 32k FOUT from the Epson RX8130CE RTC chip */ |
| 117 | /* In WKUP_LFOSC0 clear the power down bit and set the bypass bit |
| 118 | * The bypass bit is required as we provide a CMOS clock signal and |
| 119 | * the power down seems to be required also in the bypass case |
| 120 | * despite of the datasheet stating otherwise |
| 121 | */ |
| 122 | /* Compare with the AM62 datasheet, |
| 123 | * Table 7-21. LFXOSC Modes of Operation |
| 124 | */ |
| 125 | val = readl(MCU_CTRL_LFXOSC_CTRL); |
| 126 | val &= ~MCU_CTRL_LFXOSC_32K_DISABLE_VAL; |
| 127 | val |= MCU_CTRL_LFXOSC_32K_BYPASS_VAL; |
| 128 | writel(val, MCU_CTRL_LFXOSC_CTRL); |
| 129 | /* Make sure to mux up to take the SoC 32k from the LFOSC input */ |
| 130 | writel(MCU_CTRL_DEVICE_CLKOUT_LFOSC_SELECT_VAL, |
| 131 | MCU_CTRL_DEVICE_CLKOUT_32K_CTRL); |
| 132 | } |
| 133 | #endif |