| commit | 88f9862192b8353fec9bf9d5546e6a206423f275 | [log] [tgz] |
|---|---|---|
| author | Max Krummenacher <max.krummenacher@toradex.com> | Wed Jan 17 11:16:46 2024 +0100 |
| committer | Tom Rini <trini@konsulko.com> | Wed Jan 24 11:12:11 2024 -0500 |
| tree | 285530142e39c54d95929e75efb80a64fe2298db | |
| parent | 0e226eb7047066404ba053d37f2334ef394432ab [diff] [blame] |
board: verdin-am62: improve comment on usb phy core voltage TI recommends to clear the bit independent of the used voltage. So the comment which claims to do it due to the core voltage at 0.85V is bogus. See https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1252724/am625-usb-phy-core-voltage-selection-and-vdda_core_usb-mismatch Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
diff --git a/board/toradex/verdin-am62/verdin-am62.c b/board/toradex/verdin-am62/verdin-am62.c index 2718263..e948fc1 100644 --- a/board/toradex/verdin-am62/verdin-am62.c +++ b/board/toradex/verdin-am62/verdin-am62.c
@@ -102,12 +102,13 @@ { u32 val; - /* Set USB0 PHY core voltage to 0.85V */ + /* Clear USB0_PHY_CTRL_CORE_VOLTAGE */ + /* TI recommends to clear the bit independent of VDDA_CORE_USB */ val = readl(CTRLMMR_USB0_PHY_CTRL); val &= ~(CORE_VOLTAGE); writel(val, CTRLMMR_USB0_PHY_CTRL); - /* Set USB1 PHY core voltage to 0.85V */ + /* Clear USB1_PHY_CTRL_CORE_VOLTAGE */ val = readl(CTRLMMR_USB1_PHY_CTRL); val &= ~(CORE_VOLTAGE); writel(val, CTRLMMR_USB1_PHY_CTRL);