blob: 5b166b14ca658645cd3412758ed5f07d0b389523 [file] [log] [blame]
Marcel Ziswiler315deb32023-08-04 12:08:08 +02001// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Board specific initialization for Verdin AM62 SoM
4 *
5 * Copyright 2023 Toradex - https://www.toradex.com/
6 *
7 */
8
9#include <asm/arch/hardware.h>
10#include <asm/io.h>
11#include <dm/uclass.h>
12#include <env.h>
13#include <fdt_support.h>
14#include <init.h>
15#include <k3-ddrss.h>
16#include <spl.h>
17
18#include "../common/tdx-cfg-block.h"
19
20DECLARE_GLOBAL_DATA_PTR;
21
22int board_init(void)
23{
24 return 0;
25}
26
27int dram_init(void)
28{
29 gd->ram_size = get_ram_size((long *)CFG_SYS_SDRAM_BASE, CFG_SYS_SDRAM_SIZE);
30
31 if (gd->ram_size < SZ_64M)
32 puts("## WARNING: Less than 64MB RAM detected\n");
33
34 return 0;
35}
36
37/*
38 * Avoid relocated U-Boot clash with Linux reserved-memory on 512 MB SoM
39 */
40phys_size_t board_get_usable_ram_top(phys_size_t total_size)
41{
42 return 0x9C000000;
43}
44
45#if defined(CONFIG_SPL_LOAD_FIT)
46int board_fit_config_name_match(const char *name)
47{
48 return 0;
49}
50#endif
51
52#if IS_ENABLED(CONFIG_OF_LIBFDT) && IS_ENABLED(CONFIG_OF_BOARD_SETUP)
53int ft_board_setup(void *blob, struct bd_info *bd)
54{
55 return ft_common_board_setup(blob, bd);
56}
57#endif
58
59static void select_dt_from_module_version(void)
60{
61 char variant[32];
62 char *env_variant = env_get("variant");
63 int is_wifi = 0;
64
65 if (IS_ENABLED(CONFIG_TDX_CFG_BLOCK)) {
66 /*
67 * If we have a valid config block and it says we are a module with
68 * Wi-Fi/Bluetooth make sure we use the -wifi device tree.
69 */
70 is_wifi = (tdx_hw_tag.prodid == VERDIN_AM62Q_WIFI_BT_IT) ||
71 (tdx_hw_tag.prodid == VERDIN_AM62S_512MB_WIFI_BT_IT) ||
72 (tdx_hw_tag.prodid == VERDIN_AM62D_1G_WIFI_BT_IT) ||
73 (tdx_hw_tag.prodid == VERDIN_AM62Q_2G_WIFI_BT_IT);
74 }
75
76 if (is_wifi)
77 strlcpy(&variant[0], "wifi", sizeof(variant));
78 else
79 strlcpy(&variant[0], "nonwifi", sizeof(variant));
80
81 if (strcmp(variant, env_variant)) {
82 printf("Setting variant to %s\n", variant);
83 env_set("variant", variant);
84 }
85}
86
87int board_late_init(void)
88{
89 select_dt_from_module_version();
90
91 return 0;
92}
93
94#define CTRLMMR_USB0_PHY_CTRL 0x43004008
95#define CTRLMMR_USB1_PHY_CTRL 0x43004018
96#define CORE_VOLTAGE 0x80000000
97#define MCU_CTRL_LFXOSC_32K_BYPASS_VAL BIT(4)
98
99#ifdef CONFIG_SPL_BOARD_INIT
100void spl_board_init(void)
101{
102 u32 val;
103
104 /* Set USB0 PHY core voltage to 0.85V */
105 val = readl(CTRLMMR_USB0_PHY_CTRL);
106 val &= ~(CORE_VOLTAGE);
107 writel(val, CTRLMMR_USB0_PHY_CTRL);
108
109 /* Set USB1 PHY core voltage to 0.85V */
110 val = readl(CTRLMMR_USB1_PHY_CTRL);
111 val &= ~(CORE_VOLTAGE);
112 writel(val, CTRLMMR_USB1_PHY_CTRL);
113
114 /* We use the 32k FOUT from the Epson RX8130CE RTC chip */
115 /* In WKUP_LFOSC0 clear the power down bit and set the bypass bit
116 * The bypass bit is required as we provide a CMOS clock signal and
117 * the power down seems to be required also in the bypass case
118 * despite of the datasheet stating otherwise
119 */
120 /* Compare with the AM62 datasheet,
121 * Table 7-21. LFXOSC Modes of Operation
122 */
123 val = readl(MCU_CTRL_LFXOSC_CTRL);
124 val &= ~MCU_CTRL_LFXOSC_32K_DISABLE_VAL;
125 val |= MCU_CTRL_LFXOSC_32K_BYPASS_VAL;
126 writel(val, MCU_CTRL_LFXOSC_CTRL);
127 /* Make sure to mux up to take the SoC 32k from the LFOSC input */
128 writel(MCU_CTRL_DEVICE_CLKOUT_LFOSC_SELECT_VAL,
129 MCU_CTRL_DEVICE_CLKOUT_32K_CTRL);
130}
131#endif