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Stelian Pop0bf5cad2008-05-08 18:52:25 +02001/*
2 * (C) Copyright 2007-2008
Stelian Pop5ee0c7f2011-11-01 00:00:39 +01003 * Stelian Pop <stelian@popies.net>
Stelian Pop0bf5cad2008-05-08 18:52:25 +02004 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * Configuation settings for the AT91SAM9RLEK board.
7 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
Stelian Pop0bf5cad2008-05-08 18:52:25 +02009 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
Xu, Hong0c0fb212011-08-01 03:56:53 +000014#include <asm/hardware.h>
15
16#define CONFIG_SYS_TEXT_BASE 0x21F00000
Jens Scharsig128ecd02010-02-03 22:45:42 +010017
Stelian Pop0bf5cad2008-05-08 18:52:25 +020018/* ARM asynchronous clock */
Xu, Hong0c0fb212011-08-01 03:56:53 +000019#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
20#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */
Stelian Pop0bf5cad2008-05-08 18:52:25 +020021
Xu, Hong0c0fb212011-08-01 03:56:53 +000022#define CONFIG_AT91SAM9RLEK 1 /* It's an AT91SAM9RLEK Board */
23
Jean-Christophe PLAGNIOL-VILLARD23164f12009-04-16 21:30:44 +020024#define CONFIG_ARCH_CPU_INIT
Xu, Hong0c0fb212011-08-01 03:56:53 +000025#define CONFIG_SKIP_LOWLEVEL_INIT
26#define CONFIG_BOARD_EARLY_INIT_F
Stelian Pop0bf5cad2008-05-08 18:52:25 +020027
Xu, Hong0c0fb212011-08-01 03:56:53 +000028#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
29#define CONFIG_SETUP_MEMORY_TAGS 1
30#define CONFIG_INITRD_TAG 1
Stelian Pop0bf5cad2008-05-08 18:52:25 +020031
Xu, Hong0c0fb212011-08-01 03:56:53 +000032#define CONFIG_ATMEL_LEGACY
33#define CONFIG_AT91_GPIO 1
34#define CONFIG_AT91_GPIO_PULLUP 1
Stelian Pop0bf5cad2008-05-08 18:52:25 +020035
36/*
37 * Hardware drivers
38 */
Xu, Hong0c0fb212011-08-01 03:56:53 +000039
40/* serial console */
41#define CONFIG_ATMEL_USART
42#define CONFIG_USART_BASE ATMEL_BASE_DBGU
43#define CONFIG_USART_ID ATMEL_ID_SYS
44#define CONFIG_BAUDRATE 115200
Stelian Pop0bf5cad2008-05-08 18:52:25 +020045
Stelian Popcea5c532008-05-08 14:52:32 +020046/* LCD */
Stelian Popcea5c532008-05-08 14:52:32 +020047#define LCD_BPP LCD_COLOR8
48#define CONFIG_LCD_LOGO 1
49#undef LCD_TEST_PATTERN
50#define CONFIG_LCD_INFO 1
51#define CONFIG_LCD_INFO_BELOW_LOGO 1
Xu, Hong0c0fb212011-08-01 03:56:53 +000052#define CONFIG_SYS_WHITE_ON_BLACK 1
Stelian Popcea5c532008-05-08 14:52:32 +020053#define CONFIG_ATMEL_LCD 1
54#define CONFIG_ATMEL_LCD_RGB565 1
Xu, Hong0c0fb212011-08-01 03:56:53 +000055/* Let board_init_f handle the framebuffer allocation */
56#undef CONFIG_FB_ADDR
Xu, Hong0c0fb212011-08-01 03:56:53 +000057
Jean-Christophe PLAGNIOL-VILLARD476d10e2009-03-21 21:08:00 +010058/* LED */
59#define CONFIG_AT91_LED
60#define CONFIG_RED_LED AT91_PIN_PD14 /* this is the power led */
61#define CONFIG_GREEN_LED AT91_PIN_PD15 /* this is the user1 led */
62#define CONFIG_YELLOW_LED AT91_PIN_PD16 /* this is the user2 led */
63
Stelian Pop0bf5cad2008-05-08 18:52:25 +020064
Stelian Pop0bf5cad2008-05-08 18:52:25 +020065/*
66 * Command line configuration.
67 */
Stelian Pop0bf5cad2008-05-08 18:52:25 +020068
Xu, Hong0c0fb212011-08-01 03:56:53 +000069#define CONFIG_CMD_NAND 1
Stelian Pop0bf5cad2008-05-08 18:52:25 +020070
71/* SDRAM */
72#define CONFIG_NR_DRAM_BANKS 1
Xu, Hong0c0fb212011-08-01 03:56:53 +000073#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
74#define CONFIG_SYS_SDRAM_SIZE 0x04000000
75
76#define CONFIG_SYS_INIT_SP_ADDR \
77 (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
Stelian Pop0bf5cad2008-05-08 18:52:25 +020078
79/* DataFlash */
Jean-Christophe PLAGNIOL-VILLARDe5437ac2009-03-27 23:26:44 +010080#define CONFIG_ATMEL_DATAFLASH_SPI
Xu, Hong0c0fb212011-08-01 03:56:53 +000081#define CONFIG_HAS_DATAFLASH 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020082#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
83#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
Xu, Hong0c0fb212011-08-01 03:56:53 +000084#define AT91_SPI_CLK 15000000
85#define DATAFLASH_TCSS (0x1a << 16)
86#define DATAFLASH_TCHS (0x1 << 24)
Stelian Pop0bf5cad2008-05-08 18:52:25 +020087
88/* NOR flash - not present */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020089#define CONFIG_SYS_NO_FLASH 1
Stelian Pop0bf5cad2008-05-08 18:52:25 +020090
91/* NAND flash */
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +010092#ifdef CONFIG_CMD_NAND
93#define CONFIG_NAND_ATMEL
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020094#define CONFIG_SYS_MAX_NAND_DEVICE 1
Xu, Hong0c0fb212011-08-01 03:56:53 +000095#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020096#define CONFIG_SYS_NAND_DBW_8 1
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +010097/* our ALE is AD21 */
98#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
99/* our CLE is AD22 */
100#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
101#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PB6
102#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD17
Wolfgang Denk1f797742009-07-18 21:52:24 +0200103
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +0100104#endif
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200105
Wu, Joshb12259b2015-02-02 17:51:00 +0800106/* MMC */
Wu, Joshb12259b2015-02-02 17:51:00 +0800107
108#ifdef CONFIG_CMD_MMC
Wu, Joshb12259b2015-02-02 17:51:00 +0800109#define CONFIG_GENERIC_MMC
110#define CONFIG_GENERIC_ATMEL_MCI
Wu, Joshb12259b2015-02-02 17:51:00 +0800111#define CONFIG_DOS_PARTITION
112#endif
113
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200114/* Ethernet - not present */
115
116/* USB - not supported */
117
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200118#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200119
Xu, Hong0c0fb212011-08-01 03:56:53 +0000120#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200121#define CONFIG_SYS_MEMTEST_END 0x23e00000
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200122
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200123#ifdef CONFIG_SYS_USE_DATAFLASH
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200124
125/* bootstrap + u-boot + env + linux in dataflash on CS0 */
Jean-Christophe PLAGNIOL-VILLARD2b14d2b2008-09-10 22:47:58 +0200126#define CONFIG_ENV_IS_IN_DATAFLASH 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200127#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200128#define CONFIG_ENV_OFFSET 0x4200
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200129#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200130#define CONFIG_ENV_SIZE 0x4200
Alexandre Belloni9ef19ba2012-07-02 04:26:58 +0000131#define CONFIG_BOOTCOMMAND "cp.b 0xC0084000 0x22000000 0x210000; bootm"
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200132#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
133 "root=/dev/mtdblock0 " \
Albin Tonnerreeaa6db22009-07-22 18:30:03 +0200134 "mtdparts=atmel_nand:-(root) "\
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200135 "rw rootfstype=jffs2"
136
Wu, Josh7ff194f2015-02-02 17:51:01 +0800137#elif CONFIG_SYS_USE_NANDFLASH
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200138
139/* bootstrap + u-boot + env + linux in nandflash */
Xu, Hong0c0fb212011-08-01 03:56:53 +0000140#define CONFIG_ENV_IS_IN_NAND 1
Wu, Joshf8e70d92015-02-03 11:38:30 +0800141#define CONFIG_ENV_OFFSET 0xc0000
142#define CONFIG_ENV_OFFSET_REDUND 0x100000
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200143#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
Wu, Joshf8e70d92015-02-03 11:38:30 +0800144#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x600000; " \
145 "nand read 0x21000000 0x180000 0x80000; " \
146 "bootz 0x22000000 - 0x21000000"
147#define CONFIG_BOOTARGS \
148 "console=ttyS0,115200 earlyprintk " \
149 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
Robert P. J. Daya7e1f502016-09-01 09:49:14 -0400150 "256K(env),256k(env_redundant),256k(spare)," \
Wu, Joshf8e70d92015-02-03 11:38:30 +0800151 "512k(dtb),6M(kernel)ro,-(rootfs) " \
152 "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200153
Wu, Josh7ff194f2015-02-02 17:51:01 +0800154#else /* CONFIG_SYS_USE_MMC */
155
156/* bootstrap + u-boot + env + linux in mmc */
157#define CONFIG_ENV_IS_IN_FAT
158#define CONFIG_FAT_WRITE
159#define FAT_ENV_INTERFACE "mmc"
160#define FAT_ENV_FILE "uboot.env"
161#define FAT_ENV_DEVICE_AND_PART "0"
162#define CONFIG_ENV_SIZE 0x4000
163#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 at91sam9rlek.dtb; " \
164 "fatload mmc 0:1 0x22000000 zImage; " \
165 "bootz 0x22000000 - 0x21000000"
166#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
167 "mtdparts=atmel_nand:" \
168 "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
169 "root=/dev/mmcblk0p2 rw rootwait"
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200170#endif
171
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200172#define CONFIG_SYS_CBSIZE 256
173#define CONFIG_SYS_MAXARGS 16
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200174#define CONFIG_SYS_LONGHELP 1
Xu, Hong0c0fb212011-08-01 03:56:53 +0000175#define CONFIG_CMDLINE_EDITING 1
Alexandre Belloni9ef19ba2012-07-02 04:26:58 +0000176#define CONFIG_AUTO_COMPLETE
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200177
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200178/*
179 * Size of malloc() pool
180 */
Xu, Hong0c0fb212011-08-01 03:56:53 +0000181#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200182
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200183#endif