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Stelian Pop0bf5cad2008-05-08 18:52:25 +02001/*
2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian.pop@leadtechdesign.com>
4 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * Configuation settings for the AT91SAM9RLEK board.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
30/* ARM asynchronous clock */
Stelian Popcea5c532008-05-08 14:52:32 +020031#define AT91_CPU_NAME "AT91SAM9RL"
Stelian Pop0bf5cad2008-05-08 18:52:25 +020032#define AT91_MAIN_CLOCK 200000000 /* from 12.000 MHz crystal */
33#define AT91_MASTER_CLOCK 100000000 /* peripheral = main / 2 */
34#define CFG_HZ 1000000 /* 1us resolution */
35
36#define AT91_SLOW_CLOCK 32768 /* slow clock */
37
38#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
39#define CONFIG_AT91SAM9RL 1 /* It's an Atmel AT91SAM9RL SoC*/
40#define CONFIG_AT91SAM9RLEK 1 /* on an AT91SAM9RLEK Board */
41#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
42
43#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
44#define CONFIG_SETUP_MEMORY_TAGS 1
45#define CONFIG_INITRD_TAG 1
46
47#define CONFIG_SKIP_LOWLEVEL_INIT
48#define CONFIG_SKIP_RELOCATE_UBOOT
49
50/*
51 * Hardware drivers
52 */
53#define CONFIG_ATMEL_USART 1
54#undef CONFIG_USART0
55#undef CONFIG_USART1
56#undef CONFIG_USART2
57#define CONFIG_USART3 1 /* USART 3 is DBGU */
58
Stelian Popcea5c532008-05-08 14:52:32 +020059/* LCD */
60#define CONFIG_LCD 1
61#define LCD_BPP LCD_COLOR8
62#define CONFIG_LCD_LOGO 1
63#undef LCD_TEST_PATTERN
64#define CONFIG_LCD_INFO 1
65#define CONFIG_LCD_INFO_BELOW_LOGO 1
66#define CFG_WHITE_ON_BLACK 1
67#define CONFIG_ATMEL_LCD 1
68#define CONFIG_ATMEL_LCD_RGB565 1
69#define CFG_CONSOLE_IS_IN_ENV 1
70
Stelian Pop0bf5cad2008-05-08 18:52:25 +020071#define CONFIG_BOOTDELAY 3
72
Stelian Pop0bf5cad2008-05-08 18:52:25 +020073/*
74 * Command line configuration.
75 */
76#include <config_cmd_default.h>
77#undef CONFIG_CMD_BDI
78#undef CONFIG_CMD_IMI
79#undef CONFIG_CMD_AUTOSCRIPT
80#undef CONFIG_CMD_FPGA
81#undef CONFIG_CMD_LOADS
82#undef CONFIG_CMD_IMLS
83#undef CONFIG_CMD_NET
84#undef CONFIG_CMD_USB
85
86#define CONFIG_CMD_NAND 1
87
88/* SDRAM */
89#define CONFIG_NR_DRAM_BANKS 1
90#define PHYS_SDRAM 0x20000000
91#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
92
93/* DataFlash */
94#define CONFIG_HAS_DATAFLASH 1
95#define CFG_SPI_WRITE_TOUT (5*CFG_HZ)
96#define CFG_MAX_DATAFLASH_BANKS 1
97#define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
98#define AT91_SPI_CLK 15000000
99#define DATAFLASH_TCSS (0x1a << 16)
100#define DATAFLASH_TCHS (0x1 << 24)
101
102/* NOR flash - not present */
103#define CFG_NO_FLASH 1
104
105/* NAND flash */
106#define NAND_MAX_CHIPS 1
107#define CFG_MAX_NAND_DEVICE 1
108#define CFG_NAND_BASE 0x40000000
109#define CFG_NAND_DBW_8 1
110
111/* Ethernet - not present */
112
113/* USB - not supported */
114
115#define CFG_LOAD_ADDR 0x22000000 /* load address */
116
117#define CFG_MEMTEST_START PHYS_SDRAM
118#define CFG_MEMTEST_END 0x23e00000
119
120#define CFG_USE_DATAFLASH 1
121#undef CFG_USE_NANDFLASH
122
123#ifdef CFG_USE_DATAFLASH
124
125/* bootstrap + u-boot + env + linux in dataflash on CS0 */
Jean-Christophe PLAGNIOL-VILLARD2b14d2b2008-09-10 22:47:58 +0200126#define CONFIG_ENV_IS_IN_DATAFLASH 1
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200127#define CFG_MONITOR_BASE (CFG_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
128#define CFG_ENV_OFFSET 0x4200
129#define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET)
130#define CFG_ENV_SIZE 0x4200
131#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm"
132#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
133 "root=/dev/mtdblock0 " \
134 "mtdparts=at91_nand:-(root) "\
135 "rw rootfstype=jffs2"
136
137#else /* CFG_USE_NANDFLASH */
138
139/* bootstrap + u-boot + env + linux in nandflash */
140#define CFG_ENV_IS_IN_NAND 1
141#define CFG_ENV_OFFSET 0x60000
142#define CFG_ENV_OFFSET_REDUND 0x80000
143#define CFG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
144#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
145#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
146 "root=/dev/mtdblock5 " \
147 "mtdparts=at91_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) " \
148 "rw rootfstype=jffs2"
149
150#endif
151
152#define CONFIG_BAUDRATE 115200
153#define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
154
155#define CFG_PROMPT "U-Boot> "
156#define CFG_CBSIZE 256
157#define CFG_MAXARGS 16
158#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
159#define CFG_LONGHELP 1
160#define CONFIG_CMDLINE_EDITING 1
161
162#define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
163/*
164 * Size of malloc() pool
165 */
166#define CFG_MALLOC_LEN ROUND(3 * CFG_ENV_SIZE + 128*1024, 0x1000)
167#define CFG_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
168
169#define CONFIG_STACKSIZE (32*1024) /* regular stack */
170
171#ifdef CONFIG_USE_IRQ
172#error CONFIG_USE_IRQ not supported
173#endif
174
175#endif