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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Vipin KUMAR4255edc2012-05-07 13:06:45 +05302/*
3 * (C) Copyright 2010
4 * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
Vipin KUMAR4255edc2012-05-07 13:06:45 +05305 */
6
7#include <common.h>
Simon Glassed38aef2020-05-10 11:40:03 -06008#include <command.h>
Simon Glass97589732020-05-10 11:40:02 -06009#include <init.h>
Vipin KUMAR4255edc2012-05-07 13:06:45 +053010#include <asm/io.h>
11#include <asm/arch/hardware.h>
12#include <asm/arch/spr_misc.h>
13
14int arch_cpu_init(void)
15{
16 struct misc_regs *const misc_p =
17 (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
Shiraz Hashim74a7e052012-05-07 13:06:59 +053018 u32 periph1_clken, periph_clk_cfg;
Vipin KUMAR4255edc2012-05-07 13:06:45 +053019
20 periph1_clken = readl(&misc_p->periph1_clken);
21
22#if defined(CONFIG_SPEAR3XX)
23 periph1_clken |= MISC_GPT2ENB;
24#elif defined(CONFIG_SPEAR600)
25 periph1_clken |= MISC_GPT3ENB;
26#endif
27
28#if defined(CONFIG_PL011_SERIAL)
29 periph1_clken |= MISC_UART0ENB;
Shiraz Hashim74a7e052012-05-07 13:06:59 +053030
31 periph_clk_cfg = readl(&misc_p->periph_clk_cfg);
32 periph_clk_cfg &= ~CONFIG_SPEAR_UARTCLKMSK;
33 periph_clk_cfg |= CONFIG_SPEAR_UART48M;
34 writel(periph_clk_cfg, &misc_p->periph_clk_cfg);
Vipin KUMAR4255edc2012-05-07 13:06:45 +053035#endif
Simon Glass6e378742015-04-05 16:07:34 -060036#if defined(CONFIG_ETH_DESIGNWARE)
Vipin KUMAR4255edc2012-05-07 13:06:45 +053037 periph1_clken |= MISC_ETHENB;
38#endif
39#if defined(CONFIG_DW_UDC)
40 periph1_clken |= MISC_USBDENB;
41#endif
Stefan Roeseef6073e2014-10-28 12:12:00 +010042#if defined(CONFIG_SYS_I2C_DW)
Vipin KUMAR4255edc2012-05-07 13:06:45 +053043 periph1_clken |= MISC_I2CENB;
44#endif
45#if defined(CONFIG_ST_SMI)
46 periph1_clken |= MISC_SMIENB;
47#endif
48#if defined(CONFIG_NAND_FSMC)
49 periph1_clken |= MISC_FSMCENB;
50#endif
Stefan Roese64bbb7d2015-08-18 09:27:18 +020051#if defined(CONFIG_USB_EHCI_SPEAR)
52 periph1_clken |= PERIPH_USBH1 | PERIPH_USBH2;
53#endif
Quentin Schulzf25cdc62018-08-31 16:15:53 +020054#if defined(CONFIG_SPEAR_GPIO)
55 periph1_clken |= MISC_GPIO3ENB | MISC_GPIO4ENB;
56#endif
Quentin Schulzf1c773b2018-08-31 16:28:30 +020057#if defined(CONFIG_PL022_SPI)
58 periph1_clken |= MISC_SSP1ENB | MISC_SSP2ENB | MISC_SSP3ENB;
59#endif
Vipin KUMAR4255edc2012-05-07 13:06:45 +053060
61 writel(periph1_clken, &misc_p->periph1_clken);
Stefan Roese64bbb7d2015-08-18 09:27:18 +020062
Vipin KUMAR4255edc2012-05-07 13:06:45 +053063 return 0;
64}
65
Vipin KUMAR4255edc2012-05-07 13:06:45 +053066#ifdef CONFIG_DISPLAY_CPUINFO
67int print_cpuinfo(void)
68{
69#ifdef CONFIG_SPEAR300
70 printf("CPU: SPEAr300\n");
71#elif defined(CONFIG_SPEAR310)
72 printf("CPU: SPEAr310\n");
73#elif defined(CONFIG_SPEAR320)
74 printf("CPU: SPEAr320\n");
75#elif defined(CONFIG_SPEAR600)
76 printf("CPU: SPEAr600\n");
77#else
78#error CPU not supported in spear platform
79#endif
80 return 0;
81}
82#endif
Stefan Roese69804d42015-09-02 11:10:58 +020083
Thomas Petazzonia9e56092017-08-15 22:52:45 +020084#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_ECC_BCH) && defined(CONFIG_NAND_FSMC)
Simon Glassed38aef2020-05-10 11:40:03 -060085static int do_switch_ecc(struct cmd_tbl *cmdtp, int flag, int argc,
Stefan Roese69804d42015-09-02 11:10:58 +020086 char *const argv[])
87{
88 if (argc != 2)
89 goto usage;
90
91 if (strncmp(argv[1], "hw", 2) == 0) {
92 /* 1-bit HW ECC */
93 printf("Switching to 1-bit HW ECC\n");
94 fsmc_nand_switch_ecc(1);
95 } else if (strncmp(argv[1], "bch4", 2) == 0) {
96 /* 4-bit SW ECC BCH4 */
97 printf("Switching to 4-bit SW ECC (BCH4)\n");
98 fsmc_nand_switch_ecc(4);
99 } else {
100 goto usage;
101 }
102
103 return 0;
104
105usage:
106 printf("Usage: nandecc %s\n", cmdtp->usage);
107 return 1;
108}
109
110U_BOOT_CMD(
111 nandecc, 2, 0, do_switch_ecc,
112 "switch NAND ECC calculation algorithm",
113 "hw|bch4 - Switch between NAND hardware 1-bit HW and"
114 " 4-bit SW BCH\n"
115);
116#endif