Vipin KUMAR | 4255edc | 2012-05-07 13:06:45 +0530 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2010 |
| 3 | * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. |
| 4 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
Vipin KUMAR | 4255edc | 2012-05-07 13:06:45 +0530 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <common.h> |
| 9 | #include <asm/io.h> |
| 10 | #include <asm/arch/hardware.h> |
| 11 | #include <asm/arch/spr_misc.h> |
| 12 | |
| 13 | int arch_cpu_init(void) |
| 14 | { |
| 15 | struct misc_regs *const misc_p = |
| 16 | (struct misc_regs *)CONFIG_SPEAR_MISCBASE; |
Shiraz Hashim | 74a7e05 | 2012-05-07 13:06:59 +0530 | [diff] [blame] | 17 | u32 periph1_clken, periph_clk_cfg; |
Vipin KUMAR | 4255edc | 2012-05-07 13:06:45 +0530 | [diff] [blame] | 18 | |
| 19 | periph1_clken = readl(&misc_p->periph1_clken); |
| 20 | |
| 21 | #if defined(CONFIG_SPEAR3XX) |
| 22 | periph1_clken |= MISC_GPT2ENB; |
| 23 | #elif defined(CONFIG_SPEAR600) |
| 24 | periph1_clken |= MISC_GPT3ENB; |
| 25 | #endif |
| 26 | |
| 27 | #if defined(CONFIG_PL011_SERIAL) |
| 28 | periph1_clken |= MISC_UART0ENB; |
Shiraz Hashim | 74a7e05 | 2012-05-07 13:06:59 +0530 | [diff] [blame] | 29 | |
| 30 | periph_clk_cfg = readl(&misc_p->periph_clk_cfg); |
| 31 | periph_clk_cfg &= ~CONFIG_SPEAR_UARTCLKMSK; |
| 32 | periph_clk_cfg |= CONFIG_SPEAR_UART48M; |
| 33 | writel(periph_clk_cfg, &misc_p->periph_clk_cfg); |
Vipin KUMAR | 4255edc | 2012-05-07 13:06:45 +0530 | [diff] [blame] | 34 | #endif |
Simon Glass | 6e37874 | 2015-04-05 16:07:34 -0600 | [diff] [blame] | 35 | #if defined(CONFIG_ETH_DESIGNWARE) |
Vipin KUMAR | 4255edc | 2012-05-07 13:06:45 +0530 | [diff] [blame] | 36 | periph1_clken |= MISC_ETHENB; |
| 37 | #endif |
| 38 | #if defined(CONFIG_DW_UDC) |
| 39 | periph1_clken |= MISC_USBDENB; |
| 40 | #endif |
Stefan Roese | ef6073e | 2014-10-28 12:12:00 +0100 | [diff] [blame] | 41 | #if defined(CONFIG_SYS_I2C_DW) |
Vipin KUMAR | 4255edc | 2012-05-07 13:06:45 +0530 | [diff] [blame] | 42 | periph1_clken |= MISC_I2CENB; |
| 43 | #endif |
| 44 | #if defined(CONFIG_ST_SMI) |
| 45 | periph1_clken |= MISC_SMIENB; |
| 46 | #endif |
| 47 | #if defined(CONFIG_NAND_FSMC) |
| 48 | periph1_clken |= MISC_FSMCENB; |
| 49 | #endif |
Stefan Roese | 64bbb7d | 2015-08-18 09:27:18 +0200 | [diff] [blame] | 50 | #if defined(CONFIG_USB_EHCI_SPEAR) |
| 51 | periph1_clken |= PERIPH_USBH1 | PERIPH_USBH2; |
| 52 | #endif |
Vipin KUMAR | 4255edc | 2012-05-07 13:06:45 +0530 | [diff] [blame] | 53 | |
| 54 | writel(periph1_clken, &misc_p->periph1_clken); |
Stefan Roese | 64bbb7d | 2015-08-18 09:27:18 +0200 | [diff] [blame] | 55 | |
Vipin KUMAR | 4255edc | 2012-05-07 13:06:45 +0530 | [diff] [blame] | 56 | return 0; |
| 57 | } |
| 58 | |
Stefan Roese | 448e84f | 2015-08-18 09:27:19 +0200 | [diff] [blame] | 59 | void enable_caches(void) |
| 60 | { |
| 61 | #ifndef CONFIG_SYS_ICACHE_OFF |
| 62 | icache_enable(); |
| 63 | #endif |
| 64 | #ifndef CONFIG_SYS_DCACHE_OFF |
| 65 | dcache_enable(); |
| 66 | #endif |
| 67 | } |
| 68 | |
Vipin KUMAR | 4255edc | 2012-05-07 13:06:45 +0530 | [diff] [blame] | 69 | #ifdef CONFIG_DISPLAY_CPUINFO |
| 70 | int print_cpuinfo(void) |
| 71 | { |
| 72 | #ifdef CONFIG_SPEAR300 |
| 73 | printf("CPU: SPEAr300\n"); |
| 74 | #elif defined(CONFIG_SPEAR310) |
| 75 | printf("CPU: SPEAr310\n"); |
| 76 | #elif defined(CONFIG_SPEAR320) |
| 77 | printf("CPU: SPEAr320\n"); |
| 78 | #elif defined(CONFIG_SPEAR600) |
| 79 | printf("CPU: SPEAr600\n"); |
| 80 | #else |
| 81 | #error CPU not supported in spear platform |
| 82 | #endif |
| 83 | return 0; |
| 84 | } |
| 85 | #endif |
Stefan Roese | 69804d4 | 2015-09-02 11:10:58 +0200 | [diff] [blame] | 86 | |
Thomas Petazzoni | a9e5609 | 2017-08-15 22:52:45 +0200 | [diff] [blame^] | 87 | #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_ECC_BCH) && defined(CONFIG_NAND_FSMC) |
Stefan Roese | 69804d4 | 2015-09-02 11:10:58 +0200 | [diff] [blame] | 88 | static int do_switch_ecc(cmd_tbl_t *cmdtp, int flag, int argc, |
| 89 | char *const argv[]) |
| 90 | { |
| 91 | if (argc != 2) |
| 92 | goto usage; |
| 93 | |
| 94 | if (strncmp(argv[1], "hw", 2) == 0) { |
| 95 | /* 1-bit HW ECC */ |
| 96 | printf("Switching to 1-bit HW ECC\n"); |
| 97 | fsmc_nand_switch_ecc(1); |
| 98 | } else if (strncmp(argv[1], "bch4", 2) == 0) { |
| 99 | /* 4-bit SW ECC BCH4 */ |
| 100 | printf("Switching to 4-bit SW ECC (BCH4)\n"); |
| 101 | fsmc_nand_switch_ecc(4); |
| 102 | } else { |
| 103 | goto usage; |
| 104 | } |
| 105 | |
| 106 | return 0; |
| 107 | |
| 108 | usage: |
| 109 | printf("Usage: nandecc %s\n", cmdtp->usage); |
| 110 | return 1; |
| 111 | } |
| 112 | |
| 113 | U_BOOT_CMD( |
| 114 | nandecc, 2, 0, do_switch_ecc, |
| 115 | "switch NAND ECC calculation algorithm", |
| 116 | "hw|bch4 - Switch between NAND hardware 1-bit HW and" |
| 117 | " 4-bit SW BCH\n" |
| 118 | ); |
| 119 | #endif |