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Ian Campbelld8e69e02014-10-24 21:20:44 +01001if ARCH_SUNXI
2
Hans de Goedef07872b2015-04-06 20:33:34 +02003# Note only one of these may be selected at a time! But hidden choices are
4# not supported by Kconfig
5config SUNXI_GEN_SUN4I
6 bool
7 ---help---
8 Select this for sunxi SoCs which have resets and clocks set up
9 as the original A10 (mach-sun4i).
10
11config SUNXI_GEN_SUN6I
12 bool
13 ---help---
14 Select this for sunxi SoCs which have sun6i like periphery, like
15 separate ahb reset control registers, custom pmic bus, new style
16 watchdog, etc.
17
18
Ian Campbelld8e69e02014-10-24 21:20:44 +010019choice
20 prompt "Sunxi SoC Variant"
Joe Hershbergerf0699602015-05-12 14:46:23 -050021 optional
Ian Campbelld8e69e02014-10-24 21:20:44 +010022
Ian Campbell4a24a1c2014-10-24 21:20:45 +010023config MACH_SUN4I
Ian Campbelld8e69e02014-10-24 21:20:44 +010024 bool "sun4i (Allwinner A10)"
25 select CPU_V7
Hans de Goedef07872b2015-04-06 20:33:34 +020026 select SUNXI_GEN_SUN4I
Ian Campbelld8e69e02014-10-24 21:20:44 +010027 select SUPPORT_SPL
28
Ian Campbell4a24a1c2014-10-24 21:20:45 +010029config MACH_SUN5I
Ian Campbelld8e69e02014-10-24 21:20:44 +010030 bool "sun5i (Allwinner A13)"
31 select CPU_V7
Hans de Goedef07872b2015-04-06 20:33:34 +020032 select SUNXI_GEN_SUN4I
Ian Campbelld8e69e02014-10-24 21:20:44 +010033 select SUPPORT_SPL
34
Ian Campbell4a24a1c2014-10-24 21:20:45 +010035config MACH_SUN6I
Ian Campbelld8e69e02014-10-24 21:20:44 +010036 bool "sun6i (Allwinner A31)"
37 select CPU_V7
Hans de Goedef07872b2015-04-06 20:33:34 +020038 select SUNXI_GEN_SUN6I
Hans de Goedea5403b92014-10-25 20:18:10 +020039 select SUPPORT_SPL
Ian Campbelld8e69e02014-10-24 21:20:44 +010040
Ian Campbell4a24a1c2014-10-24 21:20:45 +010041config MACH_SUN7I
Ian Campbelld8e69e02014-10-24 21:20:44 +010042 bool "sun7i (Allwinner A20)"
43 select CPU_V7
Hans de Goede85437352014-11-14 09:34:30 +010044 select CPU_V7_HAS_NONSEC
45 select CPU_V7_HAS_VIRT
Hans de Goedef07872b2015-04-06 20:33:34 +020046 select SUNXI_GEN_SUN4I
Ian Campbelld8e69e02014-10-24 21:20:44 +010047 select SUPPORT_SPL
Hans de Goedea5636382014-10-24 20:12:04 +020048 select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
Ian Campbelld8e69e02014-10-24 21:20:44 +010049
Hans de Goedef055ed62015-04-06 20:55:39 +020050config MACH_SUN8I_A23
Ian Campbelld8e69e02014-10-24 21:20:44 +010051 bool "sun8i (Allwinner A23)"
52 select CPU_V7
Hans de Goedef07872b2015-04-06 20:33:34 +020053 select SUNXI_GEN_SUN6I
Hans de Goede966d2392014-12-07 14:34:27 +010054 select SUPPORT_SPL
Ian Campbelld8e69e02014-10-24 21:20:44 +010055
Vishnu Patekar3702f142015-03-01 23:47:48 +053056config MACH_SUN8I_A33
57 bool "sun8i (Allwinner A33)"
58 select CPU_V7
59 select SUNXI_GEN_SUN6I
60 select SUPPORT_SPL
61
Ian Campbelld8e69e02014-10-24 21:20:44 +010062endchoice
Maxime Ripard2c519412014-10-03 20:16:29 +080063
Hans de Goedef055ed62015-04-06 20:55:39 +020064# The sun8i SoCs share a lot, this helps to avoid a lot of "if A23 || A33"
65config MACH_SUN8I
66 bool
67 default y if MACH_SUN8I_A23 || MACH_SUN8I_A33
68
69
Hans de Goede3aeaa282014-11-15 19:46:39 +010070config DRAM_CLK
Hans de Goede59d9fc72015-01-17 14:24:55 +010071 int "sunxi dram clock speed"
72 default 312 if MACH_SUN6I || MACH_SUN8I
73 default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
Hans de Goede3aeaa282014-11-15 19:46:39 +010074 ---help---
75 Set the dram clock speed, valid range 240 - 480, must be a multiple
Hans de Goede06ddc452015-01-25 11:29:27 +010076 of 24.
Hans de Goede3aeaa282014-11-15 19:46:39 +010077
Siarhei Siamashka47359bb2015-02-01 00:27:06 +020078if MACH_SUN5I || MACH_SUN7I
79config DRAM_MBUS_CLK
80 int "sunxi mbus clock speed"
81 default 300
82 ---help---
83 Set the mbus clock speed. The maximum on sun5i hardware is 300MHz.
84
85endif
86
Hans de Goede3aeaa282014-11-15 19:46:39 +010087config DRAM_ZQ
Hans de Goede59d9fc72015-01-17 14:24:55 +010088 int "sunxi dram zq value"
89 default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
90 default 127 if MACH_SUN7I
Hans de Goede3aeaa282014-11-15 19:46:39 +010091 ---help---
Hans de Goede06ddc452015-01-25 11:29:27 +010092 Set the dram zq value.
Hans de Goede3aeaa282014-11-15 19:46:39 +010093
Hans de Goedeffdc05c2015-05-13 15:00:46 +020094config DRAM_ODT_EN
95 bool "sunxi dram odt enable"
96 default n if !MACH_SUN8I_A23
97 default y if MACH_SUN8I_A23
98 ---help---
99 Select this to enable dram odt (on die termination).
100
Hans de Goede59d9fc72015-01-17 14:24:55 +0100101if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
102config DRAM_EMR1
103 int "sunxi dram emr1 value"
104 default 0 if MACH_SUN4I
105 default 4 if MACH_SUN5I || MACH_SUN7I
106 ---help---
Hans de Goede06ddc452015-01-25 11:29:27 +0100107 Set the dram controller emr1 value.
Siarhei Siamashka9900db12015-02-01 00:27:05 +0200108
Siarhei Siamashka47359bb2015-02-01 00:27:06 +0200109config DRAM_TPR3
110 hex "sunxi dram tpr3 value"
111 default 0
112 ---help---
113 Set the dram controller tpr3 parameter. This parameter configures
114 the delay on the command lane and also phase shifts, which are
115 applied for sampling incoming read data. The default value 0
116 means that no phase/delay adjustments are necessary. Properly
117 configuring this parameter increases reliability at high DRAM
118 clock speeds.
119
120config DRAM_DQS_GATING_DELAY
121 hex "sunxi dram dqs_gating_delay value"
122 default 0
123 ---help---
124 Set the dram controller dqs_gating_delay parmeter. Each byte
125 encodes the DQS gating delay for each byte lane. The delay
126 granularity is 1/4 cycle. For example, the value 0x05060606
127 means that the delay is 5 quarter-cycles for one lane (1.25
128 cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes.
129 The default value 0 means autodetection. The results of hardware
130 autodetection are not very reliable and depend on the chip
131 temperature (sometimes producing different results on cold start
132 and warm reboot). But the accuracy of hardware autodetection
133 is usually good enough, unless running at really high DRAM
134 clocks speeds (up to 600MHz). If unsure, keep as 0.
135
Siarhei Siamashka9900db12015-02-01 00:27:05 +0200136choice
137 prompt "sunxi dram timings"
138 default DRAM_TIMINGS_VENDOR_MAGIC
139 ---help---
140 Select the timings of the DDR3 chips.
141
142config DRAM_TIMINGS_VENDOR_MAGIC
143 bool "Magic vendor timings from Android"
144 ---help---
145 The same DRAM timings as in the Allwinner boot0 bootloader.
146
147config DRAM_TIMINGS_DDR3_1066F_1333H
148 bool "JEDEC DDR3-1333H with down binning to DDR3-1066F"
149 ---help---
150 Use the timings of the standard JEDEC DDR3-1066F speed bin for
151 DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin
152 for DRAM_CLK > 533MHz. This covers the majority of DDR3 chips
153 used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333
154 or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm
155 that down binning to DDR3-1066F is supported (because DDR3-1066F
156 uses a bit faster timings than DDR3-1333H).
157
158config DRAM_TIMINGS_DDR3_800E_1066G_1333J
159 bool "JEDEC DDR3-800E / DDR3-1066G / DDR3-1333J"
160 ---help---
161 Use the timings of the slowest possible JEDEC speed bin for the
162 selected DRAM_CLK. Depending on the DRAM_CLK value, it may be
163 DDR3-800E, DDR3-1066G or DDR3-1333J.
164
165endchoice
166
Hans de Goede3aeaa282014-11-15 19:46:39 +0100167endif
168
Hans de Goedeffdc05c2015-05-13 15:00:46 +0200169if MACH_SUN8I_A23
170config DRAM_ODT_CORRECTION
171 int "sunxi dram odt correction value"
172 default 0
173 ---help---
174 Set the dram odt correction value (range -255 - 255). In allwinner
175 fex files, this option is found in bits 8-15 of the u32 odt_en variable
176 in the [dram] section. When bit 31 of the odt_en variable is set
177 then the correction is negative. Usually the value for this is 0.
178endif
179
Iain Paton630df142015-03-28 10:26:38 +0000180config SYS_CLK_FREQ
181 default 912000000 if MACH_SUN7I
182 default 1008000000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
183
Maxime Ripard2c519412014-10-03 20:16:29 +0800184config SYS_CONFIG_NAME
Ian Campbell4a24a1c2014-10-24 21:20:45 +0100185 default "sun4i" if MACH_SUN4I
186 default "sun5i" if MACH_SUN5I
187 default "sun6i" if MACH_SUN6I
188 default "sun7i" if MACH_SUN7I
189 default "sun8i" if MACH_SUN8I
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900190
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900191config SYS_BOARD
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900192 default "sunxi"
193
194config SYS_SOC
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900195 default "sunxi"
196
Siarhei Siamashka121161f2014-12-25 02:34:47 +0200197config UART0_PORT_F
198 bool "UART0 on MicroSD breakout board"
Siarhei Siamashka121161f2014-12-25 02:34:47 +0200199 default n
200 ---help---
201 Repurpose the SD card slot for getting access to the UART0 serial
202 console. Primarily useful only for low level u-boot debugging on
203 tablets, where normal UART0 is difficult to access and requires
204 device disassembly and/or soldering. As the SD card can't be used
205 at the same time, the system can be only booted in the FEL mode.
206 Only enable this if you really know what you are doing.
207
Hans de Goede05e5bcb2014-10-22 14:56:36 +0200208config OLD_SUNXI_KERNEL_COMPAT
209 boolean "Enable workarounds for booting old kernels"
210 default n
211 ---help---
212 Set this to enable various workarounds for old kernels, this results in
213 sub-optimal settings for newer kernels, only enable if needed.
214
Hans de Goede7412ef82014-10-02 20:29:26 +0200215config MMC0_CD_PIN
216 string "Card detect pin for mmc0"
217 default ""
218 ---help---
219 Set the card detect pin for mmc0, leave empty to not use cd. This
220 takes a string in the format understood by sunxi_name_to_gpio, e.g.
221 PH1 for pin 1 of port H.
222
223config MMC1_CD_PIN
224 string "Card detect pin for mmc1"
225 default ""
226 ---help---
227 See MMC0_CD_PIN help text.
228
229config MMC2_CD_PIN
230 string "Card detect pin for mmc2"
231 default ""
232 ---help---
233 See MMC0_CD_PIN help text.
234
235config MMC3_CD_PIN
236 string "Card detect pin for mmc3"
237 default ""
238 ---help---
239 See MMC0_CD_PIN help text.
240
Paul Kocialkowskid390d8c2015-03-22 18:12:23 +0100241config MMC1_PINS
242 string "Pins for mmc1"
243 default ""
244 ---help---
245 Set the pins used for mmc1, when applicable. This takes a string in the
246 format understood by sunxi_name_to_gpio_bank, e.g. PH for port H.
247
248config MMC2_PINS
249 string "Pins for mmc2"
250 default ""
251 ---help---
252 See MMC1_PINS help text.
253
254config MMC3_PINS
255 string "Pins for mmc3"
256 default ""
257 ---help---
258 See MMC1_PINS help text.
259
Hans de Goedeaf593e42014-10-02 20:43:50 +0200260config MMC_SUNXI_SLOT_EXTRA
261 int "mmc extra slot number"
262 default -1
263 ---help---
264 sunxi builds always enable mmc0, some boards also have a second sdcard
265 slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
266 support for this.
267
Hans de Goedee7b852a2015-01-07 15:26:06 +0100268config USB0_VBUS_PIN
269 string "Vbus enable pin for usb0 (otg)"
270 default ""
271 ---help---
272 Set the Vbus enable pin for usb0 (otg). This takes a string in the
273 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
274
Hans de Goedeeaa0d702015-02-16 22:13:43 +0100275config USB0_VBUS_DET
276 string "Vbus detect pin for usb0 (otg)"
Hans de Goedeeaa0d702015-02-16 22:13:43 +0100277 default ""
278 ---help---
279 Set the Vbus detect pin for usb0 (otg). This takes a string in the
280 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
281
Hans de Goedeaf4273b2014-11-07 16:09:00 +0100282config USB1_VBUS_PIN
283 string "Vbus enable pin for usb1 (ehci0)"
284 default "PH6" if MACH_SUN4I || MACH_SUN7I
Hans de Goedeb5ab8ce2014-11-07 14:51:12 +0100285 default "PH27" if MACH_SUN6I
Hans de Goedeaf4273b2014-11-07 16:09:00 +0100286 ---help---
287 Set the Vbus enable pin for usb1 (ehci0, usb0 is the otg). This takes
288 a string in the format understood by sunxi_name_to_gpio, e.g.
289 PH1 for pin 1 of port H.
290
291config USB2_VBUS_PIN
292 string "Vbus enable pin for usb2 (ehci1)"
293 default "PH3" if MACH_SUN4I || MACH_SUN7I
Hans de Goedeb5ab8ce2014-11-07 14:51:12 +0100294 default "PH24" if MACH_SUN6I
Hans de Goedeaf4273b2014-11-07 16:09:00 +0100295 ---help---
296 See USB1_VBUS_PIN help text.
297
Paul Kocialkowski0a3ec0a2015-04-10 23:09:52 +0200298config I2C0_ENABLE
299 bool "Enable I2C/TWI controller 0"
300 default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
301 default n if MACH_SUN6I || MACH_SUN8I
302 ---help---
303 This allows enabling I2C/TWI controller 0 by muxing its pins, enabling
304 its clock and setting up the bus. This is especially useful on devices
305 with slaves connected to the bus or with pins exposed through e.g. an
306 expansion port/header.
307
308config I2C1_ENABLE
309 bool "Enable I2C/TWI controller 1"
310 default n
311 ---help---
312 See I2C0_ENABLE help text.
313
314config I2C2_ENABLE
315 bool "Enable I2C/TWI controller 2"
316 default n
317 ---help---
318 See I2C0_ENABLE help text.
319
320if MACH_SUN6I || MACH_SUN7I
321config I2C3_ENABLE
322 bool "Enable I2C/TWI controller 3"
323 default n
324 ---help---
325 See I2C0_ENABLE help text.
326endif
327
328if MACH_SUN7I
329config I2C4_ENABLE
330 bool "Enable I2C/TWI controller 4"
331 default n
332 ---help---
333 See I2C0_ENABLE help text.
334endif
335
Hans de Goede3ae1d132015-04-25 17:25:14 +0200336config AXP_GPIO
337 boolean "Enable support for gpio-s on axp PMICs"
338 default n
339 ---help---
340 Say Y here to enable support for the gpio pins of the axp PMIC ICs.
341
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200342config VIDEO
Hans de Goede7e68a1b2014-12-21 16:28:32 +0100343 boolean "Enable graphical uboot console on HDMI, LCD or VGA"
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200344 default y
345 ---help---
Hans de Goede7e68a1b2014-12-21 16:28:32 +0100346 Say Y here to add support for using a cfb console on the HDMI, LCD
347 or VGA output found on most sunxi devices. See doc/README.video for
348 info on how to select the video output and mode.
349
Hans de Goedee9544592014-12-23 23:04:35 +0100350config VIDEO_HDMI
351 boolean "HDMI output support"
352 depends on VIDEO && !MACH_SUN8I
353 default y
354 ---help---
355 Say Y here to add support for outputting video over HDMI.
356
Hans de Goede260f5202014-12-25 13:58:06 +0100357config VIDEO_VGA
358 boolean "VGA output support"
359 depends on VIDEO && (MACH_SUN4I || MACH_SUN7I)
360 default n
361 ---help---
362 Say Y here to add support for outputting video over VGA.
363
Hans de Goedeac1633c2014-12-24 12:17:07 +0100364config VIDEO_VGA_VIA_LCD
365 boolean "VGA via LCD controller support"
Chen-Yu Tsai39ca4c12015-01-12 18:02:10 +0800366 depends on VIDEO && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I)
Hans de Goedeac1633c2014-12-24 12:17:07 +0100367 default n
368 ---help---
369 Say Y here to add support for external DACs connected to the parallel
370 LCD interface driving a VGA connector, such as found on the
371 Olimex A13 boards.
372
Hans de Goede18366f72015-01-25 15:33:07 +0100373config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
374 boolean "Force sync active high for VGA via LCD controller support"
375 depends on VIDEO_VGA_VIA_LCD
376 default n
377 ---help---
378 Say Y here if you've a board which uses opendrain drivers for the vga
379 hsync and vsync signals. Opendrain drivers cannot generate steep enough
380 positive edges for a stable video output, so on boards with opendrain
381 drivers the sync signals must always be active high.
382
Chen-Yu Tsai9ed19522015-01-12 18:02:11 +0800383config VIDEO_VGA_EXTERNAL_DAC_EN
384 string "LCD panel power enable pin"
385 depends on VIDEO_VGA_VIA_LCD
386 default ""
387 ---help---
388 Set the enable pin for the external VGA DAC. This takes a string in the
389 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
390
Hans de Goede7e68a1b2014-12-21 16:28:32 +0100391config VIDEO_LCD_MODE
392 string "LCD panel timing details"
393 depends on VIDEO
394 default ""
395 ---help---
396 LCD panel timing details string, leave empty if there is no LCD panel.
397 This is in drivers/video/videomodes.c: video_get_params() format, e.g.
398 x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0
399
Hans de Goede481b6642015-01-13 13:21:46 +0100400config VIDEO_LCD_DCLK_PHASE
401 int "LCD panel display clock phase"
402 depends on VIDEO
403 default 1
404 ---help---
405 Select LCD panel display clock phase shift, range 0-3.
406
Hans de Goede7e68a1b2014-12-21 16:28:32 +0100407config VIDEO_LCD_POWER
408 string "LCD panel power enable pin"
409 depends on VIDEO
410 default ""
411 ---help---
412 Set the power enable pin for the LCD panel. This takes a string in the
413 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
414
Hans de Goedece9e3322015-02-16 17:26:41 +0100415config VIDEO_LCD_RESET
416 string "LCD panel reset pin"
417 depends on VIDEO
418 default ""
419 ---help---
420 Set the reset pin for the LCD panel. This takes a string in the format
421 understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
422
Hans de Goede7e68a1b2014-12-21 16:28:32 +0100423config VIDEO_LCD_BL_EN
424 string "LCD panel backlight enable pin"
425 depends on VIDEO
426 default ""
427 ---help---
428 Set the backlight enable pin for the LCD panel. This takes a string in the
429 the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of
430 port H.
431
432config VIDEO_LCD_BL_PWM
433 string "LCD panel backlight pwm pin"
434 depends on VIDEO
435 default ""
436 ---help---
437 Set the backlight pwm pin for the LCD panel. This takes a string in the
438 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200439
Hans de Goede2d5d3022015-01-22 21:02:42 +0100440config VIDEO_LCD_BL_PWM_ACTIVE_LOW
441 bool "LCD panel backlight pwm is inverted"
442 depends on VIDEO
443 default y
444 ---help---
445 Set this if the backlight pwm output is active low.
446
Hans de Goedea5b4cfe2015-02-16 17:23:25 +0100447config VIDEO_LCD_PANEL_I2C
448 bool "LCD panel needs to be configured via i2c"
449 depends on VIDEO
Hans de Goede6de9f762015-03-07 12:00:02 +0100450 default n
Hans de Goedea5b4cfe2015-02-16 17:23:25 +0100451 ---help---
452 Say y here if the LCD panel needs to be configured via i2c. This
453 will add a bitbang i2c controller using gpios to talk to the LCD.
454
455config VIDEO_LCD_PANEL_I2C_SDA
456 string "LCD panel i2c interface SDA pin"
457 depends on VIDEO_LCD_PANEL_I2C
458 default "PG12"
459 ---help---
460 Set the SDA pin for the LCD i2c interface. This takes a string in the
461 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
462
463config VIDEO_LCD_PANEL_I2C_SCL
464 string "LCD panel i2c interface SCL pin"
465 depends on VIDEO_LCD_PANEL_I2C
466 default "PG10"
467 ---help---
468 Set the SCL pin for the LCD i2c interface. This takes a string in the
469 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
470
Hans de Goede797a0f52015-01-01 22:04:34 +0100471
472# Note only one of these may be selected at a time! But hidden choices are
473# not supported by Kconfig
474config VIDEO_LCD_IF_PARALLEL
475 bool
476
477config VIDEO_LCD_IF_LVDS
478 bool
479
480
481choice
482 prompt "LCD panel support"
483 depends on VIDEO
484 ---help---
485 Select which type of LCD panel to support.
486
487config VIDEO_LCD_PANEL_PARALLEL
488 bool "Generic parallel interface LCD panel"
489 select VIDEO_LCD_IF_PARALLEL
490
491config VIDEO_LCD_PANEL_LVDS
492 bool "Generic lvds interface LCD panel"
493 select VIDEO_LCD_IF_LVDS
494
Siarhei Siamashkac02f0522015-01-19 05:23:33 +0200495config VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828
496 bool "MIPI 4-lane, 513Mbps LCD panel via SSD2828 bridge chip"
497 select VIDEO_LCD_SSD2828
498 select VIDEO_LCD_IF_PARALLEL
499 ---help---
500 7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0
501
Hans de Goede743fb9552015-01-20 09:23:36 +0100502config VIDEO_LCD_PANEL_HITACHI_TX18D42VM
503 bool "Hitachi tx18d42vm LCD panel"
504 select VIDEO_LCD_HITACHI_TX18D42VM
505 select VIDEO_LCD_IF_LVDS
506 ---help---
507 7.85" 1024x768 Hitachi tx18d42vm LCD panel support
508
Hans de Goede613dade2015-02-16 17:49:47 +0100509config VIDEO_LCD_TL059WV5C0
510 bool "tl059wv5c0 LCD panel"
511 select VIDEO_LCD_PANEL_I2C
512 select VIDEO_LCD_IF_PARALLEL
513 ---help---
514 6" 480x800 tl059wv5c0 panel support, as used on the Utoo P66 and
515 Aigo M60/M608/M606 tablets.
516
Hans de Goede797a0f52015-01-01 22:04:34 +0100517endchoice
518
519
Hans de Goedef494cad2015-01-11 17:17:00 +0100520config USB_MUSB_SUNXI
521 bool "Enable sunxi OTG / DRC USB controller in host mode"
522 default n
523 ---help---
524 Say y here to enable support for the sunxi OTG / DRC USB controller
525 used on almost all sunxi boards. Note currently u-boot can only have
526 one usb host controller enabled at a time, so enabling this on boards
527 which also use the ehci host controller will result in build errors.
528
Hans de Goede16030822014-09-18 21:03:34 +0200529config USB_KEYBOARD
530 boolean "Enable USB keyboard support"
531 default y
532 ---help---
533 Say Y here to add support for using a USB keyboard (typically used
Hans de Goede7e68a1b2014-12-21 16:28:32 +0100534 in combination with a graphical console).
Hans de Goede16030822014-09-18 21:03:34 +0200535
Hans de Goedebf880fe2015-01-25 12:10:48 +0100536config GMAC_TX_DELAY
537 int "GMAC Transmit Clock Delay Chain"
538 default 0
539 ---help---
540 Set the GMAC Transmit Clock Delay Chain value.
541
Hans de Goede7976b282015-05-05 12:49:36 +0200542config SYS_MALLOC_CLEAR_ON_INIT
543 default n
544
Hans de Goede03914882015-04-15 20:46:48 +0200545config NET
546 default y
547
548config NETDEVICES
549 default y
550
551config DM_ETH
552 default y
553
554config DM_SERIAL
555 default y
556
Hans de Goede4dba1082015-05-10 14:10:26 +0200557config DM_USB
558 default y if !USB_MUSB_SUNXI
559
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900560endif