Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 78928e12aad705a6cf67477d2c8c3c61adc59942 / . / drivers / clk / Kconfig
blob: 4dfbad7986b11f6dd2a296ba46f4e0574d64547d [file] [log] [blame]
Masahiro Yamada92b8c2f2016-01-12 16:36:38 +0900[diff] [blame]1menu "Clock"
2
Simon Glass36ad2342015-06-23 15:39:15 -0600[diff] [blame]3config CLK
4 bool "Enable clock driver support"
5 depends on DM
6 help
7 This allows drivers to be provided for clock generators, including
8 oscillators and PLLs. Devices can use a common clock API to request
9 a particular clock rate and check on available clocks. Clocks can
10 feed into other clocks in a tree structure, with multiplexers to
11 choose the source for each clock.
12
Masahiro Yamadab16de452015-08-12 07:31:46 +0900[diff] [blame]13config SPL_CLK
Simon Glass36ad2342015-06-23 15:39:15 -0600[diff] [blame]14 bool "Enable clock support in SPL"
Wenyou Yange4cf4132017-07-31 15:21:57 +0800[diff] [blame]15 depends on CLK && SPL && SPL_DM
Simon Glass36ad2342015-06-23 15:39:15 -0600[diff] [blame]16 help
17 The clock subsystem adds a small amount of overhead to the image.
18 If this is acceptable and you have a need to use clock drivers in
19 SPL, enable this option. It might provide a cleaner interface to
20 setting up clocks within SPL, and allows the same drivers to be
21 used as U-Boot proper.
Masahiro Yamada92b8c2f2016-01-12 16:36:38 +0900[diff] [blame]22
Philipp Tomsich592c3db2017-06-29 01:45:01 +0200[diff] [blame]23config TPL_CLK
24 bool "Enable clock support in TPL"
25 depends on CLK && TPL_DM
26 help
27 The clock subsystem adds a small amount of overhead to the image.
28 If this is acceptable and you have a need to use clock drivers in
29 SPL, enable this option. It might provide a cleaner interface to
30 setting up clocks within TPL, and allows the same drivers to be
31 used as U-Boot proper.
32
Álvaro Fernández Rojasc35611c2017-05-07 20:13:01 +0200[diff] [blame]33config CLK_BCM6345
34 bool "Clock controller driver for BCM6345"
35 depends on CLK && ARCH_BMIPS
36 default y
37 help
38 This clock driver adds support for enabling and disabling peripheral
39 clocks on BCM6345 SoCs. HW has no rate changing capabilities.
40
Paul Burton0399f442016-09-08 07:47:38 +0100[diff] [blame]41config CLK_BOSTON
42 def_bool y if TARGET_BOSTON
43 depends on CLK
44 select REGMAP
45 select SYSCON
46 help
47 Enable this to support the clocks
48
Lukasz Majewski4de44bb2019-06-24 15:50:45 +0200[diff] [blame]49config SPL_CLK_CCF
50 bool "SPL Common Clock Framework [CCF] support "
Adam Fordac4d80e2019-08-24 13:50:34 -0500[diff] [blame]51 depends on SPL
Lukasz Majewski4de44bb2019-06-24 15:50:45 +0200[diff] [blame]52 help
53 Enable this option if you want to (re-)use the Linux kernel's Common
54 Clock Framework [CCF] code in U-Boot's SPL.
55
Peng Fan2d9bd932019-07-31 07:01:54 +0000[diff] [blame]56config SPL_CLK_COMPOSITE_CCF
57 bool "SPL Common Clock Framework [CCF] composite clk support "
58 depends on SPL_CLK_CCF
59 help
60 Enable this option if you want to (re-)use the Linux kernel's Common
61 Clock Framework [CCF] composite code in U-Boot's SPL.
62
Lukasz Majewski4de44bb2019-06-24 15:50:45 +0200[diff] [blame]63config CLK_CCF
64 bool "Common Clock Framework [CCF] support "
Lukasz Majewski4de44bb2019-06-24 15:50:45 +0200[diff] [blame]65 help
66 Enable this option if you want to (re-)use the Linux kernel's Common
67 Clock Framework [CCF] code in U-Boot's clock driver.
68
Peng Fan2d9bd932019-07-31 07:01:54 +0000[diff] [blame]69config CLK_COMPOSITE_CCF
70 bool "Common Clock Framework [CCF] composite clk support "
71 depends on CLK_CCF
72 help
73 Enable this option if you want to (re-)use the Linux kernel's Common
74 Clock Framework [CCF] composite code in U-Boot's clock driver.
75
Simon Glass6eb4e3c2020-02-06 09:54:53 -0700[diff] [blame]76config CLK_INTEL
77 bool "Enable clock driver for Intel x86"
78 depends on CLK && X86
79 help
80 This provides very basic support for clocks on Intel SoCs. The driver
81 is barely used at present but could be expanded as needs arise.
82 Much clock configuration in U-Boot is either set up by the FSP, or
83 set up by U-Boot itself but only statically. Thus the driver does not
84 support changing clock rates, only querying them.
85
Stefan Roese560b07f2020-07-30 13:56:16 +0200[diff] [blame]86config CLK_OCTEON
87 bool "Clock controller driver for Marvell MIPS Octeon"
88 depends on CLK && ARCH_OCTEON
89 default y
90 help
91 Enable this to support the clocks on Octeon MIPS platforms.
92
Patrice Chotardd4f2d202017-11-15 13:14:48 +0100[diff] [blame]93config CLK_STM32F
94 bool "Enable clock driver support for STM32F family"
95 depends on CLK && (STM32F7 || STM32F4)
96 default y
97 help
98 This clock driver adds support for RCC clock management
99 for STM32F4 and STM32F7 SoCs.
100
Andreas Dannenberg1530e352018-08-27 15:57:43 +0530[diff] [blame]101config CLK_TI_SCI
102 bool "TI System Control Interface (TI SCI) clock driver"
103 depends on CLK && TI_SCI_PROTOCOL && OF_CONTROL
104 help
105 This enables the clock driver support over TI System Control Interface
106 available on some new TI's SoCs. If you wish to use clock resources
107 managed by the TI System Controller, say Y here. Otherwise, say N.
108
Eugeniy Paltsev7e1fb092017-12-10 21:20:08 +0300[diff] [blame]109config CLK_HSDK
Eugeniy Paltsev6bd63fc2020-05-07 22:20:10 +0300[diff] [blame]110 bool "Enable cgu clock driver for HSDK boards"
111 depends on CLK && TARGET_HSDK
Eugeniy Paltsev7e1fb092017-12-10 21:20:08 +0300[diff] [blame]112 help
Eugeniy Paltsev6bd63fc2020-05-07 22:20:10 +0300[diff] [blame]113 Enable this to support the cgu clocks on Synopsys ARC HSDK and
114 Synopsys ARC HSDK-4xD boards
Eugeniy Paltsev7e1fb092017-12-10 21:20:08 +0300[diff] [blame]115
Siva Durga Prasad Paladuguf7a71202019-06-23 12:24:57 +0530[diff] [blame]116config CLK_VERSAL
117 bool "Enable clock driver support for Versal"
118 depends on ARCH_VERSAL
119 select ZYNQMP_FIRMWARE
120 help
121 This clock driver adds support for clock realted settings for
122 Versal platform.
123
Liviu Dudauba024e62018-09-17 17:50:00 +0100[diff] [blame]124config CLK_VEXPRESS_OSC
125 bool "Enable driver for Arm Versatile Express OSC clock generators"
126 depends on CLK && VEXPRESS_CONFIG
127 help
128 This clock driver adds support for clock generators present on
129 Arm Versatile Express platforms.
130
Stefan Herbrechtsmeierf1f88c92017-01-17 16:27:29 +0100[diff] [blame]131config CLK_ZYNQ
132 bool "Enable clock driver support for Zynq"
133 depends on CLK && ARCH_ZYNQ
134 default y
135 help
136 This clock driver adds support for clock realted settings for
137 Zynq platform.
138
Siva Durga Prasad Paladugu468b55f2016-11-15 16:15:41 +0530[diff] [blame]139config CLK_ZYNQMP
140 bool "Enable clock driver support for ZynqMP"
141 depends on ARCH_ZYNQMP
Rajan Vaja833be322019-02-15 04:45:32 -0800[diff] [blame]142 select ZYNQMP_FIRMWARE
Siva Durga Prasad Paladugu468b55f2016-11-15 16:15:41 +0530[diff] [blame]143 help
144 This clock driver adds support for clock realted settings for
145 ZynqMP platform.
146
Patrick Delaunaye6ab6272018-03-12 10:46:15 +0100[diff] [blame]147config CLK_STM32MP1
148 bool "Enable RCC clock driver for STM32MP1"
149 depends on ARCH_STM32MP && CLK
150 default y
151 help
152 Enable the STM32 clock (RCC) driver. Enable support for
153 manipulating STM32MP1's on-SoC clocks.
154
Tero Kristo814c6112019-09-27 19:14:26 +0300[diff] [blame]155config CLK_CDCE9XX
156 bool "Enable CDCD9XX clock driver"
157 depends on CLK
158 help
159 Enable the clock synthesizer driver for CDCE913/925/937/949
160 series of chips.
161
Etienne Carriere78928e12020-09-09 18:44:04 +0200[diff] [blame^]162config CLK_SCMI
163 bool "Enable SCMI clock driver"
164 depends on SCMI_FIRMWARE
165 help
166 Enable this option if you want to support clock devices exposed
167 by a SCMI agent based on SCMI clock protocol communication
168 with a SCMI server.
169
Anup Patel00a156d2019-06-25 06:31:02 +0000[diff] [blame]170source "drivers/clk/analogbits/Kconfig"
Wenyou Yang8c772bd2016-07-20 17:55:12 +0800[diff] [blame]171source "drivers/clk/at91/Kconfig"
Jagan Teki9d2787c2018-07-30 18:26:18 +0530[diff] [blame]172source "drivers/clk/exynos/Kconfig"
Peng Fan5e80d5a2018-10-18 14:28:30 +0200[diff] [blame]173source "drivers/clk/imx/Kconfig"
Sean Anderson6e887ee2020-06-24 06:41:09 -0400[diff] [blame]174source "drivers/clk/kendryte/Kconfig"
Jerome Brunet3da39a82019-02-10 14:54:30 +0100[diff] [blame]175source "drivers/clk/meson/Kconfig"
Marek Behún61d74e82018-04-24 17:21:25 +0200[diff] [blame]176source "drivers/clk/mvebu/Kconfig"
Manivannan Sadhasivam91a85132018-06-14 23:38:35 +0530[diff] [blame]177source "drivers/clk/owl/Kconfig"
Jagan Teki9d2787c2018-07-30 18:26:18 +0530[diff] [blame]178source "drivers/clk/renesas/Kconfig"
Jagan Teki1d150b42018-12-22 21:32:49 +0530[diff] [blame]179source "drivers/clk/sunxi/Kconfig"
Anup Patel42fdf082019-02-25 08:14:49 +0000[diff] [blame]180source "drivers/clk/sifive/Kconfig"
Jagan Teki9d2787c2018-07-30 18:26:18 +0530[diff] [blame]181source "drivers/clk/tegra/Kconfig"
182source "drivers/clk/uniphier/Kconfig"
Masahiro Yamadae4dfb052016-02-02 21:11:32 +0900[diff] [blame]183
Mario Sixa3c07062018-04-27 14:53:15 +0200[diff] [blame]184config ICS8N3QV01
185 bool "Enable ICS8N3QV01 VCXO driver"
186 depends on CLK
187 help
188 Support for the ICS8N3QV01 Quad-Frequency VCXO (Voltage-Controlled
189 Crystal Oscillator). The output frequency can be programmed via an
190 I2C interface.
191
Mario Six7cab1472018-08-06 10:23:36 +0200[diff] [blame]192config CLK_MPC83XX
193 bool "Enable MPC83xx clock driver"
194 depends on CLK
195 help
196 Support for the clock driver of the MPC83xx series of SoCs.
197
Lukasz Majewski8c0709b2019-06-24 15:50:50 +0200[diff] [blame]198config SANDBOX_CLK_CCF
199 bool "Sandbox Common Clock Framework [CCF] support "
200 depends on SANDBOX
201 select CLK_CCF
202 help
203 Enable this option if you want to test the Linux kernel's Common
204 Clock Framework [CCF] code in U-Boot's Sandbox clock driver.
205
Masahiro Yamada92b8c2f2016-01-12 16:36:38 +0900[diff] [blame]206endmenu