Masahiro Yamada | 92b8c2f | 2016-01-12 16:36:38 +0900 | [diff] [blame] | 1 | menu "Clock" |
| 2 | |
Simon Glass | 36ad234 | 2015-06-23 15:39:15 -0600 | [diff] [blame] | 3 | config CLK |
| 4 | bool "Enable clock driver support" |
| 5 | depends on DM |
| 6 | help |
| 7 | This allows drivers to be provided for clock generators, including |
| 8 | oscillators and PLLs. Devices can use a common clock API to request |
| 9 | a particular clock rate and check on available clocks. Clocks can |
| 10 | feed into other clocks in a tree structure, with multiplexers to |
| 11 | choose the source for each clock. |
| 12 | |
Masahiro Yamada | b16de45 | 2015-08-12 07:31:46 +0900 | [diff] [blame] | 13 | config SPL_CLK |
Simon Glass | 36ad234 | 2015-06-23 15:39:15 -0600 | [diff] [blame] | 14 | bool "Enable clock support in SPL" |
| 15 | depends on CLK |
| 16 | help |
| 17 | The clock subsystem adds a small amount of overhead to the image. |
| 18 | If this is acceptable and you have a need to use clock drivers in |
| 19 | SPL, enable this option. It might provide a cleaner interface to |
| 20 | setting up clocks within SPL, and allows the same drivers to be |
| 21 | used as U-Boot proper. |
Masahiro Yamada | 92b8c2f | 2016-01-12 16:36:38 +0900 | [diff] [blame] | 22 | |
Álvaro Fernández Rojas | c35611c | 2017-05-07 20:13:01 +0200 | [diff] [blame^] | 23 | config CLK_BCM6345 |
| 24 | bool "Clock controller driver for BCM6345" |
| 25 | depends on CLK && ARCH_BMIPS |
| 26 | default y |
| 27 | help |
| 28 | This clock driver adds support for enabling and disabling peripheral |
| 29 | clocks on BCM6345 SoCs. HW has no rate changing capabilities. |
| 30 | |
Paul Burton | 0399f44 | 2016-09-08 07:47:38 +0100 | [diff] [blame] | 31 | config CLK_BOSTON |
| 32 | def_bool y if TARGET_BOSTON |
| 33 | depends on CLK |
| 34 | select REGMAP |
| 35 | select SYSCON |
| 36 | help |
| 37 | Enable this to support the clocks |
| 38 | |
Stefan Herbrechtsmeier | f1f88c9 | 2017-01-17 16:27:29 +0100 | [diff] [blame] | 39 | config CLK_ZYNQ |
| 40 | bool "Enable clock driver support for Zynq" |
| 41 | depends on CLK && ARCH_ZYNQ |
| 42 | default y |
| 43 | help |
| 44 | This clock driver adds support for clock realted settings for |
| 45 | Zynq platform. |
| 46 | |
Siva Durga Prasad Paladugu | 468b55f | 2016-11-15 16:15:41 +0530 | [diff] [blame] | 47 | config CLK_ZYNQMP |
| 48 | bool "Enable clock driver support for ZynqMP" |
| 49 | depends on ARCH_ZYNQMP |
| 50 | help |
| 51 | This clock driver adds support for clock realted settings for |
| 52 | ZynqMP platform. |
| 53 | |
Stephen Warren | e8e3f20 | 2016-08-08 11:28:24 -0600 | [diff] [blame] | 54 | source "drivers/clk/tegra/Kconfig" |
Masahiro Yamada | e4dfb05 | 2016-02-02 21:11:32 +0900 | [diff] [blame] | 55 | source "drivers/clk/uniphier/Kconfig" |
Thomas Abraham | e3fc84c | 2016-04-23 22:18:09 +0530 | [diff] [blame] | 56 | source "drivers/clk/exynos/Kconfig" |
Wenyou Yang | 8c772bd | 2016-07-20 17:55:12 +0800 | [diff] [blame] | 57 | source "drivers/clk/at91/Kconfig" |
Masahiro Yamada | e4dfb05 | 2016-02-02 21:11:32 +0900 | [diff] [blame] | 58 | |
Masahiro Yamada | 92b8c2f | 2016-01-12 16:36:38 +0900 | [diff] [blame] | 59 | endmenu |