Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2016 Freescale Semiconductor, Inc. |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <common.h> |
Simon Glass | 3bbe70c | 2019-12-28 10:44:54 -0700 | [diff] [blame] | 7 | #include <fdt_support.h> |
Simon Glass | f11478f | 2019-12-28 10:45:07 -0700 | [diff] [blame] | 8 | #include <hang.h> |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 9 | #include <i2c.h> |
| 10 | #include <asm/io.h> |
| 11 | #include <asm/arch/clock.h> |
| 12 | #include <asm/arch/fsl_serdes.h> |
Prabhakar Kushwaha | 74d129b | 2017-01-30 17:05:35 +0530 | [diff] [blame] | 13 | #ifdef CONFIG_FSL_LS_PPA |
| 14 | #include <asm/arch/ppa.h> |
| 15 | #endif |
York Sun | 729f2d1 | 2017-03-06 09:02:34 -0800 | [diff] [blame] | 16 | #include <asm/arch/mmu.h> |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 17 | #include <asm/arch/soc.h> |
| 18 | #include <hwconfig.h> |
| 19 | #include <ahci.h> |
| 20 | #include <mmc.h> |
| 21 | #include <scsi.h> |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 22 | #include <fsl_esdhc.h> |
Simon Glass | 9d1f619 | 2019-08-02 09:44:25 -0600 | [diff] [blame] | 23 | #include <env_internal.h> |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 24 | #include <fsl_mmdc.h> |
| 25 | #include <netdev.h> |
Vinitha Pillai-B57223 | eea4a32 | 2017-03-23 13:48:20 +0530 | [diff] [blame] | 26 | #include <fsl_sec.h> |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 27 | |
| 28 | DECLARE_GLOBAL_DATA_PTR; |
| 29 | |
Jagdish Gediya | f9cb31e | 2018-04-13 00:18:22 +0530 | [diff] [blame] | 30 | #define BOOT_FROM_UPPER_BANK 0x2 |
| 31 | #define BOOT_FROM_LOWER_BANK 0x1 |
| 32 | |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 33 | int checkboard(void) |
| 34 | { |
Bhaskar Upadhaya | 7fff22a | 2018-01-11 20:03:31 +0530 | [diff] [blame] | 35 | #ifdef CONFIG_TARGET_LS1012ARDB |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 36 | u8 in1; |
Biwen Li | 0a759bb | 2019-12-31 15:33:41 +0800 | [diff] [blame] | 37 | int ret, bus_num = 0; |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 38 | |
| 39 | puts("Board: LS1012ARDB "); |
| 40 | |
| 41 | /* Initialize i2c early for Serial flash bank information */ |
Biwen Li | 0a759bb | 2019-12-31 15:33:41 +0800 | [diff] [blame] | 42 | #if defined(CONFIG_DM_I2C) |
| 43 | struct udevice *dev; |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 44 | |
Biwen Li | 0a759bb | 2019-12-31 15:33:41 +0800 | [diff] [blame] | 45 | ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_IO_ADDR, |
| 46 | 1, &dev); |
| 47 | if (ret) { |
| 48 | printf("%s: Cannot find udev for a bus %d\n", __func__, |
| 49 | bus_num); |
| 50 | return -ENXIO; |
| 51 | } |
| 52 | ret = dm_i2c_read(dev, I2C_MUX_IO_1, &in1, 1); |
| 53 | #else /* Non DM I2C support - will be removed */ |
| 54 | i2c_set_bus_num(bus_num); |
| 55 | ret = i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_1, 1, &in1, 1); |
| 56 | #endif |
| 57 | if (ret < 0) { |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 58 | printf("Error reading i2c boot information!\n"); |
| 59 | return 0; /* Don't want to hang() on this error */ |
| 60 | } |
| 61 | |
| 62 | puts("Version"); |
Yangbo Lu | 13acb0d | 2017-12-08 15:35:36 +0800 | [diff] [blame] | 63 | switch (in1 & SW_REV_MASK) { |
| 64 | case SW_REV_A: |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 65 | puts(": RevA"); |
Yangbo Lu | 13acb0d | 2017-12-08 15:35:36 +0800 | [diff] [blame] | 66 | break; |
| 67 | case SW_REV_B: |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 68 | puts(": RevB"); |
Yangbo Lu | 13acb0d | 2017-12-08 15:35:36 +0800 | [diff] [blame] | 69 | break; |
| 70 | case SW_REV_C: |
| 71 | puts(": RevC"); |
| 72 | break; |
| 73 | case SW_REV_C1: |
| 74 | puts(": RevC1"); |
| 75 | break; |
| 76 | case SW_REV_C2: |
| 77 | puts(": RevC2"); |
| 78 | break; |
| 79 | case SW_REV_D: |
| 80 | puts(": RevD"); |
| 81 | break; |
| 82 | case SW_REV_E: |
| 83 | puts(": RevE"); |
| 84 | break; |
| 85 | default: |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 86 | puts(": unknown"); |
Yangbo Lu | 13acb0d | 2017-12-08 15:35:36 +0800 | [diff] [blame] | 87 | break; |
| 88 | } |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 89 | |
| 90 | printf(", boot from QSPI"); |
Yangbo Lu | 2786f90 | 2017-12-08 15:35:35 +0800 | [diff] [blame] | 91 | if ((in1 & SW_BOOT_MASK) == SW_BOOT_EMU) |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 92 | puts(": emu\n"); |
Yangbo Lu | 2786f90 | 2017-12-08 15:35:35 +0800 | [diff] [blame] | 93 | else if ((in1 & SW_BOOT_MASK) == SW_BOOT_BANK1) |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 94 | puts(": bank1\n"); |
Yangbo Lu | 2786f90 | 2017-12-08 15:35:35 +0800 | [diff] [blame] | 95 | else if ((in1 & SW_BOOT_MASK) == SW_BOOT_BANK2) |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 96 | puts(": bank2\n"); |
| 97 | else |
| 98 | puts("unknown\n"); |
Bhaskar Upadhaya | 7fff22a | 2018-01-11 20:03:31 +0530 | [diff] [blame] | 99 | #else |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 100 | |
Bhaskar Upadhaya | 7fff22a | 2018-01-11 20:03:31 +0530 | [diff] [blame] | 101 | puts("Board: LS1012A2G5RDB "); |
| 102 | #endif |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 103 | return 0; |
| 104 | } |
| 105 | |
Rajesh Bhagat | fcafef6 | 2018-11-05 18:02:53 +0000 | [diff] [blame] | 106 | #ifdef CONFIG_TFABOOT |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 107 | int dram_init(void) |
| 108 | { |
Rajesh Bhagat | fcafef6 | 2018-11-05 18:02:53 +0000 | [diff] [blame] | 109 | gd->ram_size = tfa_get_dram_size(); |
| 110 | if (!gd->ram_size) |
| 111 | gd->ram_size = CONFIG_SYS_SDRAM_SIZE; |
| 112 | |
| 113 | return 0; |
| 114 | } |
| 115 | #else |
| 116 | int dram_init(void) |
| 117 | { |
| 118 | #ifndef CONFIG_TFABOOT |
York Sun | c1e979b | 2016-09-26 08:09:25 -0700 | [diff] [blame] | 119 | static const struct fsl_mmdc_info mparam = { |
| 120 | 0x05180000, /* mdctl */ |
| 121 | 0x00030035, /* mdpdc */ |
| 122 | 0x12554000, /* mdotc */ |
| 123 | 0xbabf7954, /* mdcfg0 */ |
| 124 | 0xdb328f64, /* mdcfg1 */ |
| 125 | 0x01ff00db, /* mdcfg2 */ |
| 126 | 0x00001680, /* mdmisc */ |
| 127 | 0x0f3c8000, /* mdref */ |
| 128 | 0x00002000, /* mdrwd */ |
| 129 | 0x00bf1023, /* mdor */ |
| 130 | 0x0000003f, /* mdasp */ |
| 131 | 0x0000022a, /* mpodtctrl */ |
| 132 | 0xa1390003, /* mpzqhwctrl */ |
| 133 | }; |
| 134 | |
| 135 | mmdc_init(&mparam); |
Rajesh Bhagat | fcafef6 | 2018-11-05 18:02:53 +0000 | [diff] [blame] | 136 | #endif |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 137 | |
| 138 | gd->ram_size = CONFIG_SYS_SDRAM_SIZE; |
York Sun | 729f2d1 | 2017-03-06 09:02:34 -0800 | [diff] [blame] | 139 | #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) |
| 140 | /* This will break-before-make MMU for DDR */ |
| 141 | update_early_mmu_table(); |
| 142 | #endif |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 143 | |
| 144 | return 0; |
| 145 | } |
Rajesh Bhagat | fcafef6 | 2018-11-05 18:02:53 +0000 | [diff] [blame] | 146 | #endif |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 147 | |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 148 | |
| 149 | int board_early_init_f(void) |
| 150 | { |
| 151 | fsl_lsch2_early_init_f(); |
| 152 | |
| 153 | return 0; |
| 154 | } |
| 155 | |
| 156 | int board_init(void) |
| 157 | { |
Ashish Kumar | 1123406 | 2017-08-11 11:09:14 +0530 | [diff] [blame] | 158 | struct ccsr_cci400 *cci = (struct ccsr_cci400 *)(CONFIG_SYS_IMMR + |
| 159 | CONFIG_SYS_CCI400_OFFSET); |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 160 | /* |
| 161 | * Set CCI-400 control override register to enable barrier |
| 162 | * transaction |
| 163 | */ |
Rajesh Bhagat | fcafef6 | 2018-11-05 18:02:53 +0000 | [diff] [blame] | 164 | if (current_el() == 3) |
| 165 | out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER); |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 166 | |
Hou Zhiqiang | 4b23ca8 | 2016-08-02 19:03:27 +0800 | [diff] [blame] | 167 | #ifdef CONFIG_SYS_FSL_ERRATUM_A010315 |
| 168 | erratum_a010315(); |
| 169 | #endif |
| 170 | |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 171 | #ifdef CONFIG_ENV_IS_NOWHERE |
| 172 | gd->env_addr = (ulong)&default_environment[0]; |
| 173 | #endif |
| 174 | |
Vinitha Pillai-B57223 | eea4a32 | 2017-03-23 13:48:20 +0530 | [diff] [blame] | 175 | #ifdef CONFIG_FSL_CAAM |
| 176 | sec_init(); |
| 177 | #endif |
| 178 | |
Prabhakar Kushwaha | 74d129b | 2017-01-30 17:05:35 +0530 | [diff] [blame] | 179 | #ifdef CONFIG_FSL_LS_PPA |
| 180 | ppa_init(); |
| 181 | #endif |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 182 | return 0; |
| 183 | } |
| 184 | |
Bhaskar Upadhaya | 7fff22a | 2018-01-11 20:03:31 +0530 | [diff] [blame] | 185 | #ifdef CONFIG_TARGET_LS1012ARDB |
Yangbo Lu | b2495c0 | 2017-01-17 10:43:56 +0800 | [diff] [blame] | 186 | int esdhc_status_fixup(void *blob, const char *compat) |
| 187 | { |
Yangbo Lu | b2495c0 | 2017-01-17 10:43:56 +0800 | [diff] [blame] | 188 | char esdhc1_path[] = "/soc/esdhc@1580000"; |
Yangbo Lu | 878c978 | 2017-12-08 15:35:37 +0800 | [diff] [blame] | 189 | bool sdhc2_en = false; |
Yangbo Lu | b2495c0 | 2017-01-17 10:43:56 +0800 | [diff] [blame] | 190 | u8 mux_sdhc2; |
Yangbo Lu | 878c978 | 2017-12-08 15:35:37 +0800 | [diff] [blame] | 191 | u8 io = 0; |
Biwen Li | 0a759bb | 2019-12-31 15:33:41 +0800 | [diff] [blame] | 192 | int ret, bus_num = 0; |
Yangbo Lu | b2495c0 | 2017-01-17 10:43:56 +0800 | [diff] [blame] | 193 | |
Biwen Li | 0a759bb | 2019-12-31 15:33:41 +0800 | [diff] [blame] | 194 | #if defined(CONFIG_DM_I2C) |
| 195 | struct udevice *dev; |
Yangbo Lu | b2495c0 | 2017-01-17 10:43:56 +0800 | [diff] [blame] | 196 | |
Biwen Li | 0a759bb | 2019-12-31 15:33:41 +0800 | [diff] [blame] | 197 | ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_IO_ADDR, |
| 198 | 1, &dev); |
| 199 | if (ret) { |
| 200 | printf("%s: Cannot find udev for a bus %d\n", __func__, |
| 201 | bus_num); |
| 202 | return -ENXIO; |
| 203 | } |
| 204 | ret = dm_i2c_read(dev, I2C_MUX_IO_1, &io, 1); |
| 205 | #else |
| 206 | i2c_set_bus_num(bus_num); |
Yangbo Lu | 878c978 | 2017-12-08 15:35:37 +0800 | [diff] [blame] | 207 | /* IO1[7:3] is the field of board revision info. */ |
Biwen Li | 0a759bb | 2019-12-31 15:33:41 +0800 | [diff] [blame] | 208 | ret = i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_1, 1, &io, 1); |
| 209 | #endif |
| 210 | if (ret < 0) { |
Yangbo Lu | b2495c0 | 2017-01-17 10:43:56 +0800 | [diff] [blame] | 211 | printf("Error reading i2c boot information!\n"); |
Yangbo Lu | 878c978 | 2017-12-08 15:35:37 +0800 | [diff] [blame] | 212 | return 0; |
Yangbo Lu | b2495c0 | 2017-01-17 10:43:56 +0800 | [diff] [blame] | 213 | } |
| 214 | |
Yangbo Lu | 878c978 | 2017-12-08 15:35:37 +0800 | [diff] [blame] | 215 | /* hwconfig method is used for RevD and later versions. */ |
| 216 | if ((io & SW_REV_MASK) <= SW_REV_D) { |
| 217 | #ifdef CONFIG_HWCONFIG |
| 218 | if (hwconfig("esdhc1")) |
| 219 | sdhc2_en = true; |
| 220 | #endif |
| 221 | } else { |
| 222 | /* |
| 223 | * The I2C IO-expander for mux select is used to control |
| 224 | * the muxing of various onboard interfaces. |
| 225 | * |
| 226 | * IO0[3:2] indicates SDHC2 interface demultiplexer |
| 227 | * select lines. |
| 228 | * 00 - SDIO wifi |
| 229 | * 01 - GPIO (to Arduino) |
| 230 | * 10 - eMMC Memory |
| 231 | * 11 - SPI |
| 232 | */ |
Biwen Li | 0a759bb | 2019-12-31 15:33:41 +0800 | [diff] [blame] | 233 | #if defined(CONFIG_DM_I2C) |
| 234 | ret = dm_i2c_read(dev, I2C_MUX_IO_0, &io, 1); |
| 235 | #else |
| 236 | ret = i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_0, 1, &io, 1); |
| 237 | #endif |
| 238 | if (ret < 0) { |
Yangbo Lu | 878c978 | 2017-12-08 15:35:37 +0800 | [diff] [blame] | 239 | printf("Error reading i2c boot information!\n"); |
| 240 | return 0; |
| 241 | } |
| 242 | |
| 243 | mux_sdhc2 = (io & 0x0c) >> 2; |
| 244 | /* Enable SDHC2 only when use SDIO wifi and eMMC */ |
| 245 | if (mux_sdhc2 == 2 || mux_sdhc2 == 0) |
| 246 | sdhc2_en = true; |
| 247 | } |
Yangbo Lu | 878c978 | 2017-12-08 15:35:37 +0800 | [diff] [blame] | 248 | if (sdhc2_en) |
Yangbo Lu | b2495c0 | 2017-01-17 10:43:56 +0800 | [diff] [blame] | 249 | do_fixup_by_path(blob, esdhc1_path, "status", "okay", |
| 250 | sizeof("okay"), 1); |
| 251 | else |
| 252 | do_fixup_by_path(blob, esdhc1_path, "status", "disabled", |
| 253 | sizeof("disabled"), 1); |
| 254 | return 0; |
| 255 | } |
Bhaskar Upadhaya | 7fff22a | 2018-01-11 20:03:31 +0530 | [diff] [blame] | 256 | #endif |
Yangbo Lu | b2495c0 | 2017-01-17 10:43:56 +0800 | [diff] [blame] | 257 | |
Prabhakar Kushwaha | a315c66 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 258 | int ft_board_setup(void *blob, bd_t *bd) |
| 259 | { |
| 260 | arch_fixup_fdt(blob); |
| 261 | |
| 262 | ft_cpu_setup(blob, bd); |
| 263 | |
| 264 | return 0; |
| 265 | } |
Jagdish Gediya | f9cb31e | 2018-04-13 00:18:22 +0530 | [diff] [blame] | 266 | |
| 267 | static int switch_to_bank1(void) |
| 268 | { |
Biwen Li | 0a759bb | 2019-12-31 15:33:41 +0800 | [diff] [blame] | 269 | u8 data = 0xf4, chip_addr = 0x24, offset_addr = 0x03; |
| 270 | int ret, bus_num = 0; |
Jagdish Gediya | f9cb31e | 2018-04-13 00:18:22 +0530 | [diff] [blame] | 271 | |
Biwen Li | 0a759bb | 2019-12-31 15:33:41 +0800 | [diff] [blame] | 272 | #if defined(CONFIG_DM_I2C) |
| 273 | struct udevice *dev; |
| 274 | |
| 275 | ret = i2c_get_chip_for_busnum(bus_num, chip_addr, |
| 276 | 1, &dev); |
| 277 | if (ret) { |
| 278 | printf("%s: Cannot find udev for a bus %d\n", __func__, |
| 279 | bus_num); |
| 280 | return -ENXIO; |
| 281 | } |
| 282 | /* |
| 283 | * -------------------------------------------------------------------- |
| 284 | * |bus |I2C address| Device | Notes | |
| 285 | * -------------------------------------------------------------------- |
| 286 | * |I2C1|0x24, 0x25,| IO expander (CFG,| Provides 16bits of General | |
| 287 | * | |0x26 | RESET, and INT/ | Purpose parallel Input/Output| |
| 288 | * | | | KW41GPIO) - NXP | (GPIO) expansion for the | |
| 289 | * | | | PCAL9555AHF | I2C bus | |
| 290 | * ----- -------------------------------------------------------------- |
| 291 | * - mount three IO expander(PCAL9555AHF) on I2C1 |
| 292 | * |
| 293 | * PCAL9555A device address |
| 294 | * slave address |
| 295 | * -------------------------------------- |
| 296 | * | 0 | 1 | 0 | 0 | A2 | A1 | A0 | R/W | |
| 297 | * -------------------------------------- |
| 298 | * | fixed | hardware selectable| |
| 299 | * |
| 300 | * Output port 1(Pinter register bits = 0x03) |
| 301 | * |
| 302 | * P1_[7~0] = 0xf4 |
| 303 | * P1_0 <---> CFG_MUX_QSPI_S0 |
| 304 | * P1_1 <---> CFG_MUX_QSPI_S1 |
| 305 | * CFG_MUX_QSPI_S[1:0] = 0b00 |
| 306 | * |
| 307 | * QSPI chip-select demultiplexer select |
| 308 | * --------------------------------------------------------------------- |
| 309 | * CFG_MUX_QSPI_S1|CFG_MUX_QSPI_S0| Values |
| 310 | * --------------------------------------------------------------------- |
| 311 | * 0 | 0 |CS routed to SPI memory bank1(default) |
| 312 | * --------------------------------------------------------------------- |
| 313 | * 0 | 1 |CS routed to SPI memory bank2 |
| 314 | * --------------------------------------------------------------------- |
| 315 | * |
| 316 | */ |
| 317 | ret = dm_i2c_write(dev, offset_addr, &data, 1); |
| 318 | #else /* Non DM I2C support - will be removed */ |
| 319 | i2c_set_bus_num(bus_num); |
| 320 | ret = i2c_write(chip_addr, offset_addr, 1, &data, 1); |
| 321 | #endif |
Jagdish Gediya | f9cb31e | 2018-04-13 00:18:22 +0530 | [diff] [blame] | 322 | |
Jagdish Gediya | f9cb31e | 2018-04-13 00:18:22 +0530 | [diff] [blame] | 323 | if (ret) { |
| 324 | printf("i2c write error to chip : %u, addr : %u, data : %u\n", |
Biwen Li | 0a759bb | 2019-12-31 15:33:41 +0800 | [diff] [blame] | 325 | chip_addr, offset_addr, data); |
Jagdish Gediya | f9cb31e | 2018-04-13 00:18:22 +0530 | [diff] [blame] | 326 | } |
| 327 | |
| 328 | return ret; |
| 329 | } |
| 330 | |
| 331 | static int switch_to_bank2(void) |
| 332 | { |
Biwen Li | 0a759bb | 2019-12-31 15:33:41 +0800 | [diff] [blame] | 333 | u8 data[2] = {0xfc, 0xf5}, offset_addr[2] = {0x7, 0x3}; |
| 334 | u8 chip_addr = 0x24; |
| 335 | int ret, i, bus_num = 0; |
Jagdish Gediya | f9cb31e | 2018-04-13 00:18:22 +0530 | [diff] [blame] | 336 | |
Biwen Li | 0a759bb | 2019-12-31 15:33:41 +0800 | [diff] [blame] | 337 | #if defined(CONFIG_DM_I2C) |
| 338 | struct udevice *dev; |
Jagdish Gediya | f9cb31e | 2018-04-13 00:18:22 +0530 | [diff] [blame] | 339 | |
Biwen Li | 0a759bb | 2019-12-31 15:33:41 +0800 | [diff] [blame] | 340 | ret = i2c_get_chip_for_busnum(bus_num, chip_addr, |
| 341 | 1, &dev); |
Jagdish Gediya | f9cb31e | 2018-04-13 00:18:22 +0530 | [diff] [blame] | 342 | if (ret) { |
Biwen Li | 0a759bb | 2019-12-31 15:33:41 +0800 | [diff] [blame] | 343 | printf("%s: Cannot find udev for a bus %d\n", __func__, |
| 344 | bus_num); |
| 345 | return -ENXIO; |
Jagdish Gediya | f9cb31e | 2018-04-13 00:18:22 +0530 | [diff] [blame] | 346 | } |
Biwen Li | 0a759bb | 2019-12-31 15:33:41 +0800 | [diff] [blame] | 347 | #else /* Non DM I2C support - will be removed */ |
| 348 | i2c_set_bus_num(bus_num); |
| 349 | #endif |
Jagdish Gediya | f9cb31e | 2018-04-13 00:18:22 +0530 | [diff] [blame] | 350 | |
Biwen Li | 0a759bb | 2019-12-31 15:33:41 +0800 | [diff] [blame] | 351 | /* |
| 352 | * 1th step: config port 1 |
| 353 | * - the port 1 pin is enabled as an output |
| 354 | * 2th step: output port 1 |
| 355 | * - P1_[7:0] output 0xf5, |
| 356 | * then CFG_MUX_QSPI_S[1:0] equal to 0b01, |
| 357 | * CS routed to SPI memory bank2 |
| 358 | */ |
| 359 | for (i = 0; i < sizeof(data); i++) { |
| 360 | #if defined(CONFIG_DM_I2C) |
| 361 | ret = dm_i2c_write(dev, offset_addr[i], &data[i], 1); |
| 362 | #else /* Non DM I2C support - will be removed */ |
| 363 | ret = i2c_write(chip_addr, offset_addr[i], 1, &data[i], 1); |
| 364 | #endif |
| 365 | if (ret) { |
| 366 | printf("i2c write error to chip : %u, addr : %u, data : %u\n", |
| 367 | chip_addr, offset_addr[i], data[i]); |
| 368 | goto err; |
| 369 | } |
Jagdish Gediya | f9cb31e | 2018-04-13 00:18:22 +0530 | [diff] [blame] | 370 | } |
Biwen Li | 0a759bb | 2019-12-31 15:33:41 +0800 | [diff] [blame] | 371 | |
Jagdish Gediya | f9cb31e | 2018-04-13 00:18:22 +0530 | [diff] [blame] | 372 | err: |
| 373 | return ret; |
| 374 | } |
| 375 | |
| 376 | static int convert_flash_bank(int bank) |
| 377 | { |
| 378 | int ret = 0; |
| 379 | |
| 380 | switch (bank) { |
| 381 | case BOOT_FROM_UPPER_BANK: |
| 382 | ret = switch_to_bank2(); |
| 383 | break; |
| 384 | case BOOT_FROM_LOWER_BANK: |
| 385 | ret = switch_to_bank1(); |
| 386 | break; |
| 387 | default: |
| 388 | ret = CMD_RET_USAGE; |
| 389 | break; |
| 390 | }; |
| 391 | |
| 392 | return ret; |
| 393 | } |
| 394 | |
| 395 | static int flash_bank_cmd(cmd_tbl_t *cmdtp, int flag, int argc, |
| 396 | char * const argv[]) |
| 397 | { |
| 398 | if (argc != 2) |
| 399 | return CMD_RET_USAGE; |
| 400 | if (strcmp(argv[1], "1") == 0) |
| 401 | convert_flash_bank(BOOT_FROM_LOWER_BANK); |
| 402 | else if (strcmp(argv[1], "2") == 0) |
| 403 | convert_flash_bank(BOOT_FROM_UPPER_BANK); |
| 404 | else |
| 405 | return CMD_RET_USAGE; |
| 406 | |
| 407 | return 0; |
| 408 | } |
| 409 | |
| 410 | U_BOOT_CMD( |
| 411 | boot_bank, 2, 0, flash_bank_cmd, |
| 412 | "Flash bank Selection Control", |
| 413 | "bank[1-lower bank/2-upper bank] (e.g. boot_bank 1)" |
| 414 | ); |