commit fcafef6e7da8cdb4e42cb4d2ebb84a3837657716
author Rajesh Bhagat <rajesh.bhagat@nxp.com> Mon Nov 05 18:02:53 2018 +0000
committer York Sun <york.sun@nxp.com> Thu Dec 06 14:37:19 2018 -0800
tree 7e4fbf922b8fa587be8c426fd336ef06cb04d0e4
parent 90bde11a9e240e66d9aca2907a384d146ac356bd

armv8: ls1012ardb: Add TFABOOT support

TFABOOT support includes:
 - ls1012ardb_tfa_defconfig to be loaded by trusted firmware
 - environment address and size changes for TFABOOT
 - define BOOTCOMMAND for TFABOOT
 - enable PFE validation for secure boot

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

board/freescale/ls1012ardb/ls1012ardb.c

diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c
index 888f850..f648a90 100644
--- a/board/freescale/ls1012ardb/ls1012ardb.c
+++ b/board/freescale/ls1012ardb/ls1012ardb.c
@@ -87,8 +87,19 @@
 	return 0;
 }
 
+#ifdef CONFIG_TFABOOT
 int dram_init(void)
 {
+	gd->ram_size = tfa_get_dram_size();
+	if (!gd->ram_size)
+		gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+
+	return 0;
+}
+#else
+int dram_init(void)
+{
+#ifndef CONFIG_TFABOOT
 	static const struct fsl_mmdc_info mparam = {
 		0x05180000,	/* mdctl */
 		0x00030035,	/* mdpdc */
@@ -106,6 +117,7 @@
 	};
 
 	mmdc_init(&mparam);
+#endif
 
 	gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
 #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
@@ -115,6 +127,7 @@
 
 	return 0;
 }
+#endif
 
 
 int board_early_init_f(void)
@@ -132,7 +145,8 @@
 	 * Set CCI-400 control override register to enable barrier
 	 * transaction
 	 */
-	out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER);
+	if (current_el() == 3)
+		out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER);
 
 #ifdef CONFIG_SYS_FSL_ERRATUM_A010315
 	erratum_a010315();