blob: 337b99977b807eab40ad52f82b0737232bf3faf3 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Vikas Manocha1b51c932016-02-11 15:47:20 -08002/*
Patrice Chotard789ee0e2017-10-23 09:53:58 +02003 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
4 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
Vikas Manocha1b51c932016-02-11 15:47:20 -08005 */
6
7#ifndef __CONFIG_H
8#define __CONFIG_H
9
Vikas Manocha1b51c932016-02-11 15:47:20 -080010#define CONFIG_SYS_FLASH_BASE 0x08000000
11#define CONFIG_SYS_INIT_SP_ADDR 0x20050000
Vikas Manocha50218ae2017-05-28 12:55:10 -070012
13#ifdef CONFIG_SUPPORT_SPL
Vikas Manochaf0e32c02017-05-28 12:55:14 -070014#define CONFIG_SYS_LOAD_ADDR 0x08008000
Vikas Manocha50218ae2017-05-28 12:55:10 -070015#else
Vikas Manochaf0e32c02017-05-28 12:55:14 -070016#define CONFIG_SYS_LOAD_ADDR 0xC0400000
17#define CONFIG_LOADADDR 0xC0400000
Vikas Manocha50218ae2017-05-28 12:55:10 -070018#endif
Vikas Manocha1b51c932016-02-11 15:47:20 -080019
Vikas Manocha1b51c932016-02-11 15:47:20 -080020/*
21 * Configuration of the external SDRAM memory
22 */
Vikas Manocha1b51c932016-02-11 15:47:20 -080023
Vikas Manocha49408022016-03-09 15:18:14 -080024#define CONFIG_SYS_MAX_FLASH_SECT 8
25#define CONFIG_SYS_MAX_FLASH_BANKS 1
Vikas Manocha1b51c932016-02-11 15:47:20 -080026
Vikas Manocha49408022016-03-09 15:18:14 -080027#define CONFIG_STM32_FLASH
Vikas Manocha1b51c932016-02-11 15:47:20 -080028
Michael Kurz812962b2017-01-22 16:04:27 +010029#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL (8)
30#define CONFIG_DW_ALTDESCRIPTOR
Michael Kurz2c5a22f2017-01-22 16:04:29 +010031#define CONFIG_PHY_SMSC
Michael Kurz812962b2017-01-22 16:04:27 +010032
Vikas Manocha1b51c932016-02-11 15:47:20 -080033#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */
34
35#define CONFIG_CMDLINE_TAG
36#define CONFIG_SETUP_MEMORY_TAGS
37#define CONFIG_INITRD_TAG
38#define CONFIG_REVISION_TAG
39
40#define CONFIG_SYS_CBSIZE 1024
Vikas Manocha1b51c932016-02-11 15:47:20 -080041
Michael Kurz812962b2017-01-22 16:04:27 +010042#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
Vikas Manocha1b51c932016-02-11 15:47:20 -080043
Patrice Chotard231902c2019-02-21 10:07:54 +010044#define BOOT_TARGET_DEVICES(func) \
45 func(MMC, mmc, 0)
Vikas Manocha1b51c932016-02-11 15:47:20 -080046
Patrice Chotard231902c2019-02-21 10:07:54 +010047#include <config_distro_bootcmd.h>
48#define CONFIG_EXTRA_ENV_SETTINGS \
49 "kernel_addr_r=0xC0008000\0" \
50 "fdtfile=stm32f746-disco.dtb\0" \
51 "fdt_addr_r=0xC0500000\0" \
52 "scriptaddr=0xC0008000\0" \
53 "pxefile_addr_r=0xC0008000\0" \
54 "fdt_high=0xffffffffffffffff\0" \
55 "initrd_high=0xffffffffffffffff\0" \
Patrice Chotard5b0d4792019-09-16 10:56:51 +020056 "ramdisk_addr_r=0xC0600000\0" \
Patrice Chotard231902c2019-02-21 10:07:54 +010057 BOOTENV
Vikas Manocha1b51c932016-02-11 15:47:20 -080058
59/*
60 * Command line configuration.
61 */
Vikas Manocha9c7573e2017-04-10 15:03:00 -070062#define CONFIG_BOARD_LATE_INIT
Vikas Manochad7a80fc2017-04-10 15:03:02 -070063#define CONFIG_DISPLAY_BOARDINFO
Vikas Manocha50218ae2017-05-28 12:55:10 -070064
65/* For SPL */
66#ifdef CONFIG_SUPPORT_SPL
67#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
Vikas Manocha50218ae2017-05-28 12:55:10 -070068#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
69#define CONFIG_SYS_SPL_LEN 0x00008000
Vikas Manochaf0e32c02017-05-28 12:55:14 -070070#define CONFIG_SYS_UBOOT_START 0x080083FD
Vikas Manocha50218ae2017-05-28 12:55:10 -070071#define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + \
72 CONFIG_SYS_SPL_LEN)
Vikas Manochab785bb42017-05-28 12:55:13 -070073
Vikas Manochab785bb42017-05-28 12:55:13 -070074/* DT blob (fdt) address */
Vikas Manochab785bb42017-05-28 12:55:13 -070075#define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \
76 0x1C0000)
Vikas Manocha50218ae2017-05-28 12:55:10 -070077#endif
78/* For SPL ends */
79
yannick fertre030af822018-03-02 15:59:28 +010080/* For splashcreen */
81#ifdef CONFIG_DM_VIDEO
82#define CONFIG_VIDEO_BMP_RLE8
83#define CONFIG_BMP_16BPP
84#define CONFIG_BMP_24BPP
85#define CONFIG_BMP_32BPP
86#define CONFIG_SPLASH_SCREEN
87#define CONFIG_SPLASH_SCREEN_ALIGN
88#endif
89
Vikas Manocha1b51c932016-02-11 15:47:20 -080090#endif /* __CONFIG_H */