Tom Rini | e33610c | 2021-12-14 13:36:35 -0500 | [diff] [blame] | 1 | config ARCH_MAP_SYSMEM |
Tom Rini | 5332012 | 2022-04-06 09:21:25 -0400 | [diff] [blame] | 2 | depends on SANDBOX |
Tom Rini | e33610c | 2021-12-14 13:36:35 -0500 | [diff] [blame] | 3 | def_bool y |
| 4 | |
Masahiro Yamada | 5865450 | 2015-07-15 20:59:29 +0900 | [diff] [blame] | 5 | config CREATE_ARCH_SYMLINK |
| 6 | bool |
| 7 | |
Masahiro Yamada | 332b829 | 2016-06-28 10:48:42 +0900 | [diff] [blame] | 8 | config HAVE_ARCH_IOREMAP |
| 9 | bool |
| 10 | |
Heinrich Schuchardt | 8593a63 | 2024-11-03 18:54:00 +0100 | [diff] [blame] | 11 | config HAVE_SETJMP |
| 12 | bool |
| 13 | help |
| 14 | The architecture supports setjmp() and longjmp(). |
| 15 | |
Jiaxun Yang | 33e289a | 2024-07-17 16:07:02 +0800 | [diff] [blame] | 16 | config SUPPORT_BIG_ENDIAN |
| 17 | bool |
| 18 | |
| 19 | config SUPPORT_LITTLE_ENDIAN |
| 20 | bool |
| 21 | default y if !SUPPORT_BIG_ENDIAN |
| 22 | |
Tom Rini | 3ef67ae | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 23 | config SYS_CACHE_SHIFT_4 |
| 24 | bool |
| 25 | |
| 26 | config SYS_CACHE_SHIFT_5 |
| 27 | bool |
| 28 | |
| 29 | config SYS_CACHE_SHIFT_6 |
| 30 | bool |
| 31 | |
| 32 | config SYS_CACHE_SHIFT_7 |
| 33 | bool |
| 34 | |
Dan Carpenter | 13ec9f8 | 2024-03-04 10:04:15 +0300 | [diff] [blame] | 35 | config 32BIT |
| 36 | bool |
| 37 | |
| 38 | config 64BIT |
| 39 | bool |
| 40 | |
Tom Rini | 3ef67ae | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 41 | config SYS_CACHELINE_SIZE |
| 42 | int |
| 43 | default 128 if SYS_CACHE_SHIFT_7 |
| 44 | default 64 if SYS_CACHE_SHIFT_6 |
| 45 | default 32 if SYS_CACHE_SHIFT_5 |
| 46 | default 16 if SYS_CACHE_SHIFT_4 |
| 47 | # Fall-back for MIPS |
| 48 | default 32 if MIPS |
| 49 | |
Simon Glass | b87153c | 2020-12-16 21:20:06 -0700 | [diff] [blame] | 50 | config LINKER_LIST_ALIGN |
| 51 | int |
| 52 | default 32 if SANDBOX |
| 53 | default 8 if ARM64 || X86 |
| 54 | default 4 |
| 55 | help |
| 56 | Force the each linker list to be aligned to this boundary. This |
| 57 | is required if ll_entry_get() is used, since otherwise the linker |
| 58 | may add padding into the table, thus breaking it. |
| 59 | See linker_lists.rst for full details. |
| 60 | |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 61 | choice |
| 62 | prompt "Architecture select" |
| 63 | default SANDBOX |
| 64 | |
| 65 | config ARC |
| 66 | bool "ARC architecture" |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 67 | select ARC_TIMER |
Vlad Zakharov | a465df7 | 2017-03-21 14:49:49 +0300 | [diff] [blame] | 68 | select CLK |
Michal Simek | d5d59bd | 2020-08-19 10:44:20 +0200 | [diff] [blame] | 69 | select DM |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 70 | select HAVE_PRIVATE_LIBGCC |
| 71 | select SUPPORT_OF_CONTROL |
Tom Rini | 3ef67ae | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 72 | select SYS_CACHE_SHIFT_7 |
Vlad Zakharov | a465df7 | 2017-03-21 14:49:49 +0300 | [diff] [blame] | 73 | select TIMER |
Jiaxun Yang | 33e289a | 2024-07-17 16:07:02 +0800 | [diff] [blame] | 74 | select SUPPORT_BIG_ENDIAN |
| 75 | select SUPPORT_LITTLE_ENDIAN |
Tom Rini | 7b7e0ad | 2022-07-31 21:08:23 -0400 | [diff] [blame] | 76 | select SYS_BIG_ENDIAN if CPU_BIG_ENDIAN |
| 77 | select SYS_LITTLE_ENDIAN if !CPU_BIG_ENDIAN |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 78 | |
| 79 | config ARM |
| 80 | bool "ARM architecture" |
Heinrich Schuchardt | 8593a63 | 2024-11-03 18:54:00 +0100 | [diff] [blame] | 81 | select HAVE_SETJMP |
Marek Behún | 4778a58 | 2021-05-20 13:24:22 +0200 | [diff] [blame] | 82 | select ARCH_SUPPORTS_LTO |
Masahiro Yamada | 5865450 | 2015-07-15 20:59:29 +0900 | [diff] [blame] | 83 | select CREATE_ARCH_SYMLINK |
Masahiro Yamada | 0628059 | 2015-07-03 16:13:09 +0900 | [diff] [blame] | 84 | select HAVE_PRIVATE_LIBGCC if !ARM64 |
Simon Glass | e170f68 | 2021-12-01 09:02:38 -0700 | [diff] [blame] | 85 | select SUPPORT_ACPI |
Jiaxun Yang | 33e289a | 2024-07-17 16:07:02 +0800 | [diff] [blame] | 86 | select SUPPORT_LITTLE_ENDIAN |
Masahiro Yamada | 9fadbc8 | 2014-09-22 19:59:05 +0900 | [diff] [blame] | 87 | select SUPPORT_OF_CONTROL |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 88 | |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 89 | config M68K |
| 90 | bool "M68000 architecture" |
angelo@sysam.it | 5e79817 | 2015-12-06 17:47:59 +0100 | [diff] [blame] | 91 | select HAVE_PRIVATE_LIBGCC |
Angelo Dureghello | 6000ebc | 2023-02-07 23:45:03 +0100 | [diff] [blame] | 92 | select USE_PRIVATE_LIBGCC |
Derald D. Woods | eb730bd | 2018-01-22 17:17:10 -0600 | [diff] [blame] | 93 | select SYS_BOOT_GET_CMDLINE |
| 94 | select SYS_BOOT_GET_KBD |
Tom Rini | 3ef67ae | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 95 | select SYS_CACHE_SHIFT_4 |
Jiaxun Yang | 33e289a | 2024-07-17 16:07:02 +0800 | [diff] [blame] | 96 | select SUPPORT_BIG_ENDIAN |
Angelo Dureghello | e007b15 | 2019-03-13 21:46:51 +0100 | [diff] [blame] | 97 | select SUPPORT_OF_CONTROL |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 98 | |
| 99 | config MICROBLAZE |
| 100 | bool "MicroBlaze architecture" |
Jiaxun Yang | 33e289a | 2024-07-17 16:07:02 +0800 | [diff] [blame] | 101 | select SUPPORT_BIG_ENDIAN |
| 102 | select SUPPORT_LITTLE_ENDIAN |
Masahiro Yamada | 9fadbc8 | 2014-09-22 19:59:05 +0900 | [diff] [blame] | 103 | select SUPPORT_OF_CONTROL |
Michal Simek | e8e5277 | 2022-06-24 14:16:32 +0200 | [diff] [blame] | 104 | imply CMD_TIMER |
| 105 | imply SPL_REGMAP if SPL |
| 106 | imply SPL_TIMER if SPL |
| 107 | imply TIMER |
| 108 | imply XILINX_TIMER |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 109 | |
| 110 | config MIPS |
| 111 | bool "MIPS architecture" |
Masahiro Yamada | 332b829 | 2016-06-28 10:48:42 +0900 | [diff] [blame] | 112 | select HAVE_ARCH_IOREMAP |
Masahiro Yamada | 9520b71 | 2014-10-24 01:30:43 +0900 | [diff] [blame] | 113 | select HAVE_PRIVATE_LIBGCC |
Daniel Schwierzeck | de5b6e2 | 2015-12-19 20:20:48 +0100 | [diff] [blame] | 114 | select SUPPORT_OF_CONTROL |
Sean Anderson | 13871e1 | 2022-04-12 10:59:04 -0400 | [diff] [blame] | 115 | select SPL_SEPARATE_BSS if SPL |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 116 | |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 117 | config NIOS2 |
| 118 | bool "Nios II architecture" |
Thomas Chou | c617026 | 2015-10-21 21:34:57 +0800 | [diff] [blame] | 119 | select CPU |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 120 | select DM |
Tom Rini | 7d3684a | 2023-01-16 15:46:49 -0500 | [diff] [blame] | 121 | select DM_EVENT |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 122 | select OF_CONTROL |
Jiaxun Yang | 33e289a | 2024-07-17 16:07:02 +0800 | [diff] [blame] | 123 | select SUPPORT_LITTLE_ENDIAN |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 124 | select SUPPORT_OF_CONTROL |
Michal Simek | 2e7c819 | 2018-07-23 15:55:14 +0200 | [diff] [blame] | 125 | imply CMD_DM |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 126 | |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 127 | config PPC |
| 128 | bool "PowerPC architecture" |
Masahiro Yamada | 9520b71 | 2014-10-24 01:30:43 +0900 | [diff] [blame] | 129 | select HAVE_PRIVATE_LIBGCC |
Jiaxun Yang | 33e289a | 2024-07-17 16:07:02 +0800 | [diff] [blame] | 130 | select SUPPORT_BIG_ENDIAN |
Simon Glass | 90f83c8 | 2015-02-07 11:51:35 -0700 | [diff] [blame] | 131 | select SUPPORT_OF_CONTROL |
Derald D. Woods | eb730bd | 2018-01-22 17:17:10 -0600 | [diff] [blame] | 132 | select SYS_BOOT_GET_CMDLINE |
| 133 | select SYS_BOOT_GET_KBD |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 134 | |
Rick Chen | 3301bfc | 2017-12-26 13:55:58 +0800 | [diff] [blame] | 135 | config RISCV |
Bin Meng | 6b69775 | 2018-09-26 06:55:06 -0700 | [diff] [blame] | 136 | bool "RISC-V architecture" |
Anup Patel | 0af3e85 | 2019-02-25 08:14:04 +0000 | [diff] [blame] | 137 | select CREATE_ARCH_SYMLINK |
Heinrich Schuchardt | 8593a63 | 2024-11-03 18:54:00 +0100 | [diff] [blame] | 138 | select HAVE_SETJMP |
Heinrich Schuchardt | 934addc | 2023-12-19 16:04:06 +0100 | [diff] [blame] | 139 | select SUPPORT_ACPI |
Jiaxun Yang | 33e289a | 2024-07-17 16:07:02 +0800 | [diff] [blame] | 140 | select SUPPORT_LITTLE_ENDIAN |
Rick Chen | 3301bfc | 2017-12-26 13:55:58 +0800 | [diff] [blame] | 141 | select SUPPORT_OF_CONTROL |
Bin Meng | a760eba | 2018-09-26 06:55:19 -0700 | [diff] [blame] | 142 | select OF_CONTROL |
| 143 | select DM |
Tom Rini | 7d3684a | 2023-01-16 15:46:49 -0500 | [diff] [blame] | 144 | select DM_EVENT |
Zong Li | 324463e | 2022-11-16 07:08:39 +0000 | [diff] [blame] | 145 | imply SPL_SEPARATE_BSS if SPL |
Bin Meng | 3880c38 | 2018-09-26 06:55:20 -0700 | [diff] [blame] | 146 | imply DM_SERIAL |
Bin Meng | 3880c38 | 2018-09-26 06:55:20 -0700 | [diff] [blame] | 147 | imply DM_MMC |
| 148 | imply DM_SPI |
| 149 | imply DM_SPI_FLASH |
| 150 | imply BLK |
| 151 | imply CLK |
| 152 | imply MTD |
| 153 | imply TIMER |
Bin Meng | a760eba | 2018-09-26 06:55:19 -0700 | [diff] [blame] | 154 | imply CMD_DM |
Lukas Auer | 396f0bd | 2019-08-21 21:14:45 +0200 | [diff] [blame] | 155 | imply SPL_DM |
| 156 | imply SPL_OF_CONTROL |
| 157 | imply SPL_LIBCOMMON_SUPPORT |
| 158 | imply SPL_LIBGENERIC_SUPPORT |
Simon Glass | f4d6039 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 159 | imply SPL_SERIAL |
Lukas Auer | 396f0bd | 2019-08-21 21:14:45 +0200 | [diff] [blame] | 160 | imply SPL_TIMER |
Rick Chen | 3301bfc | 2017-12-26 13:55:58 +0800 | [diff] [blame] | 161 | |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 162 | config SANDBOX |
| 163 | bool "Sandbox" |
Heinrich Schuchardt | 8593a63 | 2024-11-03 18:54:00 +0100 | [diff] [blame] | 164 | select HAVE_SETJMP |
Marek Behún | 7243493 | 2021-05-20 13:24:07 +0200 | [diff] [blame] | 165 | select ARCH_SUPPORTS_LTO |
Tom Rini | 22d567e | 2017-01-22 19:43:11 -0500 | [diff] [blame] | 166 | select BOARD_LATE_INIT |
Michael Walle | 8ffe86c | 2020-05-22 14:07:38 +0200 | [diff] [blame] | 167 | select BZIP2 |
Simon Glass | c13bbdc | 2023-10-26 14:31:34 -0400 | [diff] [blame] | 168 | select CMD_POWEROFF if CMDLINE |
Masahiro Yamada | 5ef5ccc | 2015-03-31 12:47:53 +0900 | [diff] [blame] | 169 | select DM |
Tom Rini | 7d3684a | 2023-01-16 15:46:49 -0500 | [diff] [blame] | 170 | select DM_EVENT |
Andrew Scull | 451b8b1 | 2022-05-30 10:00:12 +0000 | [diff] [blame] | 171 | select DM_FUZZING_ENGINE |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 172 | select DM_GPIO |
| 173 | select DM_I2C |
Masahiro Yamada | b11b235 | 2016-09-08 18:47:35 +0900 | [diff] [blame] | 174 | select DM_KEYBOARD |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 175 | select DM_MMC |
Masahiro Yamada | 5ef5ccc | 2015-03-31 12:47:53 +0900 | [diff] [blame] | 176 | select DM_SERIAL |
Masahiro Yamada | 5ef5ccc | 2015-03-31 12:47:53 +0900 | [diff] [blame] | 177 | select DM_SPI |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 178 | select DM_SPI_FLASH |
Michael Walle | 8ffe86c | 2020-05-22 14:07:38 +0200 | [diff] [blame] | 179 | select GZIP_COMPRESSED |
Tom Rini | 6a4a908 | 2022-11-19 18:45:23 -0500 | [diff] [blame] | 180 | select IO_TRACE |
Tom Rini | c20bb73 | 2017-07-22 18:36:16 -0400 | [diff] [blame] | 181 | select LZO |
Tom Rini | ddb1ec1 | 2024-01-10 13:46:10 -0500 | [diff] [blame] | 182 | select MTD |
Heinrich Schuchardt | a3fc9a4 | 2020-03-14 12:13:40 +0100 | [diff] [blame] | 183 | select OF_BOARD_SETUP |
Ramon Fried | c64f19b | 2019-04-27 11:15:23 +0300 | [diff] [blame] | 184 | select PCI_ENDPOINT |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 185 | select SPI |
| 186 | select SUPPORT_OF_CONTROL |
Jiaxun Yang | 33e289a | 2024-07-17 16:07:02 +0800 | [diff] [blame] | 187 | select SUPPORT_BIG_ENDIAN |
| 188 | select SUPPORT_LITTLE_ENDIAN |
Simon Glass | c13bbdc | 2023-10-26 14:31:34 -0400 | [diff] [blame] | 189 | select SYSRESET_CMD_POWEROFF if CMD_POWEROFF |
Tom Rini | 3ef67ae | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 190 | select SYS_CACHE_SHIFT_4 |
Wasim Khan | 4dab60b | 2021-03-08 16:48:16 +0100 | [diff] [blame] | 191 | select IRQ |
Simon Glass | c13bbdc | 2023-10-26 14:31:34 -0400 | [diff] [blame] | 192 | select SUPPORT_EXTENSION_SCAN if CMDLINE |
Simon Glass | a6cee93 | 2021-12-01 09:02:36 -0700 | [diff] [blame] | 193 | select SUPPORT_ACPI |
Bin Meng | 0c0d9b0 | 2018-08-02 23:58:03 -0700 | [diff] [blame] | 194 | imply BITREVERSE |
Simon Glass | 78b0ef5 | 2018-11-15 18:43:53 -0700 | [diff] [blame] | 195 | select BLOBLIST |
Marek Behún | f8bd43f | 2021-05-20 13:24:08 +0200 | [diff] [blame] | 196 | imply LTO |
Michal Simek | 2e7c819 | 2018-07-23 15:55:14 +0200 | [diff] [blame] | 197 | imply CMD_DM |
Heinrich Schuchardt | 0e29873 | 2020-11-12 00:29:59 +0100 | [diff] [blame] | 198 | imply CMD_EXCEPTION |
Simon Glass | f4cb474 | 2017-05-17 03:25:44 -0600 | [diff] [blame] | 199 | imply CMD_GETTIME |
Simon Glass | 027608e | 2017-05-17 03:25:25 -0600 | [diff] [blame] | 200 | imply CMD_HASH |
Simon Glass | 3bebbe6 | 2017-05-17 03:25:34 -0600 | [diff] [blame] | 201 | imply CMD_IO |
Simon Glass | 30daabc | 2017-05-17 03:25:36 -0600 | [diff] [blame] | 202 | imply CMD_IOTRACE |
Simon Glass | becaa8f | 2017-05-17 03:25:43 -0600 | [diff] [blame] | 203 | imply CMD_LZMADEC |
Tom Rini | e5289a7 | 2019-05-29 17:01:28 -0400 | [diff] [blame] | 204 | imply CMD_SF |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 205 | imply CMD_SF_TEST |
Tom Rini | d8532af | 2017-06-02 11:03:50 -0400 | [diff] [blame] | 206 | imply CRC32_VERIFY |
| 207 | imply FAT_WRITE |
Rajan Vaja | b3b2ddb | 2018-09-19 03:43:46 -0700 | [diff] [blame] | 208 | imply FIRMWARE |
Andrew Scull | 451b8b1 | 2022-05-30 10:00:12 +0000 | [diff] [blame] | 209 | imply FUZZING_ENGINE_SANDBOX |
Daniel Thompson | a9e2c67 | 2017-05-19 17:26:58 +0100 | [diff] [blame] | 210 | imply HASH_VERIFY |
Tom Rini | d8532af | 2017-06-02 11:03:50 -0400 | [diff] [blame] | 211 | imply LZMA |
Jens Wiklander | dca252d | 2018-09-25 16:40:17 +0200 | [diff] [blame] | 212 | imply TEE |
Jens Wiklander | f1edae9 | 2018-09-25 16:40:23 +0200 | [diff] [blame] | 213 | imply AVB_VERIFY |
| 214 | imply LIBAVB |
| 215 | imply CMD_AVB |
Heinrich Schuchardt | ce33bcd | 2022-01-16 13:04:06 +0100 | [diff] [blame] | 216 | imply PARTITION_TYPE_GUID |
Igor Opaniuk | 623369c | 2021-02-14 16:27:27 +0100 | [diff] [blame] | 217 | imply SCP03 |
| 218 | imply CMD_SCP03 |
Jens Wiklander | f1edae9 | 2018-09-25 16:40:23 +0200 | [diff] [blame] | 219 | imply UDP_FUNCTION_FASTBOOT |
Bin Meng | 1bb290d | 2018-10-15 02:21:26 -0700 | [diff] [blame] | 220 | imply VIRTIO_MMIO |
| 221 | imply VIRTIO_PCI |
| 222 | imply VIRTIO_SANDBOX |
Simon Glass | e6832e6 | 2024-11-07 14:31:48 -0700 | [diff] [blame] | 223 | # Re-enable this when fully implemented |
| 224 | # imply VIRTIO_BLK |
Bin Meng | 1bb290d | 2018-10-15 02:21:26 -0700 | [diff] [blame] | 225 | imply VIRTIO_NET |
Simon Glass | 799b29b | 2018-12-10 10:37:31 -0700 | [diff] [blame] | 226 | imply DM_SOUND |
Ramon Fried | c64f19b | 2019-04-27 11:15:23 +0300 | [diff] [blame] | 227 | imply PCI_SANDBOX_EP |
Simon Glass | 98d88f8 | 2019-02-16 20:24:49 -0700 | [diff] [blame] | 228 | imply PCH |
Alex Marginean | 0daa53a | 2019-06-03 19:12:28 +0300 | [diff] [blame] | 229 | imply PHYLIB |
| 230 | imply DM_MDIO |
Alex Marginean | 0649be5 | 2019-07-12 10:13:53 +0300 | [diff] [blame] | 231 | imply DM_MDIO_MUX |
Simon Glass | e264be4 | 2023-05-04 16:54:57 -0600 | [diff] [blame] | 232 | imply ACPI |
Simon Glass | 8c50102 | 2019-12-06 21:41:54 -0700 | [diff] [blame] | 233 | imply ACPI_PMC |
| 234 | imply ACPI_PMC_SANDBOX |
| 235 | imply CMD_PMC |
John Chau | fce6f98 | 2020-07-02 12:01:21 +0800 | [diff] [blame] | 236 | imply CMD_CLONE |
Simon Glass | 07a8886 | 2020-11-05 10:33:38 -0700 | [diff] [blame] | 237 | imply SILENT_CONSOLE |
Simon Glass | 529e208 | 2020-11-05 10:33:48 -0700 | [diff] [blame] | 238 | imply BOOTARGS_SUBST |
Claudiu Manoil | d9eaa92 | 2021-03-14 20:14:57 +0800 | [diff] [blame] | 239 | imply PHY_FIXED |
| 240 | imply DM_DSA |
Kory Maincent | 965a34f | 2021-05-04 19:31:23 +0200 | [diff] [blame] | 241 | imply CMD_EXTENSION |
Simon Glass | 278efc68 | 2021-11-24 09:26:44 -0700 | [diff] [blame] | 242 | imply KEYBOARD |
Simon Glass | ef9e762 | 2021-11-24 09:26:42 -0700 | [diff] [blame] | 243 | imply PHYSMEM |
Simon Glass | 29e64b5 | 2021-12-01 09:02:43 -0700 | [diff] [blame] | 244 | imply GENERATE_ACPI_TABLE |
Philippe Reynes | 462d163 | 2022-03-28 22:56:53 +0200 | [diff] [blame] | 245 | imply BINMAN |
Alexander Gendin | 038cb02 | 2023-10-09 01:24:36 +0000 | [diff] [blame] | 246 | imply CMD_MBR |
| 247 | imply CMD_MMC |
Simon Glass | b1dee9e | 2023-10-26 14:31:33 -0400 | [diff] [blame] | 248 | imply BOOTSTD_DEFAULTS if BOOTSTD_FULL && CMDLINE |
| 249 | imply BOOTMETH_DISTRO if BOOTSTD_FULL && CMDLINE |
| 250 | imply CMD_SYSBOOT if BOOTSTD_FULL |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 251 | |
| 252 | config SH |
| 253 | bool "SuperH architecture" |
Jiaxun Yang | 33e289a | 2024-07-17 16:07:02 +0800 | [diff] [blame] | 254 | select SUPPORT_LITTLE_ENDIAN |
Masahiro Yamada | 9520b71 | 2014-10-24 01:30:43 +0900 | [diff] [blame] | 255 | select HAVE_PRIVATE_LIBGCC |
Marek Vasut | 8fc9fa1 | 2019-08-31 18:27:58 +0200 | [diff] [blame] | 256 | select SUPPORT_OF_CONTROL |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 257 | |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 258 | config X86 |
| 259 | bool "x86 architecture" |
Heinrich Schuchardt | 8593a63 | 2024-11-03 18:54:00 +0100 | [diff] [blame] | 260 | select HAVE_SETJMP |
Simon Glass | c9ae1ae | 2019-04-25 21:58:45 -0600 | [diff] [blame] | 261 | select SUPPORT_SPL |
| 262 | select SUPPORT_TPL |
Jiaxun Yang | 33e289a | 2024-07-17 16:07:02 +0800 | [diff] [blame] | 263 | select SUPPORT_LITTLE_ENDIAN |
Masahiro Yamada | 5865450 | 2015-07-15 20:59:29 +0900 | [diff] [blame] | 264 | select CREATE_ARCH_SYMLINK |
Masahiro Yamada | 5ef5ccc | 2015-03-31 12:47:53 +0900 | [diff] [blame] | 265 | select DM |
Bin Meng | 59c4aa4 | 2018-10-15 02:21:16 -0700 | [diff] [blame] | 266 | select HAVE_ARCH_IOMAP |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 267 | select HAVE_PRIVATE_LIBGCC |
| 268 | select OF_CONTROL |
Bin Meng | 0e0204d | 2017-07-30 06:23:16 -0700 | [diff] [blame] | 269 | select PCI |
Simon Glass | a6cee93 | 2021-12-01 09:02:36 -0700 | [diff] [blame] | 270 | select SUPPORT_ACPI |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 271 | select SUPPORT_OF_CONTROL |
Tom Rini | 3ef67ae | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 272 | select SYS_CACHE_SHIFT_6 |
Bin Meng | f0e1c3e | 2017-07-30 06:23:07 -0700 | [diff] [blame] | 273 | select TIMER |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 274 | select USE_PRIVATE_LIBGCC |
Bin Meng | f0e1c3e | 2017-07-30 06:23:07 -0700 | [diff] [blame] | 275 | select X86_TSC_TIMER |
Wasim Khan | 4a7fef7 | 2021-03-08 16:48:15 +0100 | [diff] [blame] | 276 | select IRQ |
Simon Glass | f69c009 | 2020-07-19 13:55:52 -0600 | [diff] [blame] | 277 | imply HAS_ROM if X86_RESET_VECTOR |
Bin Meng | 73f5bc1 | 2017-07-30 19:24:02 -0700 | [diff] [blame] | 278 | imply BLK |
Michal Simek | 2e7c819 | 2018-07-23 15:55:14 +0200 | [diff] [blame] | 279 | imply CMD_DM |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 280 | imply CMD_FPGA_LOADMK |
| 281 | imply CMD_GETTIME |
| 282 | imply CMD_IO |
| 283 | imply CMD_IRQ |
| 284 | imply CMD_PCI |
Tom Rini | e5289a7 | 2019-05-29 17:01:28 -0400 | [diff] [blame] | 285 | imply CMD_SF |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 286 | imply CMD_SF_TEST |
Bin Meng | 0e0204d | 2017-07-30 06:23:16 -0700 | [diff] [blame] | 287 | imply DM_GPIO |
| 288 | imply DM_KEYBOARD |
Simon Glass | 828b725 | 2017-07-30 19:24:01 -0700 | [diff] [blame] | 289 | imply DM_MMC |
Bin Meng | 0e0204d | 2017-07-30 06:23:16 -0700 | [diff] [blame] | 290 | imply DM_RTC |
Tom Rini | 15a2ab5 | 2023-10-27 20:59:51 -0400 | [diff] [blame] | 291 | imply SCSI |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 292 | imply DM_SERIAL |
Tom Rini | ddb1ec1 | 2024-01-10 13:46:10 -0500 | [diff] [blame] | 293 | imply MTD |
Bin Meng | 0e0204d | 2017-07-30 06:23:16 -0700 | [diff] [blame] | 294 | imply DM_SPI |
| 295 | imply DM_SPI_FLASH |
| 296 | imply DM_USB |
Simon Glass | 1cedca1 | 2023-08-21 21:17:01 -0600 | [diff] [blame] | 297 | imply LAST_STAGE_INIT |
Simon Glass | 52cb504 | 2022-10-18 07:46:31 -0600 | [diff] [blame] | 298 | imply VIDEO |
Bin Meng | af5b8d2 | 2018-07-19 03:07:33 -0700 | [diff] [blame] | 299 | imply SYSRESET |
Kever Yang | 525ea47 | 2019-04-02 20:41:25 +0800 | [diff] [blame] | 300 | imply SPL_SYSRESET |
Bin Meng | af5b8d2 | 2018-07-19 03:07:33 -0700 | [diff] [blame] | 301 | imply SYSRESET_X86 |
Chris Packham | b110e11 | 2017-08-28 20:50:46 +1200 | [diff] [blame] | 302 | imply USB_ETHER_ASIX |
| 303 | imply USB_ETHER_SMSC95XX |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 304 | imply USB_HOST_ETHER |
Simon Glass | 98d88f8 | 2019-02-16 20:24:49 -0700 | [diff] [blame] | 305 | imply PCH |
Simon Glass | ef9e762 | 2021-11-24 09:26:42 -0700 | [diff] [blame] | 306 | imply PHYSMEM |
Simon Glass | 56382fb | 2019-05-02 10:52:24 -0600 | [diff] [blame] | 307 | imply RTC_MC146818 |
Simon Glass | e264be4 | 2023-05-04 16:54:57 -0600 | [diff] [blame] | 308 | imply ACPI |
Simon Glass | b028228 | 2021-12-01 09:02:39 -0700 | [diff] [blame] | 309 | imply ACPIGEN if !QEMU && !EFI_APP |
Simon Glass | bee77f6 | 2020-11-05 06:32:17 -0700 | [diff] [blame] | 310 | imply SYSINFO if GENERATE_SMBIOS_TABLE |
| 311 | imply SYSINFO_SMBIOS if GENERATE_SMBIOS_TABLE |
Simon Glass | 65831d9 | 2021-12-18 11:27:50 -0700 | [diff] [blame] | 312 | imply TIMESTAMP |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 313 | |
Simon Glass | c9ae1ae | 2019-04-25 21:58:45 -0600 | [diff] [blame] | 314 | # Thing to enable for when SPL/TPL are enabled: SPL |
| 315 | imply SPL_DM |
| 316 | imply SPL_OF_LIBFDT |
Simon Glass | 284cb9c | 2021-07-10 21:14:31 -0600 | [diff] [blame] | 317 | imply SPL_DRIVERS_MISC |
Simon Glass | 035939e | 2021-07-10 21:14:30 -0600 | [diff] [blame] | 318 | imply SPL_GPIO |
Simon Glass | 7b1ecb8 | 2019-12-06 21:42:51 -0700 | [diff] [blame] | 319 | imply SPL_PINCTRL |
Simon Glass | c9ae1ae | 2019-04-25 21:58:45 -0600 | [diff] [blame] | 320 | imply SPL_LIBCOMMON_SUPPORT |
| 321 | imply SPL_LIBGENERIC_SUPPORT |
Simon Glass | f4d6039 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 322 | imply SPL_SERIAL |
Simon Glass | c9ae1ae | 2019-04-25 21:58:45 -0600 | [diff] [blame] | 323 | imply SPL_SPI_FLASH_SUPPORT |
Simon Glass | a582047 | 2021-08-08 12:20:14 -0600 | [diff] [blame] | 324 | imply SPL_SPI |
Simon Glass | c9ae1ae | 2019-04-25 21:58:45 -0600 | [diff] [blame] | 325 | imply SPL_OF_CONTROL |
| 326 | imply SPL_TIMER |
| 327 | imply SPL_REGMAP |
| 328 | imply SPL_SYSCON |
| 329 | # TPL |
| 330 | imply TPL_DM |
Simon Glass | 284cb9c | 2021-07-10 21:14:31 -0600 | [diff] [blame] | 331 | imply TPL_DRIVERS_MISC |
Simon Glass | 035939e | 2021-07-10 21:14:30 -0600 | [diff] [blame] | 332 | imply TPL_GPIO |
Simon Glass | 7b1ecb8 | 2019-12-06 21:42:51 -0700 | [diff] [blame] | 333 | imply TPL_PINCTRL |
Simon Glass | c9ae1ae | 2019-04-25 21:58:45 -0600 | [diff] [blame] | 334 | imply TPL_LIBCOMMON_SUPPORT |
| 335 | imply TPL_LIBGENERIC_SUPPORT |
Simon Glass | f4d6039 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 336 | imply TPL_SERIAL |
Simon Glass | c9ae1ae | 2019-04-25 21:58:45 -0600 | [diff] [blame] | 337 | imply TPL_OF_CONTROL |
| 338 | imply TPL_TIMER |
| 339 | imply TPL_REGMAP |
| 340 | imply TPL_SYSCON |
| 341 | |
Chris Zankel | 1387dab | 2016-08-10 18:36:44 +0300 | [diff] [blame] | 342 | config XTENSA |
| 343 | bool "Xtensa architecture" |
| 344 | select CREATE_ARCH_SYMLINK |
Jiaxun Yang | 33e289a | 2024-07-17 16:07:02 +0800 | [diff] [blame] | 345 | select SUPPORT_LITTLE_ENDIAN |
Chris Zankel | 1387dab | 2016-08-10 18:36:44 +0300 | [diff] [blame] | 346 | select SUPPORT_OF_CONTROL |
| 347 | |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 348 | endchoice |
| 349 | |
Masahiro Yamada | 52a5f97 | 2014-09-14 03:01:48 +0900 | [diff] [blame] | 350 | config SYS_ARCH |
| 351 | string |
| 352 | help |
| 353 | This option should contain the architecture name to build the |
| 354 | appropriate arch/<CONFIG_SYS_ARCH> directory. |
| 355 | All the architectures should specify this option correctly. |
| 356 | |
| 357 | config SYS_CPU |
| 358 | string |
| 359 | help |
| 360 | This option should contain the CPU name to build the correct |
| 361 | arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU> directory. |
| 362 | |
| 363 | This is optional. For those targets without the CPU directory, |
| 364 | leave this option empty. |
| 365 | |
| 366 | config SYS_SOC |
| 367 | string |
| 368 | help |
| 369 | This option should contain the SoC name to build the directory |
| 370 | arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU>/<CONFIG_SYS_SOC>. |
| 371 | |
| 372 | This is optional. For those targets without the SoC directory, |
| 373 | leave this option empty. |
| 374 | |
| 375 | config SYS_VENDOR |
| 376 | string |
| 377 | help |
| 378 | This option should contain the vendor name of the target board. |
| 379 | If it is set and |
| 380 | board/<CONFIG_SYS_VENDOR>/common/Makefile exists, the vendor common |
| 381 | directory is compiled. |
| 382 | If CONFIG_SYS_BOARD is also set, the sources under |
| 383 | board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> directory are compiled. |
| 384 | |
| 385 | This is optional. For those targets without the vendor directory, |
| 386 | leave this option empty. |
| 387 | |
| 388 | config SYS_BOARD |
| 389 | string |
| 390 | help |
| 391 | This option should contain the name of the target board. |
| 392 | If it is set, either board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> |
| 393 | or board/<CONFIG_SYS_BOARD> directory is compiled depending on |
| 394 | whether CONFIG_SYS_VENDOR is set or not. |
| 395 | |
| 396 | This is optional. For those targets without the board directory, |
| 397 | leave this option empty. |
| 398 | |
| 399 | config SYS_CONFIG_NAME |
Tom Rini | bce01ee | 2024-01-22 17:39:20 -0500 | [diff] [blame] | 400 | string "Board header file" if ARCH_MESON || ARCH_VERSAL || \ |
| 401 | ARCH_VERSAL_NET || ARCH_ZYNQ || ARCH_ZYNQMP || \ |
| 402 | ARCH_ZYNQMP_R5 || MICROBLAZE || NIOS2 |
| 403 | default "meson64" if ARCH_MESON |
| 404 | default "microblaze-generic" if MICROBLAZE |
| 405 | default "xilinx_versal" if ARCH_VERSAL |
| 406 | default "xilinx_versal_net" if ARCH_VERSAL_NET |
| 407 | default "xilinx_zynqmp" if ARCH_ZYNQMP |
| 408 | default "xilinx_zynqmp_r5" if ARCH_ZYNQMP_R5 |
| 409 | default "zynq-common" if ARCH_ZYNQ |
Masahiro Yamada | 52a5f97 | 2014-09-14 03:01:48 +0900 | [diff] [blame] | 410 | help |
| 411 | This option should contain the base name of board header file. |
| 412 | The header file include/configs/<CONFIG_SYS_CONFIG_NAME>.h |
| 413 | should be included from include/config.h. |
| 414 | |
Vignesh Raghavendra | 384c141 | 2019-04-22 21:43:32 +0530 | [diff] [blame] | 415 | config SYS_DISABLE_DCACHE_OPS |
| 416 | bool |
| 417 | help |
| 418 | This option disables dcache flush and dcache invalidation |
| 419 | operations. For example, on coherent systems where cache |
| 420 | operatios are not required, enable this option to avoid them. |
| 421 | Note that, its up to the individual architectures to implement |
| 422 | this functionality. |
| 423 | |
Tom Rini | e9269a0 | 2021-12-12 22:12:30 -0500 | [diff] [blame] | 424 | config SYS_IMMR |
Tom Rini | 0c4dded | 2022-03-30 09:30:15 -0400 | [diff] [blame] | 425 | hex "Address for the Internal Memory-Mapped Registers (IMMR) window" |
Tom Rini | e9269a0 | 2021-12-12 22:12:30 -0500 | [diff] [blame] | 426 | depends on PPC || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A |
| 427 | default 0xFF000000 if MPC8xx |
| 428 | default 0xF0000000 if ARCH_MPC8313 |
| 429 | default 0xE0000000 if MPC83xx && !ARCH_MPC8313 |
| 430 | default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3 |
Pali Rohár | c68991e | 2022-05-02 18:29:25 +0200 | [diff] [blame] | 431 | default 0xFFE00000 if ARCH_P1010 || ARCH_P1011 || ARCH_P1020 || \ |
| 432 | ARCH_P1021 || ARCH_P1024 || ARCH_P1025 || \ |
| 433 | ARCH_P2020 |
Tom Rini | e9269a0 | 2021-12-12 22:12:30 -0500 | [diff] [blame] | 434 | default SYS_CCSRBAR_DEFAULT |
| 435 | help |
| 436 | Address for the Internal Memory-Mapped Registers (IMMR) window used |
| 437 | to configure the features of many Freescale / NXP SoCs. |
| 438 | |
Tom Rini | b73cd90 | 2022-12-02 16:42:36 -0500 | [diff] [blame] | 439 | config MONITOR_IS_IN_RAM |
| 440 | bool "U-Boot is loaded in to RAM by a pre-loader" |
| 441 | depends on M68K || NIOS2 |
| 442 | |
Heinrich Schuchardt | e6e7cb6 | 2022-12-30 19:41:28 +0100 | [diff] [blame] | 443 | menu "Skipping low level initialization functions" |
Tom Rini | 5332012 | 2022-04-06 09:21:25 -0400 | [diff] [blame] | 444 | depends on ARM || MIPS || RISCV |
Heinrich Schuchardt | e6e7cb6 | 2022-12-30 19:41:28 +0100 | [diff] [blame] | 445 | |
| 446 | config SKIP_LOWLEVEL_INIT |
| 447 | bool "Skip calls to certain low level initialization functions" |
Tom Rini | e1e8544 | 2021-08-27 21:18:30 -0400 | [diff] [blame] | 448 | help |
| 449 | If enabled, then certain low level initializations (like setting up |
| 450 | the memory controller) are omitted and/or U-Boot does not relocate |
| 451 | itself into RAM. |
| 452 | Normally this variable MUST NOT be defined. The only exception is |
| 453 | when U-Boot is loaded (to RAM) by some other boot loader or by a |
| 454 | debugger which performs these initializations itself. |
| 455 | |
| 456 | config SPL_SKIP_LOWLEVEL_INIT |
Heinrich Schuchardt | e6e7cb6 | 2022-12-30 19:41:28 +0100 | [diff] [blame] | 457 | bool "Skip calls to certain low level initialization functions in SPL" |
| 458 | depends on SPL |
Tom Rini | e1e8544 | 2021-08-27 21:18:30 -0400 | [diff] [blame] | 459 | help |
| 460 | If enabled, then certain low level initializations (like setting up |
| 461 | the memory controller) are omitted and/or U-Boot does not relocate |
| 462 | itself into RAM. |
| 463 | Normally this variable MUST NOT be defined. The only exception is |
| 464 | when U-Boot is loaded (to RAM) by some other boot loader or by a |
| 465 | debugger which performs these initializations itself. |
| 466 | |
| 467 | config TPL_SKIP_LOWLEVEL_INIT |
Heinrich Schuchardt | e6e7cb6 | 2022-12-30 19:41:28 +0100 | [diff] [blame] | 468 | bool "Skip calls to certain low level initialization functions in TPL" |
Tom Rini | e1e8544 | 2021-08-27 21:18:30 -0400 | [diff] [blame] | 469 | depends on SPL && ARM |
| 470 | help |
| 471 | If enabled, then certain low level initializations (like setting up |
| 472 | the memory controller) are omitted and/or U-Boot does not relocate |
| 473 | itself into RAM. |
| 474 | Normally this variable MUST NOT be defined. The only exception is |
| 475 | when U-Boot is loaded (to RAM) by some other boot loader or by a |
| 476 | debugger which performs these initializations itself. |
| 477 | |
| 478 | config SKIP_LOWLEVEL_INIT_ONLY |
Heinrich Schuchardt | e6e7cb6 | 2022-12-30 19:41:28 +0100 | [diff] [blame] | 479 | bool "Skip call to lowlevel_init during early boot ONLY" |
Tom Rini | e1e8544 | 2021-08-27 21:18:30 -0400 | [diff] [blame] | 480 | depends on ARM |
| 481 | help |
| 482 | This allows just the call to lowlevel_init() to be skipped. The |
| 483 | normal CP15 init (such as enabling the instruction cache) is still |
| 484 | performed. |
| 485 | |
| 486 | config SPL_SKIP_LOWLEVEL_INIT_ONLY |
Heinrich Schuchardt | e6e7cb6 | 2022-12-30 19:41:28 +0100 | [diff] [blame] | 487 | bool "Skip call to lowlevel_init during early SPL boot ONLY" |
Tom Rini | e1e8544 | 2021-08-27 21:18:30 -0400 | [diff] [blame] | 488 | depends on SPL && ARM |
| 489 | help |
| 490 | This allows just the call to lowlevel_init() to be skipped. The |
| 491 | normal CP15 init (such as enabling the instruction cache) is still |
| 492 | performed. |
| 493 | |
| 494 | config TPL_SKIP_LOWLEVEL_INIT_ONLY |
Heinrich Schuchardt | e6e7cb6 | 2022-12-30 19:41:28 +0100 | [diff] [blame] | 495 | bool "Skip call to lowlevel_init during early TPL boot ONLY" |
Tom Rini | e1e8544 | 2021-08-27 21:18:30 -0400 | [diff] [blame] | 496 | depends on TPL && ARM |
| 497 | help |
| 498 | This allows just the call to lowlevel_init() to be skipped. The |
| 499 | normal CP15 init (such as enabling the instruction cache) is still |
| 500 | performed. |
| 501 | |
Heinrich Schuchardt | e6e7cb6 | 2022-12-30 19:41:28 +0100 | [diff] [blame] | 502 | endmenu |
| 503 | |
Tom Rini | 295ab16 | 2022-10-28 20:27:10 -0400 | [diff] [blame] | 504 | config SYS_HAS_NONCACHED_MEMORY |
| 505 | bool "Enable reserving a non-cached memory area for drivers" |
| 506 | depends on (ARM || MIPS) && (RTL8169 || MEDIATEK_ETH) |
| 507 | help |
| 508 | This is useful for drivers that would otherwise require a lot of |
| 509 | explicit cache maintenance. For some drivers it's also impossible to |
| 510 | properly maintain the cache. For example if the regions that need to |
| 511 | be flushed are not a multiple of the cache-line size, *and* padding |
| 512 | cannot be allocated between the regions to align them (i.e. if the |
| 513 | HW requires a contiguous array of regions, and the size of each |
| 514 | region is not cache-aligned), then a flush of one region may result |
| 515 | in overwriting data that hardware has written to another region in |
| 516 | the same cache-line. This can happen for example in network drivers |
| 517 | where descriptors for buffers are typically smaller than the CPU |
| 518 | cache-line (e.g. 16 bytes vs. 32 or 64 bytes). |
| 519 | |
| 520 | config SYS_NONCACHED_MEMORY |
| 521 | hex "Size in bytes of the non-cached memory area" |
| 522 | depends on SYS_HAS_NONCACHED_MEMORY |
| 523 | default 0x100000 |
| 524 | help |
| 525 | Size of non-cached memory area. This area of memory will be typically |
| 526 | located right below the malloc() area and mapped uncached in the MMU. |
| 527 | |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 528 | source "arch/arc/Kconfig" |
| 529 | source "arch/arm/Kconfig" |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 530 | source "arch/m68k/Kconfig" |
| 531 | source "arch/microblaze/Kconfig" |
| 532 | source "arch/mips/Kconfig" |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 533 | source "arch/nios2/Kconfig" |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 534 | source "arch/powerpc/Kconfig" |
| 535 | source "arch/sandbox/Kconfig" |
| 536 | source "arch/sh/Kconfig" |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 537 | source "arch/x86/Kconfig" |
Chris Zankel | 1387dab | 2016-08-10 18:36:44 +0300 | [diff] [blame] | 538 | source "arch/xtensa/Kconfig" |
Rick Chen | 3301bfc | 2017-12-26 13:55:58 +0800 | [diff] [blame] | 539 | source "arch/riscv/Kconfig" |
Tom Rini | a67ff80 | 2022-03-23 17:19:55 -0400 | [diff] [blame] | 540 | |
Tom Rini | c4aecf6 | 2022-06-16 14:04:36 -0400 | [diff] [blame] | 541 | if ARM || M68K || PPC |
| 542 | |
| 543 | source "arch/Kconfig.nxp" |
| 544 | |
| 545 | endif |
| 546 | |
Tom Rini | a67ff80 | 2022-03-23 17:19:55 -0400 | [diff] [blame] | 547 | source "board/keymile/Kconfig" |
Michal Simek | 9599f8f | 2022-06-24 14:14:59 +0200 | [diff] [blame] | 548 | |
Michal Simek | 9599f8f | 2022-06-24 14:14:59 +0200 | [diff] [blame] | 549 | choice |
| 550 | prompt "Endianness selection" |
Jiaxun Yang | 33e289a | 2024-07-17 16:07:02 +0800 | [diff] [blame] | 551 | default SYS_BIG_ENDIAN if MIPS || MICROBLAZE |
| 552 | default SYS_LITTLE_ENDIAN |
Michal Simek | 9599f8f | 2022-06-24 14:14:59 +0200 | [diff] [blame] | 553 | help |
Jiaxun Yang | 33e289a | 2024-07-17 16:07:02 +0800 | [diff] [blame] | 554 | Some boards can be configured for either little or big endian |
Michal Simek | 9599f8f | 2022-06-24 14:14:59 +0200 | [diff] [blame] | 555 | byte order. These modes require different U-Boot images. In general there |
| 556 | is one preferred byteorder for a particular system but some systems are |
| 557 | just as commonly used in the one or the other endianness. |
| 558 | |
| 559 | config SYS_BIG_ENDIAN |
| 560 | bool "Big endian" |
Jiaxun Yang | 33e289a | 2024-07-17 16:07:02 +0800 | [diff] [blame] | 561 | depends on SUPPORT_BIG_ENDIAN |
Michal Simek | 9599f8f | 2022-06-24 14:14:59 +0200 | [diff] [blame] | 562 | |
| 563 | config SYS_LITTLE_ENDIAN |
| 564 | bool "Little endian" |
Jiaxun Yang | 33e289a | 2024-07-17 16:07:02 +0800 | [diff] [blame] | 565 | depends on SUPPORT_LITTLE_ENDIAN |
Michal Simek | 9599f8f | 2022-06-24 14:14:59 +0200 | [diff] [blame] | 566 | endchoice |