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git01.mediatek.com / filogic / uboot / 6b642aca7f571e777924f50732f530fd94b03bfb / . / src / arm64 / qcom / sm8650-qrd.dts
blob: b0d7927b708f1d01877c9177da5e02180a333029 [file] [log] [blame]
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2023, Linaro Limited
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/leds/common.h>
9#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
10#include "sm8650.dtsi"
11#include "pm8010.dtsi"
12#include "pm8550.dtsi"
13#include "pm8550b.dtsi"
14#define PMK8550VE_SID 8
15#include "pm8550ve.dtsi"
16#include "pm8550vs.dtsi"
17#include "pmk8550.dtsi"
18#include "pmr735d_a.dtsi"
19
20/ {
21 model = "Qualcomm Technologies, Inc. SM8650 QRD";
22 compatible = "qcom,sm8650-qrd", "qcom,sm8650";
23
24 aliases {
25 serial0 = &uart15;
26 serial1 = &uart14;
27 };
28
29 chosen {
30 stdout-path = "serial0:115200n8";
31 };
32
33 gpio-keys {
34 compatible = "gpio-keys";
35
36 pinctrl-0 = <&volume_up_n>;
37 pinctrl-names = "default";
38
39 key-volume-up {
40 label = "Volume Up";
41 linux,code = <KEY_VOLUMEUP>;
42 gpios = <&pm8550_gpios 6 GPIO_ACTIVE_LOW>;
43 debounce-interval = <15>;
44 linux,can-disable;
45 wakeup-source;
46 };
47 };
48
49 pmic-glink {
50 compatible = "qcom,sm8650-pmic-glink",
51 "qcom,sm8550-pmic-glink",
52 "qcom,pmic-glink";
53 #address-cells = <1>;
54 #size-cells = <0>;
55 orientation-gpios = <&tlmm 29 GPIO_ACTIVE_HIGH>;
56
57 connector@0 {
58 compatible = "usb-c-connector";
59 reg = <0>;
60
61 power-role = "dual";
62 data-role = "dual";
63
64 ports {
65 #address-cells = <1>;
66 #size-cells = <0>;
67
68 port@0 {
69 reg = <0>;
70
71 pmic_glink_hs_in: endpoint {
72 remote-endpoint = <&usb_1_dwc3_hs>;
73 };
74 };
75
76 port@1 {
77 reg = <1>;
78
79 pmic_glink_ss_in: endpoint {
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]80 remote-endpoint = <&redriver_ss_out>;
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]81 };
82 };
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]83
84 port@2 {
85 reg = <2>;
86
87 pmic_glink_sbu: endpoint {
88 remote-endpoint = <&wcd_usbss_sbu_mux>;
89 };
90 };
91 };
92 };
93 };
94
95 sound {
96 compatible = "qcom,sm8650-sndcard", "qcom,sm8450-sndcard";
97 model = "SM8650-QRD";
98 audio-routing = "SpkrLeft IN", "WSA_SPK1 OUT",
99 "SpkrRight IN", "WSA_SPK2 OUT",
100 "IN1_HPHL", "HPHL_OUT",
101 "IN2_HPHR", "HPHR_OUT",
102 "AMIC1", "MIC BIAS1",
103 "AMIC2", "MIC BIAS2",
104 "AMIC3", "MIC BIAS3",
105 "AMIC4", "MIC BIAS3",
106 "AMIC5", "MIC BIAS4",
107 "TX SWR_INPUT0", "ADC1_OUTPUT",
108 "TX SWR_INPUT1", "ADC2_OUTPUT",
109 "TX SWR_INPUT2", "ADC3_OUTPUT",
110 "TX SWR_INPUT3", "ADC4_OUTPUT";
111
112 wcd-playback-dai-link {
113 link-name = "WCD Playback";
114
115 cpu {
116 sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>;
117 };
118
119 codec {
120 sound-dai = <&wcd939x 0>, <&swr1 0>, <&lpass_rxmacro 0>;
121 };
122
123 platform {
124 sound-dai = <&q6apm>;
125 };
126 };
127
128 wcd-capture-dai-link {
129 link-name = "WCD Capture";
130
131 cpu {
132 sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>;
133 };
134
135 codec {
136 sound-dai = <&wcd939x 1>, <&swr2 0>, <&lpass_txmacro 0>;
137 };
138
139 platform {
140 sound-dai = <&q6apm>;
141 };
142 };
143
144 wsa-dai-link {
145 link-name = "WSA Playback";
146
147 cpu {
148 sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>;
149 };
150
151 codec {
152 sound-dai = <&left_spkr>, <&right_spkr>, <&swr0 0>, <&lpass_wsamacro 0>;
153 };
154
155 platform {
156 sound-dai = <&q6apm>;
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]157 };
158 };
159 };
160
161 vph_pwr: vph-pwr-regulator {
162 compatible = "regulator-fixed";
163
164 regulator-name = "vph_pwr";
165 regulator-min-microvolt = <3700000>;
166 regulator-max-microvolt = <3700000>;
167
168 regulator-always-on;
169 regulator-boot-on;
170 };
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]171
172 wcd939x: audio-codec {
173 compatible = "qcom,wcd9395-codec", "qcom,wcd9390-codec";
174
175 pinctrl-0 = <&wcd_default>;
176 pinctrl-names = "default";
177
178 qcom,micbias1-microvolt = <1800000>;
179 qcom,micbias2-microvolt = <1800000>;
180 qcom,micbias3-microvolt = <1800000>;
181 qcom,micbias4-microvolt = <1800000>;
182 qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;
183 qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
184 qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
185 qcom,rx-device = <&wcd_rx>;
186 qcom,tx-device = <&wcd_tx>;
187
188 reset-gpios = <&tlmm 107 GPIO_ACTIVE_LOW>;
189
190 vdd-buck-supply = <&vreg_l15b_1p8>;
191 vdd-rxtx-supply = <&vreg_l15b_1p8>;
192 vdd-io-supply = <&vreg_l15b_1p8>;
193 vdd-mic-bias-supply = <&vreg_bob1>;
194
195 #sound-dai-cells = <1>;
196
197 mode-switch;
198 orientation-switch;
199
200 port {
201 wcd_codec_headset_in: endpoint {
202 remote-endpoint = <&wcd_usbss_headset_out>;
203 };
204 };
205 };
Tom Rini6b642ac2024-10-01 12:20:28 -0600[diff] [blame^]206
207 wcn7850-pmu {
208 compatible = "qcom,wcn7850-pmu";
209
210 pinctrl-names = "default";
211 pinctrl-0 = <&wlan_en>;
212
213 wlan-enable-gpios = <&tlmm 16 GPIO_ACTIVE_HIGH>;
214 /*
215 * TODO Add bt-enable-gpios once the Bluetooth driver is
216 * converted to using the power sequencer.
217 */
218
219 vdd-supply = <&vreg_s4i_0p85>;
220 vddio-supply = <&vreg_l15b_1p8>;
221 vddio1p2-supply = <&vreg_l3c_1p2>;
222 vddaon-supply = <&vreg_s2c_0p8>;
223 vdddig-supply = <&vreg_s3c_0p9>;
224 vddrfa1p2-supply = <&vreg_s1c_1p2>;
225 vddrfa1p8-supply = <&vreg_s6c_1p8>;
226
227 clocks = <&rpmhcc RPMH_RF_CLK1>;
228
229 regulators {
230 vreg_pmu_rfa_cmn: ldo0 {
231 regulator-name = "vreg_pmu_rfa_cmn";
232 };
233
234 vreg_pmu_aon_0p59: ldo1 {
235 regulator-name = "vreg_pmu_aon_0p59";
236 };
237
238 vreg_pmu_wlcx_0p8: ldo2 {
239 regulator-name = "vreg_pmu_wlcx_0p8";
240 };
241
242 vreg_pmu_wlmx_0p85: ldo3 {
243 regulator-name = "vreg_pmu_wlmx_0p85";
244 };
245
246 vreg_pmu_btcmx_0p85: ldo4 {
247 regulator-name = "vreg_pmu_btcmx_0p85";
248 };
249
250 vreg_pmu_rfa_0p8: ldo5 {
251 regulator-name = "vreg_pmu_rfa_0p8";
252 };
253
254 vreg_pmu_rfa_1p2: ldo6 {
255 regulator-name = "vreg_pmu_rfa_1p2";
256 };
257
258 vreg_pmu_rfa_1p8: ldo7 {
259 regulator-name = "vreg_pmu_rfa_1p8";
260 };
261
262 vreg_pmu_pcie_0p9: ldo8 {
263 regulator-name = "vreg_pmu_pcie_0p9";
264 };
265
266 vreg_pmu_pcie_1p8: ldo9 {
267 regulator-name = "vreg_pmu_pcie_1p8";
268 };
269 };
270 };
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]271};
272
273&apps_rsc {
274 regulators-0 {
275 compatible = "qcom,pm8550-rpmh-regulators";
276
277 vdd-bob1-supply = <&vph_pwr>;
278 vdd-bob2-supply = <&vph_pwr>;
279 vdd-l2-l13-l14-supply = <&vreg_bob1>;
280 vdd-l3-supply = <&vreg_s1c_1p2>;
281 vdd-l5-l16-supply = <&vreg_bob1>;
282 vdd-l6-l7-supply = <&vreg_bob1>;
283 vdd-l8-l9-supply = <&vreg_bob1>;
284 vdd-l11-supply = <&vreg_s1c_1p2>;
285 vdd-l12-supply = <&vreg_s6c_1p8>;
286 vdd-l15-supply = <&vreg_s6c_1p8>;
287 vdd-l17-supply = <&vreg_bob2>;
288
289 qcom,pmic-id = "b";
290
291 vreg_bob1: bob1 {
292 regulator-name = "vreg_bob1";
293 regulator-min-microvolt = <3296000>;
294 regulator-max-microvolt = <3960000>;
295 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
296 };
297
298 vreg_bob2: bob2 {
299 regulator-name = "vreg_bob2";
300 regulator-min-microvolt = <2720000>;
301 regulator-max-microvolt = <3008000>;
302 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
303 };
304
305 vreg_l2b_3p0: ldo2 {
306 regulator-name = "vreg_l2b_3p0";
307 regulator-min-microvolt = <3008000>;
308 regulator-max-microvolt = <3008000>;
309 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
310 regulator-allow-set-load;
311 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
312 RPMH_REGULATOR_MODE_HPM>;
313 };
314
315 vreg_l5b_3p1: ldo5 {
316 regulator-name = "vreg_l5b_3p1";
317 regulator-min-microvolt = <3104000>;
318 regulator-max-microvolt = <3104000>;
319 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
320 regulator-allow-set-load;
321 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
322 RPMH_REGULATOR_MODE_HPM>;
323 };
324
325 vreg_l6b_1p8: ldo6 {
326 regulator-name = "vreg_l6b_1p8";
327 regulator-min-microvolt = <1800000>;
328 regulator-max-microvolt = <3008000>;
329 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
330 regulator-allow-set-load;
331 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
332 RPMH_REGULATOR_MODE_HPM>;
333 };
334
335 vreg_l7b_1p8: ldo7 {
336 regulator-name = "vreg_l7b_1p8";
337 regulator-min-microvolt = <1800000>;
338 regulator-max-microvolt = <3008000>;
339 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
340 };
341
342 vreg_l8b_1p8: ldo8 {
343 regulator-name = "vreg_l8b_1p8";
344 regulator-min-microvolt = <1800000>;
345 regulator-max-microvolt = <3008000>;
346 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
347 regulator-allow-set-load;
348 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
349 RPMH_REGULATOR_MODE_HPM>;
350 };
351
352 vreg_l11b_1p2: ldo11 {
353 regulator-name = "vreg_l11b_1p2";
354 regulator-min-microvolt = <1200000>;
355 regulator-max-microvolt = <1504000>;
356 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
357 regulator-allow-set-load;
358 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
359 RPMH_REGULATOR_MODE_HPM>;
360 };
361
362 vreg_l12b_1p8: ldo12 {
363 regulator-name = "vreg_l12b_1p8";
364 regulator-min-microvolt = <1800000>;
365 regulator-max-microvolt = <1800000>;
366 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
367 regulator-allow-set-load;
368 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
369 RPMH_REGULATOR_MODE_HPM>;
370 };
371
372 vreg_l13b_3p0: ldo13 {
373 regulator-name = "vreg_l13b_3p0";
374 regulator-min-microvolt = <3000000>;
375 regulator-max-microvolt = <3000000>;
376 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
377 regulator-allow-set-load;
378 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
379 RPMH_REGULATOR_MODE_HPM>;
380 };
381
382 vreg_l14b_3p2: ldo14 {
383 regulator-name = "vreg_l14b_3p2";
384 regulator-min-microvolt = <3200000>;
385 regulator-max-microvolt = <3200000>;
386 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
387 regulator-allow-set-load;
388 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
389 RPMH_REGULATOR_MODE_HPM>;
390 };
391
392 vreg_l15b_1p8: ldo15 {
393 regulator-name = "vreg_l15b_1p8";
394 regulator-min-microvolt = <1800000>;
395 regulator-max-microvolt = <1800000>;
396 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
397 regulator-allow-set-load;
398 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
399 RPMH_REGULATOR_MODE_HPM>;
400 };
401
402 vreg_l16b_2p8: ldo16 {
403 regulator-name = "vreg_l16b_2p8";
404 regulator-min-microvolt = <2800000>;
405 regulator-max-microvolt = <2800000>;
406 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
407 regulator-allow-set-load;
408 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
409 RPMH_REGULATOR_MODE_HPM>;
410 };
411
412 vreg_l17b_2p5: ldo17 {
413 regulator-name = "vreg_l17b_2p5";
414 regulator-min-microvolt = <2504000>;
415 regulator-max-microvolt = <2504000>;
416 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
417 regulator-allow-set-load;
418 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
419 RPMH_REGULATOR_MODE_HPM>;
420 };
421 };
422
423 regulators-1 {
424 compatible = "qcom,pm8550vs-rpmh-regulators";
425
426 vdd-l1-supply = <&vreg_s1c_1p2>;
427 vdd-l2-supply = <&vreg_s1c_1p2>;
428 vdd-l3-supply = <&vreg_s1c_1p2>;
429 vdd-s1-supply = <&vph_pwr>;
430 vdd-s2-supply = <&vph_pwr>;
431 vdd-s3-supply = <&vph_pwr>;
432 vdd-s4-supply = <&vph_pwr>;
433 vdd-s5-supply = <&vph_pwr>;
434 vdd-s6-supply = <&vph_pwr>;
435
436 qcom,pmic-id = "c";
437
438 vreg_s1c_1p2: smps1 {
439 regulator-name = "vreg_s1c_1p2";
440 regulator-min-microvolt = <1256000>;
441 regulator-max-microvolt = <1348000>;
442 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
443 };
444
445 vreg_s2c_0p8: smps2 {
446 regulator-name = "vreg_s2c_0p8";
447 regulator-min-microvolt = <852000>;
448 regulator-max-microvolt = <1036000>;
449 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
450 };
451
452 vreg_s3c_0p9: smps3 {
453 regulator-name = "vreg_s3c_0p9";
454 regulator-min-microvolt = <976000>;
455 regulator-max-microvolt = <1064000>;
456 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
457 };
458
459 vreg_s4c_1p2: smps4 {
460 regulator-name = "vreg_s4c_1p2";
461 regulator-min-microvolt = <1224000>;
462 regulator-max-microvolt = <1280000>;
463 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
464 };
465
466 vreg_s5c_0p7: smps5 {
467 regulator-name = "vreg_s5c_0p7";
468 regulator-min-microvolt = <752000>;
469 regulator-max-microvolt = <900000>;
470 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
471 };
472
473 vreg_s6c_1p8: smps6 {
474 regulator-name = "vreg_s6c_1p8";
475 regulator-min-microvolt = <1856000>;
476 regulator-max-microvolt = <2000000>;
477 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
478 };
479
480 vreg_l1c_1p2: ldo1 {
481 regulator-name = "vreg_l1c_1p2";
482 regulator-min-microvolt = <1200000>;
483 regulator-max-microvolt = <1200000>;
484 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
485 regulator-allow-set-load;
486 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
487 RPMH_REGULATOR_MODE_HPM>;
488 };
489
490 vreg_l3c_1p2: ldo3 {
491 regulator-name = "vreg_l3c_1p2";
492 regulator-min-microvolt = <1200000>;
493 regulator-max-microvolt = <1200000>;
494 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
495 regulator-allow-set-load;
496 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
497 RPMH_REGULATOR_MODE_HPM>;
498 };
499 };
500
501 regulators-2 {
502 compatible = "qcom,pm8550vs-rpmh-regulators";
503
504 vdd-l1-supply = <&vreg_s3c_0p9>;
505
506 qcom,pmic-id = "d";
507
508 vreg_l1d_0p88: ldo1 {
509 regulator-name = "vreg_l1d_0p88";
510 regulator-min-microvolt = <912000>;
511 regulator-max-microvolt = <920000>;
512 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
513 regulator-allow-set-load;
514 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
515 RPMH_REGULATOR_MODE_HPM>;
516 };
517 };
518
519 regulators-3 {
520 compatible = "qcom,pm8550vs-rpmh-regulators";
521
522 vdd-l3-supply = <&vreg_s3c_0p9>;
523
524 qcom,pmic-id = "e";
525
526 vreg_l3e_0p9: ldo3 {
527 regulator-name = "vreg_l3e_0p9";
528 regulator-min-microvolt = <880000>;
529 regulator-max-microvolt = <920000>;
530 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
531 regulator-allow-set-load;
532 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
533 RPMH_REGULATOR_MODE_HPM>;
534 };
535 };
536
537 regulators-4 {
538 compatible = "qcom,pm8550vs-rpmh-regulators";
539
540 vdd-l1-supply = <&vreg_s3c_0p9>;
541 vdd-l3-supply = <&vreg_s3c_0p9>;
542
543 qcom,pmic-id = "g";
544
545 vreg_l1g_0p91: ldo1 {
546 regulator-name = "vreg_l1g_0p91";
547 regulator-min-microvolt = <912000>;
548 regulator-max-microvolt = <920000>;
549 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
550 regulator-allow-set-load;
551 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
552 RPMH_REGULATOR_MODE_HPM>;
553 };
554
555 vreg_l3g_0p91: ldo3 {
556 regulator-name = "vreg_l3g_0p91";
557 regulator-min-microvolt = <880000>;
558 regulator-max-microvolt = <912000>;
559 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
560 regulator-allow-set-load;
561 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
562 RPMH_REGULATOR_MODE_HPM>;
563 };
564 };
565
566 regulators-5 {
567 compatible = "qcom,pm8550ve-rpmh-regulators";
568
569 vdd-l1-supply = <&vreg_s3c_0p9>;
570 vdd-l2-supply = <&vreg_s3c_0p9>;
571 vdd-l3-supply = <&vreg_s1c_1p2>;
572 vdd-s4-supply = <&vph_pwr>;
573
574 qcom,pmic-id = "i";
575
576 vreg_s4i_0p85: smps4 {
577 regulator-name = "vreg_s4i_0p85";
578 regulator-min-microvolt = <852000>;
579 regulator-max-microvolt = <1004000>;
580 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
581 };
582
583 vreg_l1i_0p88: ldo1 {
584 regulator-name = "vreg_l1i_0p88";
585 regulator-min-microvolt = <880000>;
586 regulator-max-microvolt = <912000>;
587 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
588 regulator-allow-set-load;
589 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
590 RPMH_REGULATOR_MODE_HPM>;
591 };
592
593 vreg_l2i_0p88: ldo2 {
594 regulator-name = "vreg_l2i_0p88";
595 regulator-min-microvolt = <880000>;
596 regulator-max-microvolt = <912000>;
597 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
598 regulator-allow-set-load;
599 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
600 RPMH_REGULATOR_MODE_HPM>;
601 };
602
603 vreg_l3i_1p2: ldo3 {
604 regulator-name = "vreg_l3i_0p91";
605 regulator-min-microvolt = <1200000>;
606 regulator-max-microvolt = <1200000>;
607 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
608 regulator-allow-set-load;
609 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
610 RPMH_REGULATOR_MODE_HPM>;
611 };
612 };
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]613
614 regulators-6 {
615 compatible = "qcom,pm8010-rpmh-regulators";
616 qcom,pmic-id = "m";
617
618 vdd-l1-l2-supply = <&vreg_s1c_1p2>;
619 vdd-l3-l4-supply = <&vreg_bob2>;
620 vdd-l5-supply = <&vreg_s6c_1p8>;
621 vdd-l6-supply = <&vreg_bob1>;
622 vdd-l7-supply = <&vreg_bob1>;
623
624 vreg_l1m_1p1: ldo1 {
625 regulator-name = "vreg_l1m_1p1";
626 regulator-min-microvolt = <1104000>;
627 regulator-max-microvolt = <1104000>;
628 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
629 regulator-allow-set-load;
630 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
631 RPMH_REGULATOR_MODE_HPM>;
632 };
633
634 vreg_l2m_1p056: ldo2 {
635 regulator-name = "vreg_l2m_1p056";
636 regulator-min-microvolt = <1056000>;
637 regulator-max-microvolt = <1056000>;
638 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
639 regulator-allow-set-load;
640 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
641 RPMH_REGULATOR_MODE_HPM>;
642 };
643
644 vreg_l3m_2p8: ldo3 {
645 regulator-name = "vreg_l3m_2p8";
646 regulator-min-microvolt = <2800000>;
647 regulator-max-microvolt = <2800000>;
648 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
649 };
650
651 vreg_l4m_2p8: ldo4 {
652 regulator-name = "vreg_l4m_2p8";
653 regulator-min-microvolt = <2800000>;
654 regulator-max-microvolt = <2800000>;
655 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
656 };
657
658 vreg_l5m_1p8: ldo5 {
659 regulator-name = "vreg_l5m_1p8";
660 regulator-min-microvolt = <1800000>;
661 regulator-max-microvolt = <1800000>;
662 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
663 };
664
665 vreg_l6m_2p8: ldo6 {
666 regulator-name = "vreg_l6m_2p8";
667 regulator-min-microvolt = <2800000>;
668 regulator-max-microvolt = <2800000>;
669 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
670 };
671
672 vreg_l7m_2p96: ldo7 {
673 regulator-name = "vreg_l7m_2p96";
674 regulator-min-microvolt = <2960000>;
675 regulator-max-microvolt = <2960000>;
676 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
677 };
678 };
679
680 regulators-7 {
681 compatible = "qcom,pm8010-rpmh-regulators";
682 qcom,pmic-id = "n";
683
684 vdd-l1-l2-supply = <&vreg_s1c_1p2>;
685 vdd-l3-l4-supply = <&vreg_s6c_1p8>;
686 vdd-l5-supply = <&vreg_bob2>;
687 vdd-l6-supply = <&vreg_bob2>;
688 vdd-l7-supply = <&vreg_bob1>;
689
690 vreg_l1n_1p1: ldo1 {
691 regulator-name = "vreg_l1n_1p1";
692 regulator-min-microvolt = <1104000>;
693 regulator-max-microvolt = <1104000>;
694 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
695 regulator-allow-set-load;
696 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
697 RPMH_REGULATOR_MODE_HPM>;
698 };
699
700 vreg_l2n_1p056: ldo2 {
701 regulator-name = "vreg_l2n_1p056";
702 regulator-min-microvolt = <1056000>;
703 regulator-max-microvolt = <1056000>;
704 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
705 regulator-allow-set-load;
706 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
707 RPMH_REGULATOR_MODE_HPM>;
708 };
709
710 vreg_l3n_1p8: ldo3 {
711 regulator-name = "vreg_l3n_1p8";
712 regulator-min-microvolt = <1800000>;
713 regulator-max-microvolt = <1800000>;
714 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
715 };
716
717 vreg_l4n_1p8: ldo4 {
718 regulator-name = "vreg_l4n_1p8";
719 regulator-min-microvolt = <1800000>;
720 regulator-max-microvolt = <1800000>;
721 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
722 };
723
724 vreg_l5n_2p8: ldo5 {
725 regulator-name = "vreg_l5n_2p8";
726 regulator-min-microvolt = <2800000>;
727 regulator-max-microvolt = <2800000>;
728 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
729 };
730
731 vreg_l6n_2p8: ldo6 {
732 regulator-name = "vreg_l6n_2p8";
733 regulator-min-microvolt = <2800000>;
734 regulator-max-microvolt = <2800000>;
735 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
736 };
737
738 vreg_l7n_3p3: ldo7 {
739 regulator-name = "vreg_l7n_3p3";
740 regulator-min-microvolt = <3304000>;
741 regulator-max-microvolt = <3304000>;
742 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
743 };
744 };
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]745};
746
747&dispcc {
748 status = "okay";
749};
750
751&gpi_dma1 {
752 status = "okay";
753};
754
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]755&i2c3 {
756 status = "okay";
757
758 wcd_usbss: typec-mux@e {
759 compatible = "qcom,wcd9395-usbss", "qcom,wcd9390-usbss";
760 reg = <0xe>;
761
762 vdd-supply = <&vreg_l15b_1p8>;
763 reset-gpios = <&tlmm 152 GPIO_ACTIVE_HIGH>;
764
765 mode-switch;
766 orientation-switch;
767
768 ports {
769 #address-cells = <1>;
770 #size-cells = <0>;
771
772 port@0 {
773 reg = <0>;
774
775 wcd_usbss_sbu_mux: endpoint {
776 remote-endpoint = <&pmic_glink_sbu>;
777 };
778 };
779
780 port@1 {
781 reg = <1>;
782
783 wcd_usbss_headset_out: endpoint {
784 remote-endpoint = <&wcd_codec_headset_in>;
785 };
786 };
787 };
788 };
789};
790
791&i2c6 {
792 status = "okay";
793
794 typec-mux@1c {
795 compatible = "onnn,nb7vpq904m";
796 reg = <0x1c>;
797
798 vcc-supply = <&vreg_l15b_1p8>;
799
800 retimer-switch;
801 orientation-switch;
802
803 ports {
804 #address-cells = <1>;
805 #size-cells = <0>;
806
807 port@0 {
808 reg = <0>;
809
810 redriver_ss_out: endpoint {
811 remote-endpoint = <&pmic_glink_ss_in>;
812 };
813 };
814
815 port@1 {
816 reg = <1>;
817
818 redriver_ss_in: endpoint {
819 data-lanes = <3 2 1 0>;
820 remote-endpoint = <&usb_dp_qmpphy_out>;
821 };
822 };
823 };
824 };
825};
826
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]827&ipa {
828 qcom,gsi-loader = "self";
829 memory-region = <&ipa_fw_mem>;
830 firmware-name = "qcom/sm8650/ipa_fws.mbn";
831 status = "okay";
832};
833
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]834&gpu {
835 status = "okay";
836
837 zap-shader {
838 firmware-name = "qcom/sm8650/gen70900_zap.mbn";
839 };
840};
841
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]842&lpass_tlmm {
843 spkr_1_sd_n_active: spkr-1-sd-n-active-state {
844 pins = "gpio21";
845 function = "gpio";
846 drive-strength = <16>;
847 bias-disable;
848 output-low;
849 };
850};
851
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]852&mdss {
853 status = "okay";
854};
855
856&mdss_dsi0 {
857 vdda-supply = <&vreg_l3i_1p2>;
858
859 status = "okay";
860
861 panel@0 {
862 compatible = "visionox,vtdr6130";
863 reg = <0>;
864
865 reset-gpios = <&tlmm 133 GPIO_ACTIVE_LOW>;
866
867 vddio-supply = <&vreg_l12b_1p8>;
868 vci-supply = <&vreg_l13b_3p0>;
869 vdd-supply = <&vreg_l11b_1p2>;
870
871 pinctrl-0 = <&disp0_reset_n_active>, <&mdp_vsync_active>;
872 pinctrl-1 = <&disp0_reset_n_suspend>, <&mdp_vsync_suspend>;
873 pinctrl-names = "default", "sleep";
874
875 port {
876 panel0_in: endpoint {
877 remote-endpoint = <&mdss_dsi0_out>;
878 };
879 };
880 };
881};
882
883&mdss_dsi0_out {
884 remote-endpoint = <&panel0_in>;
885 data-lanes = <0 1 2 3>;
886};
887
888&mdss_dsi0_phy {
889 vdds-supply = <&vreg_l1i_0p88>;
890
891 status = "okay";
892};
893
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]894&mdss_dp0 {
895 status = "okay";
896};
897
898&mdss_dp0_out {
899 data-lanes = <0 1>;
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]900};
901
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]902&pcie0 {
903 wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
904 perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
905
906 pinctrl-0 = <&pcie0_default_state>;
907 pinctrl-names = "default";
908
909 status = "okay";
910};
911
Tom Rini6b642ac2024-10-01 12:20:28 -0600[diff] [blame^]912&pcieport0 {
913 wifi@0 {
914 compatible = "pci17cb,1107";
915 reg = <0x10000 0x0 0x0 0x0 0x0>;
916
917 vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
918 vddaon-supply = <&vreg_pmu_aon_0p59>;
919 vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
920 vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
921 vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
922 vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
923 vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>;
924 vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>;
925 vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>;
926 };
927};
928
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]929&pcie0_phy {
930 vdda-phy-supply = <&vreg_l1i_0p88>;
931 vdda-pll-supply = <&vreg_l3i_1p2>;
932
933 status = "okay";
934};
935
936&pon_pwrkey {
937 status = "okay";
938};
939
940&pon_resin {
941 linux,code = <KEY_VOLUMEDOWN>;
942
943 status = "okay";
944};
945
946&pm8550_flash {
947 status = "okay";
948
949 led-0 {
950 function = LED_FUNCTION_FLASH;
951 color = <LED_COLOR_ID_YELLOW>;
952 led-sources = <1>, <4>;
953 led-max-microamp = <500000>;
954 flash-max-microamp = <2000000>;
955 flash-max-timeout-us = <1280000>;
956 function-enumerator = <0>;
957 };
958
959 led-1 {
960 function = LED_FUNCTION_FLASH;
961 color = <LED_COLOR_ID_WHITE>;
962 led-sources = <2>, <3>;
963 led-max-microamp = <500000>;
964 flash-max-microamp = <2000000>;
965 flash-max-timeout-us = <1280000>;
966 function-enumerator = <1>;
967 };
968};
969
970&pm8550_gpios {
971 volume_up_n: volume-up-n-state {
972 pins = "gpio6";
973 function = "normal";
974 bias-pull-up;
975 input-enable;
976 power-source = <1>;
977 };
978};
979
980&pm8550_pwm {
981 status = "okay";
982
983 multi-led {
984 color = <LED_COLOR_ID_RGB>;
985 function = LED_FUNCTION_STATUS;
986
987 #address-cells = <1>;
988 #size-cells = <0>;
989
990 led@1 {
991 reg = <1>;
992 color = <LED_COLOR_ID_RED>;
993 };
994
995 led@2 {
996 reg = <2>;
997 color = <LED_COLOR_ID_GREEN>;
998 };
999
1000 led@3 {
1001 reg = <3>;
1002 color = <LED_COLOR_ID_BLUE>;
1003 };
1004 };
1005};
1006
1007&pm8550b_eusb2_repeater {
1008 vdd18-supply = <&vreg_l15b_1p8>;
1009 vdd3-supply = <&vreg_l5b_3p1>;
1010};
1011
1012&pmk8550_rtc {
1013 status = "okay";
1014};
1015
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]1016&qup_i2c3_data_clk {
1017 /* Use internal I2C pull-up */
1018 bias-pull-up = <2200>;
1019};
1020
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]1021&qupv3_id_0 {
1022 status = "okay";
1023};
1024
1025&qupv3_id_1 {
1026 status = "okay";
1027};
1028
1029&remoteproc_adsp {
1030 firmware-name = "qcom/sm8650/adsp.mbn",
1031 "qcom/sm8650/adsp_dtb.mbn";
1032
1033 status = "okay";
1034};
1035
1036&remoteproc_cdsp {
1037 firmware-name = "qcom/sm8650/cdsp.mbn",
1038 "qcom/sm8650/cdsp_dtb.mbn";
1039
1040 status = "okay";
1041};
1042
1043&remoteproc_mpss {
1044 firmware-name = "qcom/sm8650/modem.mbn",
1045 "qcom/sm8650/modem_dtb.mbn";
1046
1047 status = "okay";
1048};
1049
1050&sleep_clk {
1051 clock-frequency = <32000>;
1052};
1053
1054&spi4 {
1055 status = "okay";
1056
1057 touchscreen@0 {
1058 compatible = "goodix,gt9916";
1059 reg = <0>;
1060
1061 interrupt-parent = <&tlmm>;
1062 interrupts = <162 IRQ_TYPE_LEVEL_LOW>;
1063
1064 reset-gpios = <&tlmm 161 GPIO_ACTIVE_LOW>;
1065
1066 avdd-supply = <&vreg_l14b_3p2>;
1067
1068 spi-max-frequency = <1000000>;
1069
1070 touchscreen-size-x = <1080>;
1071 touchscreen-size-y = <2400>;
1072
1073 pinctrl-0 = <&ts_irq>, <&ts_reset>;
1074 pinctrl-names = "default";
1075 };
1076};
1077
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]1078&swr0 {
1079 status = "okay";
1080
1081 /* WSA8845, Speaker Left */
1082 left_spkr: speaker@0,0 {
1083 compatible = "sdw20217020400";
1084 reg = <0 0>;
1085 pinctrl-0 = <&spkr_1_sd_n_active>;
1086 pinctrl-names = "default";
1087 powerdown-gpios = <&lpass_tlmm 21 GPIO_ACTIVE_LOW>;
1088 #sound-dai-cells = <0>;
1089 sound-name-prefix = "SpkrLeft";
1090 vdd-1p8-supply = <&vreg_l15b_1p8>;
1091 vdd-io-supply = <&vreg_l3c_1p2>;
Tom Rini6b642ac2024-10-01 12:20:28 -0600[diff] [blame^]1092
1093 /*
1094 * WSA8845 Port 1 (DAC) <=> SWR0 Port 1 (SPKR_L)
1095 * WSA8845 Port 2 (COMP) <=> SWR0 Port 2 (SPKR_L_COMP)
1096 * WSA8845 Port 3 (BOOST) <=> SWR0 Port 3 (SPKR_L_BOOST)
1097 * WSA8845 Port 4 (PBR) <=> SWR0 Port 7 (PBR)
1098 * WSA8845 Port 5 (VISENSE) <=> SWR0 Port 10 (SPKR_L_VI)
1099 * WSA8845 Port 6 (CPS) <=> SWR0 Port 13 (CPS)
1100 */
1101 qcom,port-mapping = <1 2 3 7 10 13>;
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]1102 };
1103
1104 /* WSA8845, Speaker Right */
1105 right_spkr: speaker@0,1 {
1106 compatible = "sdw20217020400";
1107 reg = <0 1>;
1108 pinctrl-0 = <&spkr_2_sd_n_active>;
1109 pinctrl-names = "default";
1110 powerdown-gpios = <&tlmm 77 GPIO_ACTIVE_LOW>;
1111 #sound-dai-cells = <0>;
1112 sound-name-prefix = "SpkrRight";
1113 vdd-1p8-supply = <&vreg_l15b_1p8>;
1114 vdd-io-supply = <&vreg_l3c_1p2>;
Tom Rini6b642ac2024-10-01 12:20:28 -0600[diff] [blame^]1115
1116 /*
1117 * WSA8845 Port 1 (DAC) <=> SWR0 Port 4 (SPKR_R)
1118 * WSA8845 Port 2 (COMP) <=> SWR0 Port 5 (SPKR_R_COMP)
1119 * WSA8845 Port 3 (BOOST) <=> SWR0 Port 6 (SPKR_R_BOOST)
1120 * WSA8845 Port 4 (PBR) <=> SWR0 Port 7 (PBR)
1121 * WSA8845 Port 5 (VISENSE) <=> SWR0 Port 11 (SPKR_R_VI)
1122 * WSA8845 Port 6 (CPS) <=> SWR0 Port 13 (CPS)
1123 */
1124 qcom,port-mapping = <4 5 6 7 11 13>;
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]1125 };
1126};
1127
1128&swr1 {
1129 status = "okay";
1130
1131 /* WCD9395 RX */
1132 wcd_rx: codec@0,4 {
1133 compatible = "sdw20217010e00";
1134 reg = <0 4>;
1135
1136 /*
1137 * WCD9395 RX Port 1 (HPH_L/R) <=> SWR1 Port 1 (HPH_L/R)
1138 * WCD9395 RX Port 2 (CLSH) <=> SWR1 Port 2 (CLSH)
1139 * WCD9395 RX Port 3 (COMP_L/R) <=> SWR1 Port 3 (COMP_L/R)
1140 * WCD9395 RX Port 4 (LO) <=> SWR1 Port 4 (LO)
1141 * WCD9395 RX Port 5 (DSD_L/R) <=> SWR1 Port 5 (DSD_L/R)
1142 * WCD9395 RX Port 6 (HIFI_PCM_L/R) <=> SWR1 Port 9 (HIFI_PCM_L/R)
1143 */
1144 qcom,rx-port-mapping = <1 2 3 4 5 9>;
1145 };
1146};
1147
1148&swr2 {
1149 status = "okay";
1150
1151 /* WCD9395 TX */
1152 wcd_tx: codec@0,3 {
1153 compatible = "sdw20217010e00";
1154 reg = <0 3>;
1155
1156 /*
1157 * WCD9395 TX Port 1 (ADC1,2,3,4) <=> SWR2 Port 2 (TX SWR_INPUT 0,1,2,3)
1158 * WCD9395 TX Port 2 (ADC3,4 & DMIC0,1) <=> SWR2 Port 2 (TX SWR_INPUT 0,1,2,3)
1159 * WCD9395 TX Port 3 (DMIC0,1,2,3 & MBHC) <=> SWR2 Port 3 (TX SWR_INPUT 4,5,6,7)
1160 * WCD9395 TX Port 4 (DMIC4,5,6,7) <=> SWR2 Port 4 (TX SWR_INPUT 8,9,10,11)
1161 */
1162 qcom,tx-port-mapping = <2 2 3 4>;
1163 };
1164};
1165
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]1166&tlmm {
1167 /* Reserved I/Os for NFC */
1168 gpio-reserved-ranges = <32 8>, <74 1>;
1169
1170 bt_default: bt-default-state {
1171 bt-en-pins {
1172 pins = "gpio17";
1173 function = "gpio";
1174 drive-strength = <16>;
1175 bias-disable;
1176 };
1177
1178 sw-ctrl-pins {
1179 pins = "gpio18";
1180 function = "gpio";
1181 bias-pull-down;
1182 };
1183 };
1184
1185 disp0_reset_n_active: disp0-reset-n-active-state {
1186 pins = "gpio133";
1187 function = "gpio";
1188 drive-strength = <8>;
1189 bias-disable;
1190 };
1191
1192 disp0_reset_n_suspend: disp0-reset-n-suspend-state {
1193 pins = "gpio133";
1194 function = "gpio";
1195 drive-strength = <2>;
1196 bias-pull-down;
1197 };
1198
1199 mdp_vsync_active: mdp-vsync-active-state {
1200 pins = "gpio86";
1201 function = "mdp_vsync";
1202 drive-strength = <2>;
1203 bias-pull-down;
1204 };
1205
1206 mdp_vsync_suspend: mdp-vsync-suspend-state {
1207 pins = "gpio86";
1208 function = "mdp_vsync";
1209 drive-strength = <2>;
1210 bias-pull-down;
1211 };
1212
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]1213 spkr_2_sd_n_active: spkr-2-sd-n-active-state {
1214 pins = "gpio77";
1215 function = "gpio";
1216 drive-strength = <16>;
1217 bias-disable;
1218 output-low;
1219 };
1220
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]1221 ts_irq: ts-irq-state {
1222 pins = "gpio161";
1223 function = "gpio";
1224 drive-strength = <8>;
1225 bias-pull-up;
1226 output-disable;
1227 };
1228
1229 ts_reset: ts-reset-state {
1230 pins = "gpio162";
1231 function = "gpio";
1232 drive-strength = <8>;
1233 bias-pull-up;
1234 };
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]1235
1236 wcd_default: wcd-reset-n-active-state {
1237 pins = "gpio107";
1238 function = "gpio";
1239 drive-strength = <16>;
1240 bias-disable;
1241 output-low;
1242 };
Tom Rini6b642ac2024-10-01 12:20:28 -0600[diff] [blame^]1243
1244 wlan_en: wlan-en-state {
1245 pins = "gpio16";
1246 function = "gpio";
1247 drive-strength = <8>;
1248 bias-pull-down;
1249 };
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]1250};
1251
1252&uart14 {
1253 status = "okay";
1254
1255 bluetooth {
1256 compatible = "qcom,wcn7850-bt";
1257
1258 clocks = <&rpmhcc RPMH_RF_CLK1>;
1259
1260 vddio-supply = <&vreg_l3c_1p2>;
1261 vddaon-supply = <&vreg_l15b_1p8>;
1262 vdddig-supply = <&vreg_s3c_0p9>;
1263 vddrfa0p8-supply = <&vreg_s3c_0p9>;
1264 vddrfa1p2-supply = <&vreg_s1c_1p2>;
1265 vddrfa1p9-supply = <&vreg_s6c_1p8>;
1266
1267 max-speed = <3200000>;
1268
1269 enable-gpios = <&tlmm 17 GPIO_ACTIVE_HIGH>;
1270 swctrl-gpios = <&tlmm 18 GPIO_ACTIVE_HIGH>;
1271
1272 pinctrl-0 = <&bt_default>;
1273 pinctrl-names = "default";
1274 };
1275};
1276
1277&uart15 {
1278 status = "okay";
1279};
1280
1281&ufs_mem_hc {
1282 reset-gpios = <&tlmm 210 GPIO_ACTIVE_LOW>;
1283
1284 vcc-supply = <&vreg_l17b_2p5>;
1285 vcc-max-microamp = <1300000>;
1286 vccq-supply = <&vreg_l1c_1p2>;
1287 vccq-max-microamp = <1200000>;
1288
1289 status = "okay";
1290};
1291
1292&ufs_mem_phy {
1293 vdda-phy-supply = <&vreg_l1d_0p88>;
1294 vdda-pll-supply = <&vreg_l3i_1p2>;
1295
1296 status = "okay";
1297};
1298
1299/*
1300 * DPAUX -> WCD9395 -> USB_SBU -> USB-C
1301 * eUSB2 DP/DM -> PM85550HS -> eUSB2 DP/DM -> WCD9395 -> USB-C
1302 * USB SS -> NB7VPQ904MMUTWG -> USB-C
1303 */
1304
1305&usb_1 {
1306 status = "okay";
1307};
1308
1309&usb_1_dwc3 {
1310 dr_mode = "otg";
1311 usb-role-switch;
1312};
1313
1314&usb_1_dwc3_hs {
1315 remote-endpoint = <&pmic_glink_hs_in>;
1316};
1317
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]1318&usb_1_hsphy {
1319 vdd-supply = <&vreg_l1i_0p88>;
1320 vdda12-supply = <&vreg_l3i_1p2>;
1321
1322 phys = <&pm8550b_eusb2_repeater>;
1323
1324 status = "okay";
1325};
1326
1327&usb_dp_qmpphy {
1328 vdda-phy-supply = <&vreg_l3i_1p2>;
1329 vdda-pll-supply = <&vreg_l3g_0p91>;
1330
1331 status = "okay";
1332};
1333
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]1334&usb_dp_qmpphy_out {
1335 remote-endpoint = <&redriver_ss_in>;
1336};
1337
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]1338&xo_board {
1339 clock-frequency = <76800000>;
1340};