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git01.mediatek.com / filogic / uboot / 68b735bd865650a1ac6db41bd8f31f87190b0bcf / . / arch / arm / mach-mvebu / Kconfig
blob: 594e9a03d90145947394ad282217d6ed96f07921 [file] [log] [blame]
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]1if ARCH_MVEBU
2
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]3config HAVE_MVEBU_EFUSE
4 bool
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]5
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]6config ARMADA_32BIT
7 bool
Michal Simek7e7ba3b2018-07-23 15:55:15 +0200[diff] [blame]8 select ARCH_MISC_INIT
9 select BOARD_EARLY_INIT_F
Lokesh Vutla81b1a672018-04-26 18:21:26 +0530[diff] [blame]10 select CPU_V7A
Stefan Roese1f1b3e92019-04-11 08:58:32 +0200[diff] [blame]11 select SPL_DM if SPL
12 select SPL_DM_SEQ_ALIAS if SPL
13 select SPL_OF_CONTROL if SPL
Tom Rinib7cc2fe2021-10-15 10:54:41 -0400[diff] [blame]14 select SPL_SKIP_LOWLEVEL_INIT if SPL
Stefan Roese1f1b3e92019-04-11 08:58:32 +0200[diff] [blame]15 select SPL_SIMPLE_BUS if SPL
Michal Simek7e7ba3b2018-07-23 15:55:15 +0200[diff] [blame]16 select SUPPORT_SPL
Philip Oberfichtner5833e1b2022-08-17 15:07:12 +0200[diff] [blame]17 select SYS_L2_PL310 if !SYS_L2CACHE_OFF
Stefan Roese85bddff2019-04-12 16:42:28 +0200[diff] [blame]18 select TRANSLATION_OFFSET
Pali Rohárc5c28df2022-04-06 16:20:20 +0200[diff] [blame]19 select SPL_SYS_NO_VECTOR_TABLE if SPL
Pali Roháraaed3282022-05-06 11:05:14 +0200[diff] [blame]20 select ARCH_VERY_EARLY_INIT
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]21
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]22# ARMv7 SoCs...
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]23config ARMADA_375
24 bool
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]25 select ARMADA_32BIT
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]26
Stefan Roeseeb083e52015-12-21 13:56:33 +0100[diff] [blame]27config ARMADA_38X
28 bool
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]29 select ARMADA_32BIT
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]30 select HAVE_MVEBU_EFUSE
Stefan Roeseeb083e52015-12-21 13:56:33 +0100[diff] [blame]31
Joshua Scott4ba8e992020-11-09 10:14:08 +1300[diff] [blame]32config ARMADA_38X_HS_IMPEDANCE_THRESH
33 hex "Armada 38x USB 2.0 High-Speed Impedance Threshold (0x0 - 0x7)"
34 depends on ARMADA_38X
35 default 0x6
36 range 0x0 0x7
37
Stefan Roeseeb083e52015-12-21 13:56:33 +0100[diff] [blame]38config ARMADA_XP
39 bool
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]40 select ARMADA_32BIT
41
42# ARMv8 SoCs...
43config ARMADA_3700
44 bool
45 select ARM64
Pali Rohár70d9bee2022-02-23 14:15:45 +0100[diff] [blame]46 select HAVE_MVEBU_EFUSE
Stefan Roeseeb083e52015-12-21 13:56:33 +0100[diff] [blame]47
Stefan Roesecb410332016-05-25 08:13:45 +0200[diff] [blame]48# Armada 7K and 8K are very similar - use only one Kconfig symbol for both
49config ARMADA_8K
50 bool
51 select ARM64
52
Chris Packhameaab4612022-11-05 17:23:59 +1300[diff] [blame]53config ALLEYCAT_5
54 bool
55 select ARM64
56
Chris Packham1d496682016-10-26 14:08:30 +1300[diff] [blame]57# Armada PLL frequency (used for NAND clock generation)
58config SYS_MVEBU_PLL_CLOCK
59 int
Chris Packhama8f845e2019-04-11 22:22:50 +1200[diff] [blame]60 default "2000000000" if ARMADA_XP || ARMADA_3700 || ARMADA_8K || ARMADA_MSYS
Chris Packham1d496682016-10-26 14:08:30 +1300[diff] [blame]61 default "1000000000" if ARMADA_38X || ARMADA_375
62
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]63# Armada XP/38x SoC types...
Phil Suttera7f94ad2015-12-25 14:41:22 +0100[diff] [blame]64config MV78230
65 bool
66 select ARMADA_XP
67
68config MV78260
69 bool
70 select ARMADA_XP
Simon Glass203b3ab2017-06-14 21:28:24 -0600[diff] [blame]71 imply CMD_SATA
Phil Suttera7f94ad2015-12-25 14:41:22 +0100[diff] [blame]72
73config MV78460
74 bool
75 select ARMADA_XP
76
Chris Packhama8f845e2019-04-11 22:22:50 +1200[diff] [blame]77config ARMADA_MSYS
78 bool
79 select ARMADA_32BIT
80
81config 98DX4251
82 bool
83 select ARMADA_MSYS
84
85config 98DX3336
86 bool
87 select ARMADA_MSYS
88
89config 98DX3236
90 bool
91 select ARMADA_MSYS
92
Chris Packhamf5fc25b2016-09-22 12:56:13 +1200[diff] [blame]93config 88F6820
Phil Suttera7f94ad2015-12-25 14:41:22 +0100[diff] [blame]94 bool
95 select ARMADA_38X
96
Tom Rini40a325f2022-03-30 18:07:24 -0400[diff] [blame]97config CUSTOMER_BOARD_SUPPORT
98 bool
99
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]100choice
Chris Packham67b7d502022-11-05 17:24:00 +1300[diff] [blame]101 prompt "Armada XP/375/38x/3700/7K/8K/Alleycat-5 board select"
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]102 optional
103
Stefan Roese73606402015-10-20 15:14:47 +0200[diff] [blame]104config TARGET_CLEARFOG
105 bool "Support ClearFog"
Chris Packhamf5fc25b2016-09-22 12:56:13 +1200[diff] [blame]106 select 88F6820
Baruch Siach1c5e95d2020-01-20 14:20:13 +0200[diff] [blame]107 select BOARD_LATE_INIT
Stefan Roese73606402015-10-20 15:14:47 +0200[diff] [blame]108
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]109config TARGET_HELIOS4
110 bool "Support Helios4"
111 select 88F6820
112
Konstantin Porotchkin7f8dfea2017-02-16 13:52:22 +0200[diff] [blame]113config TARGET_MVEBU_ARMADA_37XX
114 bool "Support Armada 37xx platforms"
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]115 select ARMADA_3700
Simon Glass0e5faf02017-06-14 21:28:21 -0600[diff] [blame]116 imply SCSI
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]117
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]118config TARGET_DB_88F6720
119 bool "Support DB-88F6720 Armada 375"
120 select ARMADA_375
121
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]122config TARGET_DB_88F6820_GP
123 bool "Support DB-88F6820-GP"
Chris Packhamf5fc25b2016-09-22 12:56:13 +1200[diff] [blame]124 select 88F6820
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]125
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]126config TARGET_DB_88F6820_AMC
127 bool "Support DB-88F6820-AMC"
128 select 88F6820
129
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]130config TARGET_TURRIS_OMNIA
131 bool "Support Turris Omnia"
132 select 88F6820
Marek Behún0f2e66a2019-05-02 16:53:37 +0200[diff] [blame]133 select BOARD_LATE_INIT
Marek Behún1e4cbb92019-05-02 16:53:28 +0200[diff] [blame]134 select DM_I2C
135 select I2C_MUX
136 select I2C_MUX_PCA954x
Marek Behún4c3abea2021-10-09 19:33:46 +0200[diff] [blame]137 select SPL_DRIVERS_MISC
Marek Behún1e4cbb92019-05-02 16:53:28 +0200[diff] [blame]138 select SPL_I2C_MUX
Marek Behúnca6095b2021-10-09 19:33:45 +0200[diff] [blame]139 select SPL_SYS_MALLOC_SIMPLE
Marek Behún1e4cbb92019-05-02 16:53:28 +0200[diff] [blame]140 select SYS_I2C_MVTWSI
Marek Behún5e92efe2019-05-02 16:53:32 +0200[diff] [blame]141 select ATSHA204A
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]142
Marek Behúnf835bed2018-04-24 17:21:31 +0200[diff] [blame]143config TARGET_TURRIS_MOX
144 bool "Support Turris Mox"
145 select ARMADA_3700
146
Stefan Roese5c806f12016-10-25 10:56:19 +0200[diff] [blame]147config TARGET_MVEBU_ARMADA_8K
148 bool "Support Armada 7k/8k platforms"
Stefan Roese7be1b9b2016-05-25 08:21:21 +0200[diff] [blame]149 select ARMADA_8K
Tom Rini22d567e2017-01-22 19:43:11 -0500[diff] [blame]150 select BOARD_LATE_INIT
Simon Glass0e5faf02017-06-14 21:28:21 -0600[diff] [blame]151 imply SCSI
Stefan Roese7be1b9b2016-05-25 08:21:21 +0200[diff] [blame]152
Chris Packham67b7d502022-11-05 17:24:00 +1300[diff] [blame]153config TARGET_MVEBU_ALLEYCAT5
154 bool "Support AlleyCat 5 platforms"
155 select ALLEYCAT_5
156
Konstantin Porotchkin1d6ff1f2021-03-16 17:20:57 +0100[diff] [blame]157config TARGET_OCTEONTX2_CN913x
158 bool "Support CN913x platforms"
159 select ARMADA_8K
160 imply BOARD_EARLY_INIT_R
161 select BOARD_LATE_INIT
162 imply SCSI
163
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]164config TARGET_DB_MV784MP_GP
165 bool "Support db-mv784mp-gp"
Tom Rini9a04d7d2022-02-25 11:19:46 -0500[diff] [blame]166 select BOARD_ECC_SUPPORT
Phil Suttera7f94ad2015-12-25 14:41:22 +0100[diff] [blame]167 select MV78460
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]168
Phil Sutterd76eba62015-12-25 14:41:25 +0100[diff] [blame]169config TARGET_DS414
170 bool "Support Synology DS414"
171 select MV78230
172
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]173config TARGET_MAXBCM
174 bool "Support maxbcm"
Tom Rini9a04d7d2022-02-25 11:19:46 -0500[diff] [blame]175 select BOARD_ECC_SUPPORT
Phil Suttera7f94ad2015-12-25 14:41:22 +0100[diff] [blame]176 select MV78460
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]177
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]178config TARGET_THEADORABLE
179 bool "Support theadorable Armada XP"
Tom Rini22d567e2017-01-22 19:43:11 -0500[diff] [blame]180 select BOARD_LATE_INIT if USB
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]181 select MV78260
Simon Glass203b3ab2017-06-14 21:28:24 -0600[diff] [blame]182 imply CMD_SATA
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]183
Dirk Eibachfb605942017-02-22 16:07:23 +0100[diff] [blame]184config TARGET_CONTROLCENTERDC
185 bool "Support CONTROLCENTERDC"
186 select 88F6820
Tom Rini40a325f2022-03-30 18:07:24 -0400[diff] [blame]187 select CUSTOMER_BOARD_SUPPORT
Dirk Eibachfb605942017-02-22 16:07:23 +0100[diff] [blame]188
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]189config TARGET_X530
190 bool "Support Allied Telesis x530"
191 select 88F6820
192
Chris Packham199e3182019-04-11 22:22:53 +1200[diff] [blame]193config TARGET_DB_XC3_24G4XG
194 bool "Support DB-XC3-24G4XG"
195 select 98DX3336
196
Luka Kovacic25acb8b2020-05-26 20:17:50 +0200[diff] [blame]197config TARGET_CRS3XX_98DX3236
198 bool "Support CRS3XX-98DX3236"
Luka Kovacicb686e222019-05-07 19:35:55 +0200[diff] [blame]199 select 98DX3236
200
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]201endchoice
202
Tom Rini59180392021-08-21 13:50:13 -0400[diff] [blame]203choice
204 prompt "DDR bus width"
205 default DDR_64BIT
206 depends on ARMADA_XP
207
208config DDR_64BIT
209 bool "64bit bus width"
210
211config DDR_32BIT
212 bool "32bit bus width"
213
214endchoice
215
Tom Rini592bcd02021-08-21 13:50:15 -0400[diff] [blame]216config DDR_LOG_LEVEL
217 int "DDR training code log level"
218 depends on ARMADA_XP
219 default 0
220 range 0 3
221 help
222 Amount of information provided on error while running the DDR
223 training code. At level 0, provides an error code in a case of
224 failure, RL, WL errors and other algorithm failure. At level 1,
225 provides the D-Unit setup (SPD/Static configuration). At level 2,
226 provides the windows margin as a results of DQS centeralization.
227 At level 3, rovides the windows margin of each DQ as a results of
228 DQS centeralization.
229
Marek Behún90555af2022-02-17 13:54:42 +0100[diff] [blame]230config DDR_RESET_ON_TRAINING_FAILURE
231 bool "Reset the board on DDR training failure instead of hanging"
232 depends on ARMADA_38X || ARMADA_XP
233 help
234 If DDR training fails in SPL, reset the board instead of hanging.
235 Some boards are known to fail DDR training occasionally and an
236 immediate reset may be preferable to waiting until the board is
237 reset by watchdog (if there even is one).
238
239 Note that if booting via UART and the DDR training fails, the
240 device will still hang - it doesn't make sense to reset the board
241 in such a case.
242
Tom Rini9a04d7d2022-02-25 11:19:46 -0500[diff] [blame]243config BOARD_ECC_SUPPORT
244 bool
245
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]246config SYS_BOARD
247 default "clearfog" if TARGET_CLEARFOG
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]248 default "helios4" if TARGET_HELIOS4
Konstantin Porotchkin7f8dfea2017-02-16 13:52:22 +0200[diff] [blame]249 default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]250 default "db-88f6720" if TARGET_DB_88F6720
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]251 default "db-88f6820-gp" if TARGET_DB_88F6820_GP
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]252 default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]253 default "turris_omnia" if TARGET_TURRIS_OMNIA
Marek Behúnf835bed2018-04-24 17:21:31 +0200[diff] [blame]254 default "turris_mox" if TARGET_TURRIS_MOX
Stefan Roese5c806f12016-10-25 10:56:19 +0200[diff] [blame]255 default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin1d6ff1f2021-03-16 17:20:57 +0100[diff] [blame]256 default "octeontx2_cn913x" if TARGET_OCTEONTX2_CN913x
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]257 default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP
Phil Sutterd76eba62015-12-25 14:41:25 +0100[diff] [blame]258 default "ds414" if TARGET_DS414
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]259 default "maxbcm" if TARGET_MAXBCM
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]260 default "theadorable" if TARGET_THEADORABLE
Baruch Siachdaa6f082018-06-18 21:56:23 +0300[diff] [blame]261 default "a38x" if TARGET_CONTROLCENTERDC
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]262 default "x530" if TARGET_X530
Chris Packham199e3182019-04-11 22:22:53 +1200[diff] [blame]263 default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG
Luka Kovacic25acb8b2020-05-26 20:17:50 +0200[diff] [blame]264 default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236
Chris Packham67b7d502022-11-05 17:24:00 +1300[diff] [blame]265 default "mvebu_alleycat-5" if TARGET_MVEBU_ALLEYCAT5
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]266
267config SYS_CONFIG_NAME
268 default "clearfog" if TARGET_CLEARFOG
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]269 default "helios4" if TARGET_HELIOS4
Konstantin Porotchkin7f8dfea2017-02-16 13:52:22 +0200[diff] [blame]270 default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]271 default "db-88f6720" if TARGET_DB_88F6720
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]272 default "db-88f6820-gp" if TARGET_DB_88F6820_GP
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]273 default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
Stefan Roese5c806f12016-10-25 10:56:19 +0200[diff] [blame]274 default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin1d6ff1f2021-03-16 17:20:57 +0100[diff] [blame]275 default "mvebu_armada-8k" if TARGET_OCTEONTX2_CN913x
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]276 default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP
Phil Sutterd76eba62015-12-25 14:41:25 +0100[diff] [blame]277 default "ds414" if TARGET_DS414
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]278 default "maxbcm" if TARGET_MAXBCM
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]279 default "theadorable" if TARGET_THEADORABLE
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]280 default "turris_omnia" if TARGET_TURRIS_OMNIA
Marek Behúnf835bed2018-04-24 17:21:31 +0200[diff] [blame]281 default "turris_mox" if TARGET_TURRIS_MOX
Baruch Siachdaa6f082018-06-18 21:56:23 +0300[diff] [blame]282 default "controlcenterdc" if TARGET_CONTROLCENTERDC
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]283 default "x530" if TARGET_X530
Chris Packham199e3182019-04-11 22:22:53 +1200[diff] [blame]284 default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG
Luka Kovacic25acb8b2020-05-26 20:17:50 +0200[diff] [blame]285 default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236
Chris Packham67b7d502022-11-05 17:24:00 +1300[diff] [blame]286 default "mvebu_alleycat-5" if TARGET_MVEBU_ALLEYCAT5
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]287
288config SYS_VENDOR
289 default "Marvell" if TARGET_DB_MV784MP_GP
Konstantin Porotchkin7f8dfea2017-02-16 13:52:22 +0200[diff] [blame]290 default "Marvell" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]291 default "Marvell" if TARGET_DB_88F6720
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]292 default "Marvell" if TARGET_DB_88F6820_GP
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]293 default "Marvell" if TARGET_DB_88F6820_AMC
Stefan Roese5c806f12016-10-25 10:56:19 +0200[diff] [blame]294 default "Marvell" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin1d6ff1f2021-03-16 17:20:57 +0100[diff] [blame]295 default "Marvell" if TARGET_OCTEONTX2_CN913x
Chris Packham199e3182019-04-11 22:22:53 +1200[diff] [blame]296 default "Marvell" if TARGET_DB_XC3_24G4XG
297 default "Marvell" if TARGET_MVEBU_DB_88F7040
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]298 default "solidrun" if TARGET_CLEARFOG
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]299 default "kobol" if TARGET_HELIOS4
Phil Sutterd76eba62015-12-25 14:41:25 +0100[diff] [blame]300 default "Synology" if TARGET_DS414
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]301 default "CZ.NIC" if TARGET_TURRIS_OMNIA
Marek Behúnf835bed2018-04-24 17:21:31 +0200[diff] [blame]302 default "CZ.NIC" if TARGET_TURRIS_MOX
Baruch Siachdaa6f082018-06-18 21:56:23 +0300[diff] [blame]303 default "gdsys" if TARGET_CONTROLCENTERDC
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]304 default "alliedtelesis" if TARGET_X530
Luka Kovacic25acb8b2020-05-26 20:17:50 +0200[diff] [blame]305 default "mikrotik" if TARGET_CRS3XX_98DX3236
Chris Packham67b7d502022-11-05 17:24:00 +1300[diff] [blame]306 default "Marvell" if TARGET_MVEBU_ALLEYCAT5
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]307
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]308config SYS_SOC
309 default "mvebu"
310
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]311choice
Baruch Siach8d196a42018-06-18 21:56:24 +0300[diff] [blame]312 prompt "Boot method"
Joel Johnsona2018ab2020-04-17 01:19:05 -0600[diff] [blame]313 depends on SPL
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]314
Baruch Siach8d196a42018-06-18 21:56:24 +0300[diff] [blame]315config MVEBU_SPL_BOOT_DEVICE_SPI
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]316 bool "SPI NOR flash"
Joel Johnsona2018ab2020-04-17 01:19:05 -0600[diff] [blame]317 imply ENV_IS_IN_SPI_FLASH
Pali Rohárcf97b822021-07-23 11:14:29 +0200[diff] [blame]318 imply SPL_DM_SPI
319 imply SPL_SPI_FLASH_SUPPORT
320 imply SPL_SPI_LOAD
Simon Glassa5820472021-08-08 12:20:14 -0600[diff] [blame]321 imply SPL_SPI
Pali Rohára3a38e52021-07-23 11:14:25 +0200[diff] [blame]322 select SPL_BOOTROM_SUPPORT
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]323
Baruch Siach8d196a42018-06-18 21:56:24 +0300[diff] [blame]324config MVEBU_SPL_BOOT_DEVICE_MMC
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]325 bool "SDIO/MMC card"
Joel Johnsona2018ab2020-04-17 01:19:05 -0600[diff] [blame]326 imply ENV_IS_IN_MMC
327 # GPIO needed for eMMC/SD card presence detection
Pali Rohárcf97b822021-07-23 11:14:29 +0200[diff] [blame]328 imply SPL_DM_GPIO
329 imply SPL_DM_MMC
330 imply SPL_GPIO
331 imply SPL_LIBDISK_SUPPORT
Simon Glassb58bfe02021-08-08 12:20:09 -0600[diff] [blame]332 imply SPL_MMC
Pali Rohára3a38e52021-07-23 11:14:25 +0200[diff] [blame]333 select SPL_BOOTROM_SUPPORT
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]334
Baruch Siachb936a272019-05-16 13:03:58 +0300[diff] [blame]335config MVEBU_SPL_BOOT_DEVICE_SATA
336 bool "SATA"
Simon Glass081a45a2021-08-08 12:20:17 -0600[diff] [blame]337 imply SPL_SATA
Pali Rohárcf97b822021-07-23 11:14:29 +0200[diff] [blame]338 imply SPL_LIBDISK_SUPPORT
Pali Rohára3a38e52021-07-23 11:14:25 +0200[diff] [blame]339 select SPL_BOOTROM_SUPPORT
Baruch Siachb936a272019-05-16 13:03:58 +0300[diff] [blame]340
Baruch Siachb35c4472018-06-18 21:56:26 +0300[diff] [blame]341config MVEBU_SPL_BOOT_DEVICE_UART
342 bool "UART"
Pali Rohára3a38e52021-07-23 11:14:25 +0200[diff] [blame]343 select SPL_BOOTROM_SUPPORT
Baruch Siachb35c4472018-06-18 21:56:26 +0300[diff] [blame]344
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]345endchoice
346
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]347config MVEBU_EFUSE
348 bool "Enable eFuse support"
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]349 depends on HAVE_MVEBU_EFUSE
350 help
351 Enable support for reading and writing eFuses on mvebu SoCs.
352
353config MVEBU_EFUSE_FAKE
354 bool "Fake eFuse access (dry run)"
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]355 depends on MVEBU_EFUSE
356 help
357 This enables a "dry run" mode where eFuses are not really programmed.
358 Instead the eFuse accesses are emulated by writing to and reading
359 from a memory block.
360 This is can be used for testing prog scripts.
361
Pali Rohár2662d2c2022-09-22 13:43:45 +0200[diff] [blame]362config MVEBU_EFUSE_VHV_GPIO
363 string "VHV_Enable GPIO name for eFuse programming"
364 depends on MVEBU_EFUSE && !ARMADA_3700
365 help
366 The eFuse programing (burning) phase requires supplying 1.8V to the
367 device on the VHV power pin, while for normal operation the VHV power
368 rail must be left unconnected. See Marvell AN-389: ARMADA VHV Power
369 document (Doc. No. MV-S302545-00 Rev. C, August 2, 2016) for details.
370 .
371 This specify VHV_Enable GPIO name used in U-Boot for enabling VHV power.
372
373config MVEBU_EFUSE_VHV_GPIO_ACTIVE_LOW
374 bool "VHV_Enable GPIO is Active Low"
375 depends on MVEBU_EFUSE_VHV_GPIO != ""
376
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]377config SECURED_MODE_IMAGE
378 bool "Build image for trusted boot"
379 default false
380 depends on 88F6820
381 help
382 Build an image that employs the ARMADA SoC's trusted boot framework
383 for securely booting images.
384
385config SECURED_MODE_CSK_INDEX
386 int "Index of active CSK"
387 default 0
388 depends on SECURED_MODE_IMAGE
389
Joel Johnson28bf4ca2020-03-23 14:21:32 -0600[diff] [blame]390source "board/solidrun/clearfog/Kconfig"
Dennis Gilmore838e49b2020-12-08 21:07:36 -0600[diff] [blame]391source "board/kobol/helios4/Kconfig"
Joel Johnson28bf4ca2020-03-23 14:21:32 -0600[diff] [blame]392
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]393endif