blob: cff810e02ad84fe4496082958e005e23408e4fb0 [file] [log] [blame]
Michal Simek4b066a12018-08-22 14:55:27 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2014 - 2018 Xilinx, Inc.
Michal Simeka8c94362023-07-10 14:35:49 +02004 * Michal Simek <michal.simek@amd.com>
Michal Simek4b066a12018-08-22 14:55:27 +02005 */
6
Algapally Santosh Sagar3c351b22023-01-19 22:36:16 -07007#include <command.h>
Simon Glassafb02152019-12-28 10:45:01 -07008#include <cpu_func.h>
Simon Glassed38aef2020-05-10 11:40:03 -06009#include <env.h>
Michal Simek4b066a12018-08-22 14:55:27 +020010#include <fdtdec.h>
Simon Glassa7b51302019-11-14 12:57:46 -070011#include <init.h>
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -070012#include <env_internal.h>
Simon Glass0f2af882020-05-10 11:40:05 -060013#include <log.h>
Michal Simek4b066a12018-08-22 14:55:27 +020014#include <malloc.h>
Michal Simek444a70e2024-10-25 13:56:08 +020015#include <memalign.h>
16#include <mmc.h>
Michal Simek754b53c2024-12-05 11:38:15 +010017#include <mtd.h>
Simon Glass495a5dc2019-11-14 12:57:30 -070018#include <time.h>
Simon Glass274e0b02020-05-10 11:39:56 -060019#include <asm/cache.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060020#include <asm/global_data.h>
Michal Simek4b066a12018-08-22 14:55:27 +020021#include <asm/io.h>
22#include <asm/arch/hardware.h>
Michal Simek21eb5cc2019-04-29 09:39:09 -070023#include <asm/arch/sys_proto.h>
Michal Simek444a70e2024-10-25 13:56:08 +020024#include <linux/sizes.h>
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +053025#include <dm/device.h>
26#include <dm/uclass.h>
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053027#include <versalpl.h>
Michal Simek705d44a2020-03-31 12:39:37 +020028#include "../common/board.h"
Michal Simek4b066a12018-08-22 14:55:27 +020029
30DECLARE_GLOBAL_DATA_PTR;
31
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053032#if defined(CONFIG_FPGA_VERSALPL)
Oleksandr Suvorovdae95a42022-07-22 17:16:04 +030033static xilinx_desc versalpl = {
34 xilinx_versal, csu_dma, 1, &versal_op, 0, &versal_op, NULL,
35 FPGA_LEGACY
36};
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053037#endif
38
Michal Simekfec54762025-01-06 10:20:40 +010039static u8 versal_get_bootmode(void)
40{
41 u8 bootmode;
42 u32 reg = 0;
43
44 reg = readl(&crp_base->boot_mode_usr);
45
46 if (reg >> BOOT_MODE_ALT_SHIFT)
47 reg >>= BOOT_MODE_ALT_SHIFT;
48
49 bootmode = reg & BOOT_MODES_MASK;
50
51 return bootmode;
52}
53
Michal Simek76fdafa2024-12-05 11:38:16 +010054static u32 versal_multi_boot(void)
55{
Michal Simekfec54762025-01-06 10:20:40 +010056 u8 bootmode = versal_get_bootmode();
57
58 /* Mostly workaround for QEMU CI pipeline */
59 if (bootmode == JTAG_MODE)
60 return 0;
61
Michal Simek76fdafa2024-12-05 11:38:16 +010062 return readl(0xF1110004);
63}
64
Michal Simek4b066a12018-08-22 14:55:27 +020065int board_init(void)
66{
67 printf("EL Level:\tEL%d\n", current_el());
Michal Simek76fdafa2024-12-05 11:38:16 +010068 printf("Multiboot:\t%d\n", versal_multi_boot());
Michal Simek4b066a12018-08-22 14:55:27 +020069
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053070#if defined(CONFIG_FPGA_VERSALPL)
71 fpga_init();
72 fpga_add(fpga_xilinx, &versalpl);
73#endif
74
Michal Simek394ee242020-08-03 13:01:45 +020075 if (CONFIG_IS_ENABLED(DM_I2C) && CONFIG_IS_ENABLED(I2C_EEPROM))
76 xilinx_read_eeprom();
77
Michal Simek4b066a12018-08-22 14:55:27 +020078 return 0;
79}
80
81int board_early_init_r(void)
82{
Michal Simek19f6c972019-01-28 11:08:00 +010083 u32 val;
Michal Simek4b066a12018-08-22 14:55:27 +020084
Michal Simek19f6c972019-01-28 11:08:00 +010085 if (current_el() != 3)
86 return 0;
Michal Simek4b066a12018-08-22 14:55:27 +020087
Michal Simekf56f7d12019-01-28 11:12:41 +010088 debug("iou_switch ctrl div0 %x\n",
89 readl(&crlapb_base->iou_switch_ctrl));
90
Michal Simek19f6c972019-01-28 11:08:00 +010091 writel(IOU_SWITCH_CTRL_CLKACT_BIT |
Michal Simekf56f7d12019-01-28 11:12:41 +010092 (CONFIG_IOU_SWITCH_DIVISOR0 << IOU_SWITCH_CTRL_DIVISOR0_SHIFT),
Michal Simek19f6c972019-01-28 11:08:00 +010093 &crlapb_base->iou_switch_ctrl);
Michal Simek4b066a12018-08-22 14:55:27 +020094
Michal Simek19f6c972019-01-28 11:08:00 +010095 /* Global timer init - Program time stamp reference clk */
96 val = readl(&crlapb_base->timestamp_ref_ctrl);
97 val |= CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT;
98 writel(val, &crlapb_base->timestamp_ref_ctrl);
Michal Simek4b066a12018-08-22 14:55:27 +020099
Michal Simek19f6c972019-01-28 11:08:00 +0100100 debug("ref ctrl 0x%x\n",
101 readl(&crlapb_base->timestamp_ref_ctrl));
Michal Simek4b066a12018-08-22 14:55:27 +0200102
Michal Simek19f6c972019-01-28 11:08:00 +0100103 /* Clear reset of timestamp reg */
104 writel(0, &crlapb_base->rst_timestamp);
Michal Simek4b066a12018-08-22 14:55:27 +0200105
Michal Simek19f6c972019-01-28 11:08:00 +0100106 /*
107 * Program freq register in System counter and
108 * enable system counter.
109 */
Peng Fan4b3a1822022-04-13 17:47:17 +0800110 writel(CONFIG_COUNTER_FREQUENCY,
Michal Simek19f6c972019-01-28 11:08:00 +0100111 &iou_scntr_secure->base_frequency_id_register);
Michal Simek4b066a12018-08-22 14:55:27 +0200112
Michal Simek19f6c972019-01-28 11:08:00 +0100113 debug("counter val 0x%x\n",
114 readl(&iou_scntr_secure->base_frequency_id_register));
115
116 writel(IOU_SCNTRS_CONTROL_EN,
117 &iou_scntr_secure->counter_control_register);
Michal Simek4b066a12018-08-22 14:55:27 +0200118
Michal Simek19f6c972019-01-28 11:08:00 +0100119 debug("scntrs control 0x%x\n",
120 readl(&iou_scntr_secure->counter_control_register));
121 debug("timer 0x%llx\n", get_ticks());
122 debug("timer 0x%llx\n", get_ticks());
Michal Simek4b066a12018-08-22 14:55:27 +0200123
124 return 0;
125}
126
Ashok Reddy Soma6c191052022-05-05 23:53:45 -0600127unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc,
128 char *const argv[])
129{
130 int ret = 0;
131
132 if (current_el() > 1) {
133 smp_kick_all_cpus();
134 dcache_disable();
135 armv8_switch_to_el1(0x0, 0, 0, 0, (unsigned long)entry,
136 ES_TO_AARCH64);
137 } else {
138 printf("FAIL: current EL is not above EL1\n");
139 ret = EINVAL;
140 }
141 return ret;
142}
143
Michal Simekb1634762023-09-05 13:30:07 +0200144static int boot_targets_setup(void)
Michal Simek9c91e612020-04-08 11:04:41 +0200145{
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530146 u8 bootmode;
147 struct udevice *dev;
148 int bootseq = -1;
149 int bootseq_len = 0;
150 int env_targets_len = 0;
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530151 const char *mode = NULL;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530152 char *new_targets;
153 char *env_targets;
154
Michal Simek9c91e612020-04-08 11:04:41 +0200155 bootmode = versal_get_bootmode();
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530156
157 puts("Bootmode: ");
158 switch (bootmode) {
T Karthik Reddyfacca9a2019-07-11 16:07:57 +0530159 case USB_MODE:
160 puts("USB_MODE\n");
T Karthik Reddy1104faf2021-03-30 23:24:57 -0600161 mode = "usb_dfu0 usb_dfu1";
T Karthik Reddyfacca9a2019-07-11 16:07:57 +0530162 break;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530163 case JTAG_MODE:
164 puts("JTAG_MODE\n");
Siva Durga Prasad Paladugu00784e02019-06-25 17:13:14 +0530165 mode = "jtag pxe dhcp";
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530166 break;
167 case QSPI_MODE_24BIT:
168 puts("QSPI_MODE_24\n");
Venkatesh Yadav Abbarapubf6e0412024-05-10 08:22:38 +0200169 if (uclass_get_device_by_name(UCLASS_SPI,
170 "spi@f1030000", &dev)) {
171 debug("QSPI driver for QSPI device is not present\n");
172 break;
173 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530174 mode = "xspi0";
175 break;
176 case QSPI_MODE_32BIT:
177 puts("QSPI_MODE_32\n");
Venkatesh Yadav Abbarapubf6e0412024-05-10 08:22:38 +0200178 if (uclass_get_device_by_name(UCLASS_SPI,
179 "spi@f1030000", &dev)) {
180 debug("QSPI driver for QSPI device is not present\n");
181 break;
182 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530183 mode = "xspi0";
184 break;
185 case OSPI_MODE:
186 puts("OSPI_MODE\n");
Venkatesh Yadav Abbarapubf6e0412024-05-10 08:22:38 +0200187 if (uclass_get_device_by_name(UCLASS_SPI,
188 "spi@f1010000", &dev)) {
189 debug("OSPI driver for OSPI device is not present\n");
190 break;
191 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530192 mode = "xspi0";
193 break;
194 case EMMC_MODE:
195 puts("EMMC_MODE\n");
T Karthik Reddybc2b9642019-12-16 04:44:26 -0700196 if (uclass_get_device_by_name(UCLASS_MMC,
T Karthik Reddya12445f2021-11-18 12:57:20 +0100197 "mmc@f1050000", &dev) &&
198 uclass_get_device_by_name(UCLASS_MMC,
T Karthik Reddybc2b9642019-12-16 04:44:26 -0700199 "sdhci@f1050000", &dev)) {
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530200 debug("SD1 driver for SD1 device is not present\n");
201 break;
T Karthik Reddybc2b9642019-12-16 04:44:26 -0700202 }
Simon Glass75e534b2020-12-16 21:20:07 -0700203 debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev));
T Karthik Reddybc2b9642019-12-16 04:44:26 -0700204 mode = "mmc";
Simon Glass75e534b2020-12-16 21:20:07 -0700205 bootseq = dev_seq(dev);
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530206 break;
Polak, Leszekcddfc132023-10-08 14:34:42 +0000207 case SELECTMAP_MODE:
208 puts("SELECTMAP_MODE\n");
209 break;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530210 case SD_MODE:
211 puts("SD_MODE\n");
212 if (uclass_get_device_by_name(UCLASS_MMC,
T Karthik Reddya12445f2021-11-18 12:57:20 +0100213 "mmc@f1040000", &dev) &&
214 uclass_get_device_by_name(UCLASS_MMC,
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530215 "sdhci@f1040000", &dev)) {
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530216 debug("SD0 driver for SD0 device is not present\n");
217 break;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530218 }
Simon Glass75e534b2020-12-16 21:20:07 -0700219 debug("mmc0 device found at %p, seq %d\n", dev, dev_seq(dev));
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530220
221 mode = "mmc";
Simon Glass75e534b2020-12-16 21:20:07 -0700222 bootseq = dev_seq(dev);
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530223 break;
224 case SD1_LSHFT_MODE:
225 puts("LVL_SHFT_");
226 /* fall through */
227 case SD_MODE1:
228 puts("SD_MODE1\n");
229 if (uclass_get_device_by_name(UCLASS_MMC,
T Karthik Reddya12445f2021-11-18 12:57:20 +0100230 "mmc@f1050000", &dev) &&
231 uclass_get_device_by_name(UCLASS_MMC,
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530232 "sdhci@f1050000", &dev)) {
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530233 debug("SD1 driver for SD1 device is not present\n");
234 break;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530235 }
Simon Glass75e534b2020-12-16 21:20:07 -0700236 debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev));
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530237
238 mode = "mmc";
Simon Glass75e534b2020-12-16 21:20:07 -0700239 bootseq = dev_seq(dev);
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530240 break;
241 default:
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530242 printf("Invalid Boot Mode:0x%x\n", bootmode);
243 break;
244 }
245
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530246 if (mode) {
247 if (bootseq >= 0) {
248 bootseq_len = snprintf(NULL, 0, "%i", bootseq);
249 debug("Bootseq len: %x\n", bootseq_len);
250 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530251
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530252 /*
253 * One terminating char + one byte for space between mode
254 * and default boot_targets
255 */
256 env_targets = env_get("boot_targets");
257 if (env_targets)
258 env_targets_len = strlen(env_targets);
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530259
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530260 new_targets = calloc(1, strlen(mode) + env_targets_len + 2 +
261 bootseq_len);
262 if (!new_targets)
263 return -ENOMEM;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530264
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530265 if (bootseq >= 0)
266 sprintf(new_targets, "%s%x %s", mode, bootseq,
267 env_targets ? env_targets : "");
268 else
269 sprintf(new_targets, "%s %s", mode,
270 env_targets ? env_targets : "");
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530271
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530272 env_set("boot_targets", new_targets);
273 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530274
Michal Simekb1634762023-09-05 13:30:07 +0200275 return 0;
276}
277
278int board_late_init(void)
279{
280 int ret;
281
282 if (!(gd->flags & GD_FLG_ENV_DEFAULT)) {
283 debug("Saved variables - Skipping\n");
284 return 0;
285 }
286
287 if (!IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG))
288 return 0;
289
290 if (IS_ENABLED(CONFIG_DISTRO_DEFAULTS)) {
291 ret = boot_targets_setup();
292 if (ret)
293 return ret;
294 }
295
Michal Simek705d44a2020-03-31 12:39:37 +0200296 return board_late_init_xilinx();
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530297}
298
Michal Simek4b066a12018-08-22 14:55:27 +0200299int dram_init_banksize(void)
300{
Michal Simek21eb5cc2019-04-29 09:39:09 -0700301 int ret;
302
303 ret = fdtdec_setup_memory_banksize();
304 if (ret)
305 return ret;
306
307 mem_map_fill();
Michal Simek4b066a12018-08-22 14:55:27 +0200308
309 return 0;
310}
311
312int dram_init(void)
313{
Michal Simek9134d4c2020-07-10 12:42:09 +0200314 if (fdtdec_setup_mem_size_base_lowest() != 0)
Michal Simek4b066a12018-08-22 14:55:27 +0200315 return -EINVAL;
316
317 return 0;
318}
319
Michal Simekc1e98aa2024-10-25 13:56:07 +0200320#if !CONFIG_IS_ENABLED(SYSRESET)
Harald Seiler6f14d5f2020-12-15 16:47:52 +0100321void reset_cpu(void)
Michal Simek4b066a12018-08-22 14:55:27 +0200322{
323}
Michal Simekc1e98aa2024-10-25 13:56:07 +0200324#endif
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700325
Michal Simekf3a541f2024-03-22 12:43:17 +0100326#if defined(CONFIG_ENV_IS_NOWHERE)
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700327enum env_location env_get_location(enum env_operation op, int prio)
328{
329 u32 bootmode = versal_get_bootmode();
330
331 if (prio)
332 return ENVL_UNKNOWN;
333
334 switch (bootmode) {
335 case EMMC_MODE:
336 case SD_MODE:
337 case SD1_LSHFT_MODE:
338 case SD_MODE1:
339 if (IS_ENABLED(CONFIG_ENV_IS_IN_FAT))
340 return ENVL_FAT;
341 if (IS_ENABLED(CONFIG_ENV_IS_IN_EXT4))
342 return ENVL_EXT4;
T Karthik Reddy6f8b2052021-11-24 12:16:55 +0100343 return ENVL_NOWHERE;
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700344 case OSPI_MODE:
345 case QSPI_MODE_24BIT:
346 case QSPI_MODE_32BIT:
347 if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH))
348 return ENVL_SPI_FLASH;
T Karthik Reddy6f8b2052021-11-24 12:16:55 +0100349 return ENVL_NOWHERE;
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700350 case JTAG_MODE:
Polak, Leszekcddfc132023-10-08 14:34:42 +0000351 case SELECTMAP_MODE:
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700352 default:
353 return ENVL_NOWHERE;
354 }
355}
Michal Simekf3a541f2024-03-22 12:43:17 +0100356#endif
Michal Simek444a70e2024-10-25 13:56:08 +0200357
358#if defined(CONFIG_SET_DFU_ALT_INFO)
359
360#define DFU_ALT_BUF_LEN SZ_1K
361
Michal Simek754b53c2024-12-05 11:38:15 +0100362static void mtd_found_part(u32 *base, u32 *size)
363{
364 struct mtd_info *part, *mtd;
365
366 mtd_probe_devices();
367
368 mtd = get_mtd_device_nm("nor0");
369 if (!IS_ERR_OR_NULL(mtd)) {
370 list_for_each_entry(part, &mtd->partitions, node) {
371 debug("0x%012llx-0x%012llx : \"%s\"\n",
372 part->offset, part->offset + part->size,
373 part->name);
374
375 if (*base >= part->offset &&
376 *base < part->offset + part->size) {
377 debug("Found my partition: %d/%s\n",
378 part->index, part->name);
379 *base = part->offset;
380 *size = part->size;
381 break;
382 }
383 }
384 }
385}
386
Michal Simek444a70e2024-10-25 13:56:08 +0200387void set_dfu_alt_info(char *interface, char *devstr)
388{
389 int bootseq = 0, len = 0;
Michal Simek76fdafa2024-12-05 11:38:16 +0100390 u32 multiboot = versal_multi_boot();
Michal Simek444a70e2024-10-25 13:56:08 +0200391 u32 bootmode = versal_get_bootmode();
392
393 ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN);
394
395 if (env_get("dfu_alt_info"))
396 return;
397
398 memset(buf, 0, sizeof(buf));
399
Michal Simek76fdafa2024-12-05 11:38:16 +0100400 multiboot = env_get_hex("multiboot", multiboot);
401
Michal Simek444a70e2024-10-25 13:56:08 +0200402 switch (bootmode) {
403 case EMMC_MODE:
404 case SD_MODE:
405 case SD1_LSHFT_MODE:
406 case SD_MODE1:
407 bootseq = mmc_get_env_dev();
408
409 len += snprintf(buf + len, DFU_ALT_BUF_LEN, "mmc %d=boot",
410 bootseq);
411
Michal Simek76fdafa2024-12-05 11:38:16 +0100412 if (multiboot)
413 len += snprintf(buf + len, DFU_ALT_BUF_LEN,
414 "%04d", multiboot);
415
Michal Simek444a70e2024-10-25 13:56:08 +0200416 len += snprintf(buf + len, DFU_ALT_BUF_LEN, ".bin fat %d 1",
417 bootseq);
418 break;
Michal Simek754b53c2024-12-05 11:38:15 +0100419 case QSPI_MODE_24BIT:
420 case QSPI_MODE_32BIT:
421 case OSPI_MODE:
422 {
Michal Simek76fdafa2024-12-05 11:38:16 +0100423 u32 base = multiboot * SZ_32K;
Michal Simek754b53c2024-12-05 11:38:15 +0100424 u32 size = 0x1500000;
425 u32 limit = size;
426
427 mtd_found_part(&base, &limit);
428
429 len += snprintf(buf + len, DFU_ALT_BUF_LEN,
430 "sf 0:0=boot.bin raw 0x%x 0x%x",
431 base, limit);
432 }
433 break;
Michal Simek444a70e2024-10-25 13:56:08 +0200434 default:
435 return;
436 }
437
438 env_set("dfu_alt_info", buf);
439 puts("DFU alt info setting: done\n");
440}
441#endif