wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 1 | /* |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 2 | * (C) Copyright 2000-2005 |
| 3 | * Stefan Roese, DENX Software Engineering, sr@denx.de. |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | /* |
| 25 | * board/config.h - configuration options, board specific |
| 26 | */ |
| 27 | |
| 28 | #ifndef __CONFIG_H |
| 29 | #define __CONFIG_H |
| 30 | |
| 31 | /* |
| 32 | * High Level Configuration Options |
| 33 | * (easy to change) |
| 34 | */ |
| 35 | |
| 36 | #define CONFIG_405GP 1 /* This is a PPC405 CPU */ |
Wolfgang Denk | d06ce5d | 2005-08-02 17:06:17 +0200 | [diff] [blame] | 37 | #define CONFIG_4xx 1 /* ...member of PPC4xx family */ |
| 38 | #define CONFIG_WALNUT 1 /* ...on a WALNUT board */ |
Wolfgang Denk | 291ba1b | 2010-10-06 09:05:45 +0200 | [diff] [blame] | 39 | /* ...or on a SYCAMORE board */ |
| 40 | |
| 41 | #define CONFIG_SYS_TEXT_BASE 0xFFFC0000 |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 42 | |
Stefan Roese | cfe5802 | 2008-06-06 15:55:21 +0200 | [diff] [blame] | 43 | /* |
| 44 | * Include common defines/options for all AMCC eval boards |
| 45 | */ |
| 46 | #define CONFIG_HOSTNAME walnut |
| 47 | #include "amcc-common.h" |
| 48 | |
wdenk | da55c6e | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 49 | #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 50 | |
Wolfgang Denk | d06ce5d | 2005-08-02 17:06:17 +0200 | [diff] [blame] | 51 | #define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 52 | |
Stefan Roese | cfe5802 | 2008-06-06 15:55:21 +0200 | [diff] [blame] | 53 | /* |
| 54 | * Default environment variables |
| 55 | */ |
| 56 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 57 | CONFIG_AMCC_DEF_ENV \ |
| 58 | CONFIG_AMCC_DEF_ENV_POWERPC \ |
| 59 | CONFIG_AMCC_DEF_ENV_PPC_OLD \ |
| 60 | CONFIG_AMCC_DEF_ENV_NOR_UPD \ |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 61 | "kernel_addr=fff80000\0" \ |
| 62 | "ramdisk_addr=fff80000\0" \ |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 63 | "" |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 64 | |
Wolfgang Denk | d06ce5d | 2005-08-02 17:06:17 +0200 | [diff] [blame] | 65 | #define CONFIG_PHY_ADDR 1 /* PHY address */ |
Stefan Roese | a98dfe6 | 2008-05-08 11:05:15 +0200 | [diff] [blame] | 66 | #define CONFIG_HAS_ETH0 1 |
Stefan Roese | b0ff214 | 2006-08-07 14:33:32 +0200 | [diff] [blame] | 67 | |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 68 | #define CONFIG_RTC_DS174x 1 /* use DS1743 RTC in Walnut */ |
| 69 | |
Jon Loeliger | 5c4ddae | 2007-07-10 10:12:10 -0500 | [diff] [blame] | 70 | /* |
Stefan Roese | cfe5802 | 2008-06-06 15:55:21 +0200 | [diff] [blame] | 71 | * Commands additional to the ones defined in amcc-common.h |
Jon Loeliger | 03bfcb9 | 2007-07-04 22:33:46 -0500 | [diff] [blame] | 72 | */ |
Jon Loeliger | 03bfcb9 | 2007-07-04 22:33:46 -0500 | [diff] [blame] | 73 | #define CONFIG_CMD_DATE |
Jon Loeliger | 03bfcb9 | 2007-07-04 22:33:46 -0500 | [diff] [blame] | 74 | #define CONFIG_CMD_PCI |
Jon Loeliger | 03bfcb9 | 2007-07-04 22:33:46 -0500 | [diff] [blame] | 75 | #define CONFIG_CMD_SDRAM |
| 76 | #define CONFIG_CMD_SNTP |
| 77 | |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 78 | #define CONFIG_SPD_EEPROM 1 /* use SPD EEPROM for setup */ |
| 79 | |
| 80 | /* |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 81 | * If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1. |
| 82 | * If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31. |
| 83 | * Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value. |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 84 | * The Linux BASE_BAUD define should match this configuration. |
| 85 | * baseBaud = cpuClock/(uartDivisor*16) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 86 | * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock, |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 87 | * set Linux BASE_BAUD to 403200. |
| 88 | */ |
Stefan Roese | 3ddce57 | 2010-09-20 16:05:31 +0200 | [diff] [blame] | 89 | #define CONFIG_CONS_INDEX 1 /* Use UART0 */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 90 | #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */ |
| 91 | #undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */ |
| 92 | #define CONFIG_SYS_BASE_BAUD 691200 |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 93 | |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 94 | /*----------------------------------------------------------------------- |
| 95 | * I2C stuff |
| 96 | *----------------------------------------------------------------------- |
| 97 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 98 | #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 99 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 100 | #define CONFIG_SYS_I2C_MULTI_EEPROMS |
| 101 | #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) |
| 102 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 |
| 103 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 |
| 104 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 |
Stefan Roese | b0ff214 | 2006-08-07 14:33:32 +0200 | [diff] [blame] | 105 | |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 106 | /*----------------------------------------------------------------------- |
| 107 | * PCI stuff |
| 108 | *----------------------------------------------------------------------- |
| 109 | */ |
Wolfgang Denk | d06ce5d | 2005-08-02 17:06:17 +0200 | [diff] [blame] | 110 | #define PCI_HOST_ADAPTER 0 /* configure ar pci adapter */ |
| 111 | #define PCI_HOST_FORCE 1 /* configure as pci host */ |
| 112 | #define PCI_HOST_AUTO 2 /* detected via arbiter enable */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 113 | |
Wolfgang Denk | d06ce5d | 2005-08-02 17:06:17 +0200 | [diff] [blame] | 114 | #define CONFIG_PCI /* include pci support */ |
| 115 | #define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */ |
| 116 | #define CONFIG_PCI_PNP /* do pci plug-and-play */ |
| 117 | /* resource configuration */ |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 118 | #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 119 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 120 | #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */ |
| 121 | #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */ |
| 122 | #define CONFIG_SYS_PCI_PTM1LA 0x00000000 /* point to sdram */ |
| 123 | #define CONFIG_SYS_PCI_PTM1MS 0x80000001 /* 2GB, enable hard-wired to 1 */ |
| 124 | #define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */ |
| 125 | #define CONFIG_SYS_PCI_PTM2LA 0x00000000 /* disabled */ |
| 126 | #define CONFIG_SYS_PCI_PTM2MS 0x00000000 /* disabled */ |
| 127 | #define CONFIG_SYS_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 128 | |
| 129 | /*----------------------------------------------------------------------- |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 130 | * Start addresses for the final memory configuration |
| 131 | * (Set up by the startup code) |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 132 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 133 | #define CONFIG_SYS_FLASH_BASE 0xFFF80000 |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 134 | |
| 135 | /* |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 136 | * Define here the location of the environment variables (FLASH or NVRAM). |
| 137 | * Note: DENX encourages to use redundant environment in FLASH. NVRAM is only |
Wolfgang Denk | d06ce5d | 2005-08-02 17:06:17 +0200 | [diff] [blame] | 138 | * supported for backward compatibility. |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 139 | */ |
| 140 | #if 1 |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 141 | #define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */ |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 142 | #else |
Jean-Christophe PLAGNIOL-VILLARD | fdb79c3 | 2008-09-10 22:47:59 +0200 | [diff] [blame] | 143 | #define CONFIG_ENV_IS_IN_NVRAM 1 /* use NVRAM for environment vars */ |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 144 | #endif |
| 145 | |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 146 | /*----------------------------------------------------------------------- |
| 147 | * FLASH organization |
| 148 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 149 | #define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */ |
Wolfgang Denk | d06ce5d | 2005-08-02 17:06:17 +0200 | [diff] [blame] | 150 | #define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */ |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 151 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 152 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
| 153 | #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 154 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 155 | #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ |
| 156 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 157 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 158 | #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 159 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 160 | #define CONFIG_SYS_FLASH_ADDR0 0x5555 |
| 161 | #define CONFIG_SYS_FLASH_ADDR1 0x2aaa |
| 162 | #define CONFIG_SYS_FLASH_WORD_SIZE unsigned char |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 163 | |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 164 | #ifdef CONFIG_ENV_IS_IN_FLASH |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 165 | #define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 166 | #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE-CONFIG_ENV_SECT_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 167 | #define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 168 | |
| 169 | /* Address and size of Redundant Environment Sector */ |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 170 | #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE) |
| 171 | #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 172 | #endif /* CONFIG_ENV_IS_IN_FLASH */ |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 173 | |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 174 | /*----------------------------------------------------------------------- |
| 175 | * NVRAM organization |
| 176 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 177 | #define CONFIG_SYS_NVRAM_BASE_ADDR 0xf0000000 /* NVRAM base address */ |
| 178 | #define CONFIG_SYS_NVRAM_SIZE 0x1ff8 /* NVRAM size */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 179 | |
Jean-Christophe PLAGNIOL-VILLARD | fdb79c3 | 2008-09-10 22:47:59 +0200 | [diff] [blame] | 180 | #ifdef CONFIG_ENV_IS_IN_NVRAM |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 181 | #define CONFIG_ENV_SIZE 0x1000 /* Size of Environment vars */ |
| 182 | #define CONFIG_ENV_ADDR \ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 183 | (CONFIG_SYS_NVRAM_BASE_ADDR+CONFIG_SYS_NVRAM_SIZE-CONFIG_ENV_SIZE) /* Env */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 184 | #endif |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 185 | |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 186 | /*----------------------------------------------------------------------- |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 187 | * External Bus Controller (EBC) Setup |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 188 | */ |
| 189 | |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 190 | /* Memory Bank 0 (Flash Bank 0) initialization */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 191 | #define CONFIG_SYS_EBC_PB0AP 0x9B015480 |
| 192 | #define CONFIG_SYS_EBC_PB0CR 0xFFF18000 /* BAS=0xFFF,BS=1MB,BU=R/W,BW=8bit */ |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 193 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 194 | #define CONFIG_SYS_EBC_PB1AP 0x02815480 |
| 195 | #define CONFIG_SYS_EBC_PB1CR 0xF0018000 /* BAS=0xF00,BS=1MB,BU=R/W,BW=8bit */ |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 196 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 197 | #define CONFIG_SYS_EBC_PB2AP 0x04815A80 |
| 198 | #define CONFIG_SYS_EBC_PB2CR 0xF0118000 /* BAS=0xF01,BS=1MB,BU=R/W,BW=8bit */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 199 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 200 | #define CONFIG_SYS_EBC_PB3AP 0x01815280 |
| 201 | #define CONFIG_SYS_EBC_PB3CR 0xF0218000 /* BAS=0xF02,BS=1MB,BU=R/W,BW=8bit */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 202 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 203 | #define CONFIG_SYS_EBC_PB7AP 0x01815280 |
| 204 | #define CONFIG_SYS_EBC_PB7CR 0xF0318000 /* BAS=0xF03,BS=1MB,BU=R/W,BW=8bit */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 205 | |
| 206 | /*----------------------------------------------------------------------- |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 207 | * External peripheral base address |
| 208 | *----------------------------------------------------------------------- |
| 209 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 210 | #define CONFIG_SYS_KEY_REG_BASE_ADDR 0xF0100000 |
| 211 | #define CONFIG_SYS_IR_REG_BASE_ADDR 0xF0200000 |
| 212 | #define CONFIG_SYS_FPGA_REG_BASE_ADDR 0xF0300000 |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 213 | |
| 214 | /*----------------------------------------------------------------------- |
| 215 | * Definitions for initial stack pointer and data area |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 216 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 217 | #define CONFIG_SYS_INIT_DCACHE_CS 4 /* use cs # 4 for data cache memory */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 218 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 219 | #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 /* inside of SDRAM */ |
Wolfgang Denk | 1c2e98e | 2010-10-26 13:32:32 +0200 | [diff] [blame] | 220 | #define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* Size of used area in RAM */ |
Wolfgang Denk | 0191e47 | 2010-10-26 14:34:52 +0200 | [diff] [blame] | 221 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 222 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 223 | |
| 224 | /*----------------------------------------------------------------------- |
| 225 | * Definitions for Serial Presence Detect EEPROM address |
| 226 | * (to get SDRAM settings) |
| 227 | */ |
Wolfgang Denk | d06ce5d | 2005-08-02 17:06:17 +0200 | [diff] [blame] | 228 | #define SPD_EEPROM_ADDRESS 0x50 |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 229 | |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 230 | #endif /* __CONFIG_H */ |