Blame - arch/x86/cpu/ivybridge/Kconfig - filogic/uboot

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Tom Rini	10e4779	2018-05-06 17:58:06 -0400	[diff] [blame]	1	# SPDX-License-Identifier: GPL-2.0
Simon Glass	0b36ecd	2014-11-12 22:42:07 -0700	[diff] [blame]	2	#
				3	# From Coreboot src/northbridge/intel/sandybridge/Kconfig
				4	#
				5	# Copyright (C) 2010 Google Inc.
				6	#
Simon Glass	0b36ecd	2014-11-12 22:42:07 -0700	[diff] [blame]	7
Simon Glass	0b36ecd	2014-11-12 22:42:07 -0700	[diff] [blame]	8	config NORTHBRIDGE_INTEL_IVYBRIDGE
				9	bool
Simon Glass	d4e9074	2016-03-11 22:07:08 -0700	[diff] [blame]	10	select CACHE_MRC_BIN if HAVE_MRC
Tom Rini	7d3684a	2023-01-16 15:46:49 -0500	[diff] [blame]	11	select DM_EVENT
Bin Meng	d3935ff	2017-07-30 06:23:10 -0700	[diff] [blame]	12	imply HAVE_INTEL_ME
Bin Meng	1949a9a	2017-07-30 06:23:14 -0700	[diff] [blame]	13	imply ENABLE_MRC_CACHE
Bin Meng	73f5bc1	2017-07-30 19:24:02 -0700	[diff] [blame]	14	imply AHCI_PCI
Bin Meng	31dd76c	2017-07-30 06:23:18 -0700	[diff] [blame]	15	imply ICH_SPI
Bin Meng	ce9d1b0	2017-07-30 06:23:28 -0700	[diff] [blame]	16	imply INTEL_ICH6_GPIO
Bin Meng	c253c3f	2018-06-10 06:25:01 -0700	[diff] [blame]	17	imply PINCTRL_ICH6
Bin Meng	31dd76c	2017-07-30 06:23:18 -0700	[diff] [blame]	18	imply SCSI
Tuomas Tynkkynen	edf9f62	2017-12-08 15:36:19 +0200	[diff] [blame]	19	imply SCSI_AHCI
Bin Meng	31dd76c	2017-07-30 06:23:18 -0700	[diff] [blame]	20	imply SPI_FLASH
Bin Meng	5b5d173	2017-07-30 06:23:27 -0700	[diff] [blame]	21	imply USB
				22	imply USB_EHCI_HCD
Bin Meng	e1c6d2c	2018-06-03 19:04:15 -0700	[diff] [blame]	23	imply USB_XHCI_HCD
Bin Meng	31dd76c	2017-07-30 06:23:18 -0700	[diff] [blame]	24	imply VIDEO_VESA
Simon Glass	e7ceeef	2019-02-16 20:24:57 -0700	[diff] [blame]	25	imply SOUND_IVYBRIDGE
Simon Glass	0b36ecd	2014-11-12 22:42:07 -0700	[diff] [blame]	26
Simon Glass	0b36ecd	2014-11-12 22:42:07 -0700	[diff] [blame]	27	if NORTHBRIDGE_INTEL_IVYBRIDGE
				28
Simon Glass	0b36ecd	2014-11-12 22:42:07 -0700	[diff] [blame]	29	config DCACHE_RAM_BASE
Simon Glass	0b36ecd	2014-11-12 22:42:07 -0700	[diff] [blame]	30	default 0xff7e0000
				31
				32	config DCACHE_RAM_SIZE
Simon Glass	0b36ecd	2014-11-12 22:42:07 -0700	[diff] [blame]	33	default 0x20000
				34
Simon Glass	0b36ecd	2014-11-12 22:42:07 -0700	[diff] [blame]	35	config DCACHE_RAM_MRC_VAR_SIZE
Simon Glass	0b36ecd	2014-11-12 22:42:07 -0700	[diff] [blame]	36	default 0x4000
Simon Glass	0b36ecd	2014-11-12 22:42:07 -0700	[diff] [blame]	37
Simon Glass	0b36ecd	2014-11-12 22:42:07 -0700	[diff] [blame]	38	config CPU_SPECIFIC_OPTIONS
				39	def_bool y
				40	select SMM_TSEG
Simon Glass	268eefd	2014-11-12 22:42:28 -0700	[diff] [blame]	41	select X86_RAMTEST
Simon Glass	0b36ecd	2014-11-12 22:42:07 -0700	[diff] [blame]	42
				43	config SMM_TSEG_SIZE
				44	hex
				45	default 0x800000
				46
				47	config ENABLE_VMX
				48	bool "Enable VMX for virtualization"
Simon Glass	0b36ecd	2014-11-12 22:42:07 -0700	[diff] [blame]	49	help
				50	Virtual Machine Extensions are provided in many x86 CPUs. These
				51	provide various facilities for allowing a host OS to provide an
				52	environment where potentially several guest OSes have only
				53	limited access to the underlying hardware. This is achieved
				54	without resorting to software trapping and/or instruction set
				55	emulation (which would be very slow).
				56
				57	Intel's implementation of this is called VT-x. This option enables
				58	VT-x this so that the OS that is booted by U-Boot can make use of
				59	these facilities. If this option is not enabled, then the host OS
				60	will be unable to support virtualisation, or it will run very
				61	slowly.
				62
Bin Meng	5dbe304	2016-02-17 00:16:21 -0800	[diff] [blame]	63	config FSP_ADDR
				64	hex
				65	default 0xfff80000
				66
Bin Meng	5afa22a	2016-02-17 00:16:25 -0800	[diff] [blame]	67	config FSP_BROKEN_HOB
				68	bool
				69	default y
				70
Simon Glass	0b36ecd	2014-11-12 22:42:07 -0700	[diff] [blame]	71	endif