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wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2001
3 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenkc6097192002-11-03 00:24:07 +00006 */
7
8/*
9 * This provides a bit-banged interface to the ethernet MII management
10 * channel.
11 */
12
13#include <common.h>
Simon Glassdbad3462015-04-05 16:07:39 -060014#include <dm.h>
wdenkc6097192002-11-03 00:24:07 +000015#include <miiphy.h>
Andy Flemingaecf6fc2011-04-08 02:10:27 -050016#include <phy.h>
wdenkc6097192002-11-03 00:24:07 +000017
Marian Balakowiczaab8c492005-10-28 22:30:33 +020018#include <asm/types.h>
19#include <linux/list.h>
20#include <malloc.h>
21#include <net.h>
22
23/* local debug macro */
Marian Balakowiczaab8c492005-10-28 22:30:33 +020024#undef MII_DEBUG
25
26#undef debug
27#ifdef MII_DEBUG
Andy Flemingaea0c3e2011-04-07 14:38:35 -050028#define debug(fmt, args...) printf(fmt, ##args)
Marian Balakowiczaab8c492005-10-28 22:30:33 +020029#else
Andy Flemingaea0c3e2011-04-07 14:38:35 -050030#define debug(fmt, args...)
Marian Balakowiczaab8c492005-10-28 22:30:33 +020031#endif /* MII_DEBUG */
32
Marian Balakowiczaab8c492005-10-28 22:30:33 +020033static struct list_head mii_devs;
34static struct mii_dev *current_mii;
35
Mike Frysinger24a90082010-07-27 18:35:09 -040036/*
37 * Lookup the mii_dev struct by the registered device name.
38 */
Andy Flemingaecf6fc2011-04-08 02:10:27 -050039struct mii_dev *miiphy_get_dev_by_name(const char *devname)
Mike Frysinger24a90082010-07-27 18:35:09 -040040{
41 struct list_head *entry;
42 struct mii_dev *dev;
43
44 if (!devname) {
45 printf("NULL device name!\n");
46 return NULL;
47 }
48
49 list_for_each(entry, &mii_devs) {
50 dev = list_entry(entry, struct mii_dev, link);
51 if (strcmp(dev->name, devname) == 0)
52 return dev;
53 }
54
Mike Frysinger24a90082010-07-27 18:35:09 -040055 return NULL;
56}
57
Marian Balakowiczaab8c492005-10-28 22:30:33 +020058/*****************************************************************************
59 *
Marian Balakowiczcbdd1c82005-11-30 18:06:04 +010060 * Initialize global data. Need to be called before any other miiphy routine.
61 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -040062void miiphy_init(void)
Marian Balakowiczcbdd1c82005-11-30 18:06:04 +010063{
Andy Flemingaea0c3e2011-04-07 14:38:35 -050064 INIT_LIST_HEAD(&mii_devs);
Larry Johnson81b974b2007-10-31 11:21:29 -050065 current_mii = NULL;
Marian Balakowiczcbdd1c82005-11-30 18:06:04 +010066}
67
Andy Flemingaecf6fc2011-04-08 02:10:27 -050068static int legacy_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
69{
70 unsigned short val;
71 int ret;
72 struct legacy_mii_dev *ldev = bus->priv;
73
74 ret = ldev->read(bus->name, addr, reg, &val);
75
76 return ret ? -1 : (int)val;
77}
78
79static int legacy_miiphy_write(struct mii_dev *bus, int addr, int devad,
80 int reg, u16 val)
81{
82 struct legacy_mii_dev *ldev = bus->priv;
83
84 return ldev->write(bus->name, addr, reg, val);
85}
86
Marian Balakowiczcbdd1c82005-11-30 18:06:04 +010087/*****************************************************************************
88 *
Marian Balakowiczaab8c492005-10-28 22:30:33 +020089 * Register read and write MII access routines for the device <name>.
Andy Fleming896a7172011-10-31 09:46:13 -050090 * This API is now deprecated. Please use mdio_alloc and mdio_register, instead.
Marian Balakowiczaab8c492005-10-28 22:30:33 +020091 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -040092void miiphy_register(const char *name,
Andy Flemingaea0c3e2011-04-07 14:38:35 -050093 int (*read)(const char *devname, unsigned char addr,
Wolfgang Denk934fcb62011-12-07 08:35:14 +010094 unsigned char reg, unsigned short *value),
Andy Flemingaea0c3e2011-04-07 14:38:35 -050095 int (*write)(const char *devname, unsigned char addr,
Wolfgang Denk934fcb62011-12-07 08:35:14 +010096 unsigned char reg, unsigned short value))
Marian Balakowiczaab8c492005-10-28 22:30:33 +020097{
Marian Balakowiczaab8c492005-10-28 22:30:33 +020098 struct mii_dev *new_dev;
Andy Flemingaecf6fc2011-04-08 02:10:27 -050099 struct legacy_mii_dev *ldev;
Laurence Withersb69e3372011-07-14 23:21:45 +0000100
101 BUG_ON(strlen(name) >= MDIO_NAME_LEN);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200102
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200103 /* check if we have unique name */
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500104 new_dev = miiphy_get_dev_by_name(name);
Mike Frysinger24a90082010-07-27 18:35:09 -0400105 if (new_dev) {
106 printf("miiphy_register: non unique device name '%s'\n", name);
107 return;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200108 }
109
110 /* allocate memory */
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500111 new_dev = mdio_alloc();
112 ldev = malloc(sizeof(*ldev));
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200113
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500114 if (new_dev == NULL || ldev == NULL) {
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500115 printf("miiphy_register: cannot allocate memory for '%s'\n",
Larry Johnson81b974b2007-10-31 11:21:29 -0500116 name);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200117 return;
118 }
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200119
120 /* initalize mii_dev struct fields */
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500121 new_dev->read = legacy_miiphy_read;
122 new_dev->write = legacy_miiphy_write;
Laurence Withersb69e3372011-07-14 23:21:45 +0000123 strncpy(new_dev->name, name, MDIO_NAME_LEN);
124 new_dev->name[MDIO_NAME_LEN - 1] = 0;
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500125 ldev->read = read;
126 ldev->write = write;
127 new_dev->priv = ldev;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200128
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500129 debug("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n",
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500130 new_dev->name, ldev->read, ldev->write);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200131
132 /* add it to the list */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500133 list_add_tail(&new_dev->link, &mii_devs);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200134
135 if (!current_mii)
136 current_mii = new_dev;
137}
138
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500139struct mii_dev *mdio_alloc(void)
140{
141 struct mii_dev *bus;
142
143 bus = malloc(sizeof(*bus));
144 if (!bus)
145 return bus;
146
147 memset(bus, 0, sizeof(*bus));
148
149 /* initalize mii_dev struct fields */
150 INIT_LIST_HEAD(&bus->link);
151
152 return bus;
153}
154
155int mdio_register(struct mii_dev *bus)
156{
157 if (!bus || !bus->name || !bus->read || !bus->write)
158 return -1;
159
160 /* check if we have unique name */
161 if (miiphy_get_dev_by_name(bus->name)) {
162 printf("mdio_register: non unique device name '%s'\n",
163 bus->name);
164 return -1;
165 }
166
167 /* add it to the list */
168 list_add_tail(&bus->link, &mii_devs);
169
170 if (!current_mii)
171 current_mii = bus;
172
173 return 0;
174}
175
176void mdio_list_devices(void)
177{
178 struct list_head *entry;
179
180 list_for_each(entry, &mii_devs) {
181 int i;
182 struct mii_dev *bus = list_entry(entry, struct mii_dev, link);
183
184 printf("%s:\n", bus->name);
185
186 for (i = 0; i < PHY_MAX_ADDR; i++) {
187 struct phy_device *phydev = bus->phymap[i];
188
189 if (phydev) {
190 printf("%d - %s", i, phydev->drv->name);
191
192 if (phydev->dev)
193 printf(" <--> %s\n", phydev->dev->name);
194 else
195 printf("\n");
196 }
197 }
198 }
199}
200
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400201int miiphy_set_current_dev(const char *devname)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200202{
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200203 struct mii_dev *dev;
204
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500205 dev = miiphy_get_dev_by_name(devname);
Mike Frysinger24a90082010-07-27 18:35:09 -0400206 if (dev) {
207 current_mii = dev;
208 return 0;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200209 }
210
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500211 printf("No such device: %s\n", devname);
212
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200213 return 1;
214}
215
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500216struct mii_dev *mdio_get_current_dev(void)
217{
218 return current_mii;
219}
220
221struct phy_device *mdio_phydev_for_ethname(const char *ethname)
222{
223 struct list_head *entry;
224 struct mii_dev *bus;
225
226 list_for_each(entry, &mii_devs) {
227 int i;
228 bus = list_entry(entry, struct mii_dev, link);
229
230 for (i = 0; i < PHY_MAX_ADDR; i++) {
231 if (!bus->phymap[i] || !bus->phymap[i]->dev)
232 continue;
233
234 if (strcmp(bus->phymap[i]->dev->name, ethname) == 0)
235 return bus->phymap[i];
236 }
237 }
238
239 printf("%s is not a known ethernet\n", ethname);
240 return NULL;
241}
242
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400243const char *miiphy_get_current_dev(void)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200244{
245 if (current_mii)
246 return current_mii->name;
247
248 return NULL;
249}
250
Mike Frysingerbd17e7a2010-07-27 18:35:10 -0400251static struct mii_dev *miiphy_get_active_dev(const char *devname)
252{
253 /* If the current mii is the one we want, return it */
254 if (current_mii)
255 if (strcmp(current_mii->name, devname) == 0)
256 return current_mii;
257
258 /* Otherwise, set the active one to the one we want */
259 if (miiphy_set_current_dev(devname))
260 return NULL;
261 else
262 return current_mii;
263}
264
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200265/*****************************************************************************
266 *
267 * Read to variable <value> from the PHY attached to device <devname>,
268 * use PHY address <addr> and register <reg>.
269 *
Andy Fleming896a7172011-10-31 09:46:13 -0500270 * This API is deprecated. Use phy_read on a phy_device found via phy_connect
271 *
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200272 * Returns:
273 * 0 on success
274 */
Wolfgang Denk934fcb62011-12-07 08:35:14 +0100275int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
Larry Johnson81b974b2007-10-31 11:21:29 -0500276 unsigned short *value)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200277{
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500278 struct mii_dev *bus;
Anatolij Gustschin1bbce3a2011-04-30 02:17:44 +0000279 int ret;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200280
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500281 bus = miiphy_get_active_dev(devname);
Anatolij Gustschin1bbce3a2011-04-30 02:17:44 +0000282 if (!bus)
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500283 return 1;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200284
Anatolij Gustschin1bbce3a2011-04-30 02:17:44 +0000285 ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg);
286 if (ret < 0)
287 return 1;
288
289 *value = (unsigned short)ret;
290 return 0;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200291}
292
293/*****************************************************************************
294 *
295 * Write <value> to the PHY attached to device <devname>,
296 * use PHY address <addr> and register <reg>.
297 *
Andy Fleming896a7172011-10-31 09:46:13 -0500298 * This API is deprecated. Use phy_write on a phy_device found by phy_connect
299 *
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200300 * Returns:
301 * 0 on success
302 */
Wolfgang Denk934fcb62011-12-07 08:35:14 +0100303int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
Larry Johnson81b974b2007-10-31 11:21:29 -0500304 unsigned short value)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200305{
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500306 struct mii_dev *bus;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200307
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500308 bus = miiphy_get_active_dev(devname);
309 if (bus)
310 return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200311
Mike Frysinger24a90082010-07-27 18:35:09 -0400312 return 1;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200313}
314
315/*****************************************************************************
316 *
317 * Print out list of registered MII capable devices.
318 */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500319void miiphy_listdev(void)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200320{
321 struct list_head *entry;
322 struct mii_dev *dev;
323
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500324 puts("MII devices: ");
325 list_for_each(entry, &mii_devs) {
326 dev = list_entry(entry, struct mii_dev, link);
327 printf("'%s' ", dev->name);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200328 }
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500329 puts("\n");
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200330
331 if (current_mii)
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500332 printf("Current device: '%s'\n", current_mii->name);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200333}
334
wdenkc6097192002-11-03 00:24:07 +0000335/*****************************************************************************
336 *
337 * Read the OUI, manufacture's model number, and revision number.
338 *
339 * OUI: 22 bits (unsigned int)
340 * Model: 6 bits (unsigned char)
341 * Revision: 4 bits (unsigned char)
342 *
Andy Fleming896a7172011-10-31 09:46:13 -0500343 * This API is deprecated.
344 *
wdenkc6097192002-11-03 00:24:07 +0000345 * Returns:
346 * 0 on success
347 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400348int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
wdenkc6097192002-11-03 00:24:07 +0000349 unsigned char *model, unsigned char *rev)
350{
351 unsigned int reg = 0;
wdenkf4cec3f2003-12-06 23:20:41 +0000352 unsigned short tmp;
wdenkc6097192002-11-03 00:24:07 +0000353
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500354 if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) {
355 debug("PHY ID register 2 read failed\n");
356 return -1;
wdenkc6097192002-11-03 00:24:07 +0000357 }
wdenkf4cec3f2003-12-06 23:20:41 +0000358 reg = tmp;
wdenkc6097192002-11-03 00:24:07 +0000359
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500360 debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg);
Shinya Kuribayashi49e42af2008-01-19 10:25:59 +0900361
wdenkc6097192002-11-03 00:24:07 +0000362 if (reg == 0xFFFF) {
363 /* No physical device present at this address */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500364 return -1;
wdenkc6097192002-11-03 00:24:07 +0000365 }
366
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500367 if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) {
368 debug("PHY ID register 1 read failed\n");
369 return -1;
wdenkc6097192002-11-03 00:24:07 +0000370 }
wdenkf4cec3f2003-12-06 23:20:41 +0000371 reg |= tmp << 16;
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500372 debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
Shinya Kuribayashi49e42af2008-01-19 10:25:59 +0900373
Larry Johnson81b974b2007-10-31 11:21:29 -0500374 *oui = (reg >> 10);
375 *model = (unsigned char)((reg >> 4) & 0x0000003F);
376 *rev = (unsigned char)(reg & 0x0000000F);
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500377 return 0;
wdenkc6097192002-11-03 00:24:07 +0000378}
379
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500380#ifndef CONFIG_PHYLIB
wdenkc6097192002-11-03 00:24:07 +0000381/*****************************************************************************
382 *
383 * Reset the PHY.
Andy Fleming896a7172011-10-31 09:46:13 -0500384 *
385 * This API is deprecated. Use PHYLIB.
386 *
wdenkc6097192002-11-03 00:24:07 +0000387 * Returns:
388 * 0 on success
389 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400390int miiphy_reset(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000391{
392 unsigned short reg;
Stefan Roese2e536362010-02-02 13:43:48 +0100393 int timeout = 500;
wdenkc6097192002-11-03 00:24:07 +0000394
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500395 if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
396 debug("PHY status read failed\n");
397 return -1;
Wolfgang Denk8ff63c22005-08-12 23:15:53 +0200398 }
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500399 if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) {
400 debug("PHY reset failed\n");
401 return -1;
wdenkc6097192002-11-03 00:24:07 +0000402 }
wdenk2cefd152004-02-08 22:55:38 +0000403#ifdef CONFIG_PHY_RESET_DELAY
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500404 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
wdenk2cefd152004-02-08 22:55:38 +0000405#endif
wdenkc6097192002-11-03 00:24:07 +0000406 /*
407 * Poll the control register for the reset bit to go to 0 (it is
408 * auto-clearing). This should happen within 0.5 seconds per the
409 * IEEE spec.
410 */
wdenkc6097192002-11-03 00:24:07 +0000411 reg = 0x8000;
Stefan Roese2e536362010-02-02 13:43:48 +0100412 while (((reg & 0x8000) != 0) && timeout--) {
Mike Frysingerd63ee712010-12-23 15:40:12 -0500413 if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
Stefan Roese2e536362010-02-02 13:43:48 +0100414 debug("PHY status read failed\n");
415 return -1;
wdenkc6097192002-11-03 00:24:07 +0000416 }
Stefan Roese2e536362010-02-02 13:43:48 +0100417 udelay(1000);
wdenkc6097192002-11-03 00:24:07 +0000418 }
419 if ((reg & 0x8000) == 0) {
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500420 return 0;
wdenkc6097192002-11-03 00:24:07 +0000421 } else {
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500422 puts("PHY reset timed out\n");
423 return -1;
wdenkc6097192002-11-03 00:24:07 +0000424 }
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500425 return 0;
wdenkc6097192002-11-03 00:24:07 +0000426}
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500427#endif /* !PHYLIB */
wdenkc6097192002-11-03 00:24:07 +0000428
wdenkc6097192002-11-03 00:24:07 +0000429/*****************************************************************************
430 *
Larry Johnson966a80b2007-11-01 08:46:50 -0500431 * Determine the ethernet speed (10/100/1000). Return 10 on error.
wdenkc6097192002-11-03 00:24:07 +0000432 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400433int miiphy_speed(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000434{
Larry Johnson966a80b2007-11-01 08:46:50 -0500435 u16 bmcr, anlpar;
wdenkc6097192002-11-03 00:24:07 +0000436
wdenkeec9a3d2004-03-23 23:20:24 +0000437#if defined(CONFIG_PHY_GIGE)
Larry Johnson966a80b2007-11-01 08:46:50 -0500438 u16 btsr;
439
440 /*
441 * Check for 1000BASE-X. If it is supported, then assume that the speed
442 * is 1000.
443 */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500444 if (miiphy_is_1000base_x(devname, addr))
Larry Johnson966a80b2007-11-01 08:46:50 -0500445 return _1000BASET;
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500446
Larry Johnson966a80b2007-11-01 08:46:50 -0500447 /*
448 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
449 */
450 /* Check for 1000BASE-T. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500451 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
452 printf("PHY 1000BT status");
Larry Johnson966a80b2007-11-01 08:46:50 -0500453 goto miiphy_read_failed;
454 }
455 if (btsr != 0xFFFF &&
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500456 (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)))
Larry Johnson966a80b2007-11-01 08:46:50 -0500457 return _1000BASET;
wdenkeec9a3d2004-03-23 23:20:24 +0000458#endif /* CONFIG_PHY_GIGE */
wdenked2ac4b2004-03-14 18:23:55 +0000459
wdenke3a06802004-06-06 23:13:55 +0000460 /* Check Basic Management Control Register first. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500461 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
462 printf("PHY speed");
Larry Johnson966a80b2007-11-01 08:46:50 -0500463 goto miiphy_read_failed;
wdenkc6097192002-11-03 00:24:07 +0000464 }
wdenke3a06802004-06-06 23:13:55 +0000465 /* Check if auto-negotiation is on. */
Mike Frysingerd63ee712010-12-23 15:40:12 -0500466 if (bmcr & BMCR_ANENABLE) {
wdenke3a06802004-06-06 23:13:55 +0000467 /* Get auto-negotiation results. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500468 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
469 printf("PHY AN speed");
Larry Johnson966a80b2007-11-01 08:46:50 -0500470 goto miiphy_read_failed;
wdenke3a06802004-06-06 23:13:55 +0000471 }
Mike Frysingerd63ee712010-12-23 15:40:12 -0500472 return (anlpar & LPA_100) ? _100BASET : _10BASET;
wdenke3a06802004-06-06 23:13:55 +0000473 }
474 /* Get speed from basic control settings. */
Mike Frysingerd63ee712010-12-23 15:40:12 -0500475 return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET;
wdenke3a06802004-06-06 23:13:55 +0000476
Michael Zaidman6dbca5f2010-02-28 16:28:25 +0200477miiphy_read_failed:
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500478 printf(" read failed, assuming 10BASE-T\n");
Larry Johnson966a80b2007-11-01 08:46:50 -0500479 return _10BASET;
wdenkc6097192002-11-03 00:24:07 +0000480}
481
wdenkc6097192002-11-03 00:24:07 +0000482/*****************************************************************************
483 *
Larry Johnson966a80b2007-11-01 08:46:50 -0500484 * Determine full/half duplex. Return half on error.
wdenkc6097192002-11-03 00:24:07 +0000485 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400486int miiphy_duplex(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000487{
Larry Johnson966a80b2007-11-01 08:46:50 -0500488 u16 bmcr, anlpar;
wdenkc6097192002-11-03 00:24:07 +0000489
wdenkeec9a3d2004-03-23 23:20:24 +0000490#if defined(CONFIG_PHY_GIGE)
Larry Johnson966a80b2007-11-01 08:46:50 -0500491 u16 btsr;
492
493 /* Check for 1000BASE-X. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500494 if (miiphy_is_1000base_x(devname, addr)) {
Larry Johnson966a80b2007-11-01 08:46:50 -0500495 /* 1000BASE-X */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500496 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
497 printf("1000BASE-X PHY AN duplex");
Larry Johnson966a80b2007-11-01 08:46:50 -0500498 goto miiphy_read_failed;
wdenked2ac4b2004-03-14 18:23:55 +0000499 }
500 }
Larry Johnson966a80b2007-11-01 08:46:50 -0500501 /*
502 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
503 */
504 /* Check for 1000BASE-T. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500505 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
506 printf("PHY 1000BT status");
Larry Johnson966a80b2007-11-01 08:46:50 -0500507 goto miiphy_read_failed;
508 }
509 if (btsr != 0xFFFF) {
510 if (btsr & PHY_1000BTSR_1000FD) {
511 return FULL;
512 } else if (btsr & PHY_1000BTSR_1000HD) {
513 return HALF;
514 }
515 }
wdenkeec9a3d2004-03-23 23:20:24 +0000516#endif /* CONFIG_PHY_GIGE */
wdenked2ac4b2004-03-14 18:23:55 +0000517
wdenke3a06802004-06-06 23:13:55 +0000518 /* Check Basic Management Control Register first. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500519 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
520 puts("PHY duplex");
Larry Johnson966a80b2007-11-01 08:46:50 -0500521 goto miiphy_read_failed;
wdenkc6097192002-11-03 00:24:07 +0000522 }
wdenke3a06802004-06-06 23:13:55 +0000523 /* Check if auto-negotiation is on. */
Mike Frysingerd63ee712010-12-23 15:40:12 -0500524 if (bmcr & BMCR_ANENABLE) {
wdenke3a06802004-06-06 23:13:55 +0000525 /* Get auto-negotiation results. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500526 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
527 puts("PHY AN duplex");
Larry Johnson966a80b2007-11-01 08:46:50 -0500528 goto miiphy_read_failed;
wdenke3a06802004-06-06 23:13:55 +0000529 }
Mike Frysingerd63ee712010-12-23 15:40:12 -0500530 return (anlpar & (LPA_10FULL | LPA_100FULL)) ?
Larry Johnson966a80b2007-11-01 08:46:50 -0500531 FULL : HALF;
wdenke3a06802004-06-06 23:13:55 +0000532 }
533 /* Get speed from basic control settings. */
Mike Frysingerd63ee712010-12-23 15:40:12 -0500534 return (bmcr & BMCR_FULLDPLX) ? FULL : HALF;
Larry Johnson966a80b2007-11-01 08:46:50 -0500535
Michael Zaidman6dbca5f2010-02-28 16:28:25 +0200536miiphy_read_failed:
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500537 printf(" read failed, assuming half duplex\n");
Larry Johnson966a80b2007-11-01 08:46:50 -0500538 return HALF;
539}
wdenke3a06802004-06-06 23:13:55 +0000540
Larry Johnson966a80b2007-11-01 08:46:50 -0500541/*****************************************************************************
542 *
543 * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
544 * 1000BASE-T, or on error.
545 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400546int miiphy_is_1000base_x(const char *devname, unsigned char addr)
Larry Johnson966a80b2007-11-01 08:46:50 -0500547{
548#if defined(CONFIG_PHY_GIGE)
549 u16 exsr;
550
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500551 if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) {
552 printf("PHY extended status read failed, assuming no "
Larry Johnson966a80b2007-11-01 08:46:50 -0500553 "1000BASE-X\n");
554 return 0;
555 }
Mike Frysingerd63ee712010-12-23 15:40:12 -0500556 return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH));
Larry Johnson966a80b2007-11-01 08:46:50 -0500557#else
558 return 0;
559#endif
wdenkc6097192002-11-03 00:24:07 +0000560}
561
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200562#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
wdenk49c3f672003-10-08 22:33:00 +0000563/*****************************************************************************
564 *
565 * Determine link status
566 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400567int miiphy_link(const char *devname, unsigned char addr)
wdenk49c3f672003-10-08 22:33:00 +0000568{
569 unsigned short reg;
570
wdenk145d2c12004-04-15 21:48:45 +0000571 /* dummy read; needed to latch some phys */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500572 (void)miiphy_read(devname, addr, MII_BMSR, &reg);
573 if (miiphy_read(devname, addr, MII_BMSR, &reg)) {
574 puts("MII_BMSR read failed, assuming no link\n");
575 return 0;
wdenk49c3f672003-10-08 22:33:00 +0000576 }
577
578 /* Determine if a link is active */
Mike Frysingerd63ee712010-12-23 15:40:12 -0500579 if ((reg & BMSR_LSTATUS) != 0) {
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500580 return 1;
wdenk49c3f672003-10-08 22:33:00 +0000581 } else {
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500582 return 0;
wdenk49c3f672003-10-08 22:33:00 +0000583 }
584}
585#endif